atsamd51g/system_control/
scr.rs

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1#[doc = "Register `SCR` reader"]
2pub type R = crate::R<ScrSpec>;
3#[doc = "Register `SCR` writer"]
4pub type W = crate::W<ScrSpec>;
5#[doc = "Sleep-on-exit on handler return\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum Sleeponexitselect {
8    #[doc = "0: Do not sleep when returning to Thread mode"]
9    Value0 = 0,
10    #[doc = "1: Enter sleep, or deep sleep, on return from an ISR"]
11    Value1 = 1,
12}
13impl From<Sleeponexitselect> for bool {
14    #[inline(always)]
15    fn from(variant: Sleeponexitselect) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `SLEEPONEXIT` reader - Sleep-on-exit on handler return"]
20pub type SleeponexitR = crate::BitReader<Sleeponexitselect>;
21impl SleeponexitR {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> Sleeponexitselect {
25        match self.bits {
26            false => Sleeponexitselect::Value0,
27            true => Sleeponexitselect::Value1,
28        }
29    }
30    #[doc = "Do not sleep when returning to Thread mode"]
31    #[inline(always)]
32    pub fn is_value_0(&self) -> bool {
33        *self == Sleeponexitselect::Value0
34    }
35    #[doc = "Enter sleep, or deep sleep, on return from an ISR"]
36    #[inline(always)]
37    pub fn is_value_1(&self) -> bool {
38        *self == Sleeponexitselect::Value1
39    }
40}
41#[doc = "Field `SLEEPONEXIT` writer - Sleep-on-exit on handler return"]
42pub type SleeponexitW<'a, REG> = crate::BitWriter<'a, REG, Sleeponexitselect>;
43impl<'a, REG> SleeponexitW<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Do not sleep when returning to Thread mode"]
48    #[inline(always)]
49    pub fn value_0(self) -> &'a mut crate::W<REG> {
50        self.variant(Sleeponexitselect::Value0)
51    }
52    #[doc = "Enter sleep, or deep sleep, on return from an ISR"]
53    #[inline(always)]
54    pub fn value_1(self) -> &'a mut crate::W<REG> {
55        self.variant(Sleeponexitselect::Value1)
56    }
57}
58#[doc = "Deep Sleep used as low power mode\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum Sleepdeepselect {
61    #[doc = "0: Sleep"]
62    Value0 = 0,
63    #[doc = "1: Deep sleep"]
64    Value1 = 1,
65}
66impl From<Sleepdeepselect> for bool {
67    #[inline(always)]
68    fn from(variant: Sleepdeepselect) -> Self {
69        variant as u8 != 0
70    }
71}
72#[doc = "Field `SLEEPDEEP` reader - Deep Sleep used as low power mode"]
73pub type SleepdeepR = crate::BitReader<Sleepdeepselect>;
74impl SleepdeepR {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> Sleepdeepselect {
78        match self.bits {
79            false => Sleepdeepselect::Value0,
80            true => Sleepdeepselect::Value1,
81        }
82    }
83    #[doc = "Sleep"]
84    #[inline(always)]
85    pub fn is_value_0(&self) -> bool {
86        *self == Sleepdeepselect::Value0
87    }
88    #[doc = "Deep sleep"]
89    #[inline(always)]
90    pub fn is_value_1(&self) -> bool {
91        *self == Sleepdeepselect::Value1
92    }
93}
94#[doc = "Field `SLEEPDEEP` writer - Deep Sleep used as low power mode"]
95pub type SleepdeepW<'a, REG> = crate::BitWriter<'a, REG, Sleepdeepselect>;
96impl<'a, REG> SleepdeepW<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Sleep"]
101    #[inline(always)]
102    pub fn value_0(self) -> &'a mut crate::W<REG> {
103        self.variant(Sleepdeepselect::Value0)
104    }
105    #[doc = "Deep sleep"]
106    #[inline(always)]
107    pub fn value_1(self) -> &'a mut crate::W<REG> {
108        self.variant(Sleepdeepselect::Value1)
109    }
110}
111#[doc = "Send Event on Pending bit\n\nValue on reset: 0"]
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113pub enum Sevonpendselect {
114    #[doc = "0: Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"]
115    Value0 = 0,
116    #[doc = "1: Enabled events and all interrupts, including disabled interrupts, can wakeup the processor"]
117    Value1 = 1,
118}
119impl From<Sevonpendselect> for bool {
120    #[inline(always)]
121    fn from(variant: Sevonpendselect) -> Self {
122        variant as u8 != 0
123    }
124}
125#[doc = "Field `SEVONPEND` reader - Send Event on Pending bit"]
126pub type SevonpendR = crate::BitReader<Sevonpendselect>;
127impl SevonpendR {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> Sevonpendselect {
131        match self.bits {
132            false => Sevonpendselect::Value0,
133            true => Sevonpendselect::Value1,
134        }
135    }
136    #[doc = "Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"]
137    #[inline(always)]
138    pub fn is_value_0(&self) -> bool {
139        *self == Sevonpendselect::Value0
140    }
141    #[doc = "Enabled events and all interrupts, including disabled interrupts, can wakeup the processor"]
142    #[inline(always)]
143    pub fn is_value_1(&self) -> bool {
144        *self == Sevonpendselect::Value1
145    }
146}
147#[doc = "Field `SEVONPEND` writer - Send Event on Pending bit"]
148pub type SevonpendW<'a, REG> = crate::BitWriter<'a, REG, Sevonpendselect>;
149impl<'a, REG> SevonpendW<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"]
154    #[inline(always)]
155    pub fn value_0(self) -> &'a mut crate::W<REG> {
156        self.variant(Sevonpendselect::Value0)
157    }
158    #[doc = "Enabled events and all interrupts, including disabled interrupts, can wakeup the processor"]
159    #[inline(always)]
160    pub fn value_1(self) -> &'a mut crate::W<REG> {
161        self.variant(Sevonpendselect::Value1)
162    }
163}
164impl R {
165    #[doc = "Bit 1 - Sleep-on-exit on handler return"]
166    #[inline(always)]
167    pub fn sleeponexit(&self) -> SleeponexitR {
168        SleeponexitR::new(((self.bits >> 1) & 1) != 0)
169    }
170    #[doc = "Bit 2 - Deep Sleep used as low power mode"]
171    #[inline(always)]
172    pub fn sleepdeep(&self) -> SleepdeepR {
173        SleepdeepR::new(((self.bits >> 2) & 1) != 0)
174    }
175    #[doc = "Bit 4 - Send Event on Pending bit"]
176    #[inline(always)]
177    pub fn sevonpend(&self) -> SevonpendR {
178        SevonpendR::new(((self.bits >> 4) & 1) != 0)
179    }
180}
181impl W {
182    #[doc = "Bit 1 - Sleep-on-exit on handler return"]
183    #[inline(always)]
184    #[must_use]
185    pub fn sleeponexit(&mut self) -> SleeponexitW<ScrSpec> {
186        SleeponexitW::new(self, 1)
187    }
188    #[doc = "Bit 2 - Deep Sleep used as low power mode"]
189    #[inline(always)]
190    #[must_use]
191    pub fn sleepdeep(&mut self) -> SleepdeepW<ScrSpec> {
192        SleepdeepW::new(self, 2)
193    }
194    #[doc = "Bit 4 - Send Event on Pending bit"]
195    #[inline(always)]
196    #[must_use]
197    pub fn sevonpend(&mut self) -> SevonpendW<ScrSpec> {
198        SevonpendW::new(self, 4)
199    }
200}
201#[doc = "System Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`scr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
202pub struct ScrSpec;
203impl crate::RegisterSpec for ScrSpec {
204    type Ux = u32;
205}
206#[doc = "`read()` method returns [`scr::R`](R) reader structure"]
207impl crate::Readable for ScrSpec {}
208#[doc = "`write(|w| ..)` method takes [`scr::W`](W) writer structure"]
209impl crate::Writable for ScrSpec {
210    type Safety = crate::Unsafe;
211    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
212    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
213}
214#[doc = "`reset()` method sets SCR to value 0"]
215impl crate::Resettable for ScrSpec {
216    const RESET_VALUE: u32 = 0;
217}
atsamd51g/system_control/scr.rs

atsamd51g/system_control/
scr.rs
