atsamd51g/rtc/mode2/
intenclr.rs

Help
1#[doc = "Register `INTENCLR` reader"]
2pub type R = crate::R<IntenclrSpec>;
3#[doc = "Register `INTENCLR` writer"]
4pub type W = crate::W<IntenclrSpec>;
5#[doc = "Field `PER0` reader - Periodic Interval 0 Interrupt Enable"]
6pub type Per0R = crate::BitReader;
7#[doc = "Field `PER0` writer - Periodic Interval 0 Interrupt Enable"]
8pub type Per0W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PER1` reader - Periodic Interval 1 Interrupt Enable"]
10pub type Per1R = crate::BitReader;
11#[doc = "Field `PER1` writer - Periodic Interval 1 Interrupt Enable"]
12pub type Per1W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PER2` reader - Periodic Interval 2 Interrupt Enable"]
14pub type Per2R = crate::BitReader;
15#[doc = "Field `PER2` writer - Periodic Interval 2 Interrupt Enable"]
16pub type Per2W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `PER3` reader - Periodic Interval 3 Interrupt Enable"]
18pub type Per3R = crate::BitReader;
19#[doc = "Field `PER3` writer - Periodic Interval 3 Interrupt Enable"]
20pub type Per3W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PER4` reader - Periodic Interval 4 Interrupt Enable"]
22pub type Per4R = crate::BitReader;
23#[doc = "Field `PER4` writer - Periodic Interval 4 Interrupt Enable"]
24pub type Per4W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `PER5` reader - Periodic Interval 5 Interrupt Enable"]
26pub type Per5R = crate::BitReader;
27#[doc = "Field `PER5` writer - Periodic Interval 5 Interrupt Enable"]
28pub type Per5W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `PER6` reader - Periodic Interval 6 Interrupt Enable"]
30pub type Per6R = crate::BitReader;
31#[doc = "Field `PER6` writer - Periodic Interval 6 Interrupt Enable"]
32pub type Per6W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `PER7` reader - Periodic Interval 7 Interrupt Enable"]
34pub type Per7R = crate::BitReader;
35#[doc = "Field `PER7` writer - Periodic Interval 7 Interrupt Enable"]
36pub type Per7W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `ALARM0` reader - Alarm 0 Interrupt Enable"]
38pub type Alarm0R = crate::BitReader;
39#[doc = "Field `ALARM0` writer - Alarm 0 Interrupt Enable"]
40pub type Alarm0W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `ALARM1` reader - Alarm 1 Interrupt Enable"]
42pub type Alarm1R = crate::BitReader;
43#[doc = "Field `ALARM1` writer - Alarm 1 Interrupt Enable"]
44pub type Alarm1W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `TAMPER` reader - Tamper Enable"]
46pub type TamperR = crate::BitReader;
47#[doc = "Field `TAMPER` writer - Tamper Enable"]
48pub type TamperW<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `OVF` reader - Overflow Interrupt Enable"]
50pub type OvfR = crate::BitReader;
51#[doc = "Field `OVF` writer - Overflow Interrupt Enable"]
52pub type OvfW<'a, REG> = crate::BitWriter<'a, REG>;
53impl R {
54    #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"]
55    #[inline(always)]
56    pub fn per0(&self) -> Per0R {
57        Per0R::new((self.bits & 1) != 0)
58    }
59    #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"]
60    #[inline(always)]
61    pub fn per1(&self) -> Per1R {
62        Per1R::new(((self.bits >> 1) & 1) != 0)
63    }
64    #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"]
65    #[inline(always)]
66    pub fn per2(&self) -> Per2R {
67        Per2R::new(((self.bits >> 2) & 1) != 0)
68    }
69    #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"]
70    #[inline(always)]
71    pub fn per3(&self) -> Per3R {
72        Per3R::new(((self.bits >> 3) & 1) != 0)
73    }
74    #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"]
75    #[inline(always)]
76    pub fn per4(&self) -> Per4R {
77        Per4R::new(((self.bits >> 4) & 1) != 0)
78    }
79    #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"]
80    #[inline(always)]
81    pub fn per5(&self) -> Per5R {
82        Per5R::new(((self.bits >> 5) & 1) != 0)
83    }
84    #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"]
85    #[inline(always)]
86    pub fn per6(&self) -> Per6R {
87        Per6R::new(((self.bits >> 6) & 1) != 0)
88    }
89    #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"]
90    #[inline(always)]
91    pub fn per7(&self) -> Per7R {
92        Per7R::new(((self.bits >> 7) & 1) != 0)
93    }
94    #[doc = "Bit 8 - Alarm 0 Interrupt Enable"]
95    #[inline(always)]
96    pub fn alarm0(&self) -> Alarm0R {
97        Alarm0R::new(((self.bits >> 8) & 1) != 0)
98    }
99    #[doc = "Bit 9 - Alarm 1 Interrupt Enable"]
100    #[inline(always)]
101    pub fn alarm1(&self) -> Alarm1R {
102        Alarm1R::new(((self.bits >> 9) & 1) != 0)
103    }
104    #[doc = "Bit 14 - Tamper Enable"]
105    #[inline(always)]
106    pub fn tamper(&self) -> TamperR {
107        TamperR::new(((self.bits >> 14) & 1) != 0)
108    }
109    #[doc = "Bit 15 - Overflow Interrupt Enable"]
110    #[inline(always)]
111    pub fn ovf(&self) -> OvfR {
112        OvfR::new(((self.bits >> 15) & 1) != 0)
113    }
114}
115impl W {
116    #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"]
117    #[inline(always)]
118    #[must_use]
119    pub fn per0(&mut self) -> Per0W<IntenclrSpec> {
120        Per0W::new(self, 0)
121    }
122    #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"]
123    #[inline(always)]
124    #[must_use]
125    pub fn per1(&mut self) -> Per1W<IntenclrSpec> {
126        Per1W::new(self, 1)
127    }
128    #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"]
129    #[inline(always)]
130    #[must_use]
131    pub fn per2(&mut self) -> Per2W<IntenclrSpec> {
132        Per2W::new(self, 2)
133    }
134    #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"]
135    #[inline(always)]
136    #[must_use]
137    pub fn per3(&mut self) -> Per3W<IntenclrSpec> {
138        Per3W::new(self, 3)
139    }
140    #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"]
141    #[inline(always)]
142    #[must_use]
143    pub fn per4(&mut self) -> Per4W<IntenclrSpec> {
144        Per4W::new(self, 4)
145    }
146    #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"]
147    #[inline(always)]
148    #[must_use]
149    pub fn per5(&mut self) -> Per5W<IntenclrSpec> {
150        Per5W::new(self, 5)
151    }
152    #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"]
153    #[inline(always)]
154    #[must_use]
155    pub fn per6(&mut self) -> Per6W<IntenclrSpec> {
156        Per6W::new(self, 6)
157    }
158    #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"]
159    #[inline(always)]
160    #[must_use]
161    pub fn per7(&mut self) -> Per7W<IntenclrSpec> {
162        Per7W::new(self, 7)
163    }
164    #[doc = "Bit 8 - Alarm 0 Interrupt Enable"]
165    #[inline(always)]
166    #[must_use]
167    pub fn alarm0(&mut self) -> Alarm0W<IntenclrSpec> {
168        Alarm0W::new(self, 8)
169    }
170    #[doc = "Bit 9 - Alarm 1 Interrupt Enable"]
171    #[inline(always)]
172    #[must_use]
173    pub fn alarm1(&mut self) -> Alarm1W<IntenclrSpec> {
174        Alarm1W::new(self, 9)
175    }
176    #[doc = "Bit 14 - Tamper Enable"]
177    #[inline(always)]
178    #[must_use]
179    pub fn tamper(&mut self) -> TamperW<IntenclrSpec> {
180        TamperW::new(self, 14)
181    }
182    #[doc = "Bit 15 - Overflow Interrupt Enable"]
183    #[inline(always)]
184    #[must_use]
185    pub fn ovf(&mut self) -> OvfW<IntenclrSpec> {
186        OvfW::new(self, 15)
187    }
188}
189#[doc = "MODE2 Interrupt Enable Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intenclr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenclr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
190pub struct IntenclrSpec;
191impl crate::RegisterSpec for IntenclrSpec {
192    type Ux = u16;
193}
194#[doc = "`read()` method returns [`intenclr::R`](R) reader structure"]
195impl crate::Readable for IntenclrSpec {}
196#[doc = "`write(|w| ..)` method takes [`intenclr::W`](W) writer structure"]
197impl crate::Writable for IntenclrSpec {
198    type Safety = crate::Unsafe;
199    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
200    const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
201}
202#[doc = "`reset()` method sets INTENCLR to value 0"]
203impl crate::Resettable for IntenclrSpec {
204    const RESET_VALUE: u16 = 0;
205}
atsamd51g/rtc/mode2/intenclr.rs

atsamd51g/rtc/mode2/
intenclr.rs
