atsamd51g/eic/
ctrla.rs

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1#[doc = "Register `CTRLA` reader"]
2pub type R = crate::R<CtrlaSpec>;
3#[doc = "Register `CTRLA` writer"]
4pub type W = crate::W<CtrlaSpec>;
5#[doc = "Field `SWRST` reader - Software Reset"]
6pub type SwrstR = crate::BitReader;
7#[doc = "Field `SWRST` writer - Software Reset"]
8pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ENABLE` reader - Enable"]
10pub type EnableR = crate::BitReader;
11#[doc = "Field `ENABLE` writer - Enable"]
12pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Clock Selection\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15pub enum Ckselselect {
16    #[doc = "0: Clocked by GCLK"]
17    ClkGclk = 0,
18    #[doc = "1: Clocked by ULP32K"]
19    ClkUlp32k = 1,
20}
21impl From<Ckselselect> for bool {
22    #[inline(always)]
23    fn from(variant: Ckselselect) -> Self {
24        variant as u8 != 0
25    }
26}
27#[doc = "Field `CKSEL` reader - Clock Selection"]
28pub type CkselR = crate::BitReader<Ckselselect>;
29impl CkselR {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> Ckselselect {
33        match self.bits {
34            false => Ckselselect::ClkGclk,
35            true => Ckselselect::ClkUlp32k,
36        }
37    }
38    #[doc = "Clocked by GCLK"]
39    #[inline(always)]
40    pub fn is_clk_gclk(&self) -> bool {
41        *self == Ckselselect::ClkGclk
42    }
43    #[doc = "Clocked by ULP32K"]
44    #[inline(always)]
45    pub fn is_clk_ulp32k(&self) -> bool {
46        *self == Ckselselect::ClkUlp32k
47    }
48}
49#[doc = "Field `CKSEL` writer - Clock Selection"]
50pub type CkselW<'a, REG> = crate::BitWriter<'a, REG, Ckselselect>;
51impl<'a, REG> CkselW<'a, REG>
52where
53    REG: crate::Writable + crate::RegisterSpec,
54{
55    #[doc = "Clocked by GCLK"]
56    #[inline(always)]
57    pub fn clk_gclk(self) -> &'a mut crate::W<REG> {
58        self.variant(Ckselselect::ClkGclk)
59    }
60    #[doc = "Clocked by ULP32K"]
61    #[inline(always)]
62    pub fn clk_ulp32k(self) -> &'a mut crate::W<REG> {
63        self.variant(Ckselselect::ClkUlp32k)
64    }
65}
66impl R {
67    #[doc = "Bit 0 - Software Reset"]
68    #[inline(always)]
69    pub fn swrst(&self) -> SwrstR {
70        SwrstR::new((self.bits & 1) != 0)
71    }
72    #[doc = "Bit 1 - Enable"]
73    #[inline(always)]
74    pub fn enable(&self) -> EnableR {
75        EnableR::new(((self.bits >> 1) & 1) != 0)
76    }
77    #[doc = "Bit 4 - Clock Selection"]
78    #[inline(always)]
79    pub fn cksel(&self) -> CkselR {
80        CkselR::new(((self.bits >> 4) & 1) != 0)
81    }
82}
83impl W {
84    #[doc = "Bit 0 - Software Reset"]
85    #[inline(always)]
86    #[must_use]
87    pub fn swrst(&mut self) -> SwrstW<CtrlaSpec> {
88        SwrstW::new(self, 0)
89    }
90    #[doc = "Bit 1 - Enable"]
91    #[inline(always)]
92    #[must_use]
93    pub fn enable(&mut self) -> EnableW<CtrlaSpec> {
94        EnableW::new(self, 1)
95    }
96    #[doc = "Bit 4 - Clock Selection"]
97    #[inline(always)]
98    #[must_use]
99    pub fn cksel(&mut self) -> CkselW<CtrlaSpec> {
100        CkselW::new(self, 4)
101    }
102}
103#[doc = "Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrla::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrla::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
104pub struct CtrlaSpec;
105impl crate::RegisterSpec for CtrlaSpec {
106    type Ux = u8;
107}
108#[doc = "`read()` method returns [`ctrla::R`](R) reader structure"]
109impl crate::Readable for CtrlaSpec {}
110#[doc = "`write(|w| ..)` method takes [`ctrla::W`](W) writer structure"]
111impl crate::Writable for CtrlaSpec {
112    type Safety = crate::Unsafe;
113    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
114    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
115}
116#[doc = "`reset()` method sets CTRLA to value 0"]
117impl crate::Resettable for CtrlaSpec {
118    const RESET_VALUE: u8 = 0;
119}
atsamd51g/eic/ctrla.rs

atsamd51g/eic/
ctrla.rs
