atsamd51g/sercom0/usart_int/
ctrlb.rs

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1#[doc = "Register `CTRLB` reader"]
2pub type R = crate::R<CtrlbSpec>;
3#[doc = "Register `CTRLB` writer"]
4pub type W = crate::W<CtrlbSpec>;
5#[doc = "Character Size\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Chsizeselect {
9    #[doc = "0: 8 Bits"]
10    _8Bit = 0,
11    #[doc = "1: 9 Bits"]
12    _9Bit = 1,
13    #[doc = "5: 5 Bits"]
14    _5Bit = 5,
15    #[doc = "6: 6 Bits"]
16    _6Bit = 6,
17    #[doc = "7: 7 Bits"]
18    _7Bit = 7,
19}
20impl From<Chsizeselect> for u8 {
21    #[inline(always)]
22    fn from(variant: Chsizeselect) -> Self {
23        variant as _
24    }
25}
26impl crate::FieldSpec for Chsizeselect {
27    type Ux = u8;
28}
29impl crate::IsEnum for Chsizeselect {}
30#[doc = "Field `CHSIZE` reader - Character Size"]
31pub type ChsizeR = crate::FieldReader<Chsizeselect>;
32impl ChsizeR {
33    #[doc = "Get enumerated values variant"]
34    #[inline(always)]
35    pub const fn variant(&self) -> Option<Chsizeselect> {
36        match self.bits {
37            0 => Some(Chsizeselect::_8Bit),
38            1 => Some(Chsizeselect::_9Bit),
39            5 => Some(Chsizeselect::_5Bit),
40            6 => Some(Chsizeselect::_6Bit),
41            7 => Some(Chsizeselect::_7Bit),
42            _ => None,
43        }
44    }
45    #[doc = "8 Bits"]
46    #[inline(always)]
47    pub fn is_8_bit(&self) -> bool {
48        *self == Chsizeselect::_8Bit
49    }
50    #[doc = "9 Bits"]
51    #[inline(always)]
52    pub fn is_9_bit(&self) -> bool {
53        *self == Chsizeselect::_9Bit
54    }
55    #[doc = "5 Bits"]
56    #[inline(always)]
57    pub fn is_5_bit(&self) -> bool {
58        *self == Chsizeselect::_5Bit
59    }
60    #[doc = "6 Bits"]
61    #[inline(always)]
62    pub fn is_6_bit(&self) -> bool {
63        *self == Chsizeselect::_6Bit
64    }
65    #[doc = "7 Bits"]
66    #[inline(always)]
67    pub fn is_7_bit(&self) -> bool {
68        *self == Chsizeselect::_7Bit
69    }
70}
71#[doc = "Field `CHSIZE` writer - Character Size"]
72pub type ChsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Chsizeselect>;
73impl<'a, REG> ChsizeW<'a, REG>
74where
75    REG: crate::Writable + crate::RegisterSpec,
76    REG::Ux: From<u8>,
77{
78    #[doc = "8 Bits"]
79    #[inline(always)]
80    pub fn _8_bit(self) -> &'a mut crate::W<REG> {
81        self.variant(Chsizeselect::_8Bit)
82    }
83    #[doc = "9 Bits"]
84    #[inline(always)]
85    pub fn _9_bit(self) -> &'a mut crate::W<REG> {
86        self.variant(Chsizeselect::_9Bit)
87    }
88    #[doc = "5 Bits"]
89    #[inline(always)]
90    pub fn _5_bit(self) -> &'a mut crate::W<REG> {
91        self.variant(Chsizeselect::_5Bit)
92    }
93    #[doc = "6 Bits"]
94    #[inline(always)]
95    pub fn _6_bit(self) -> &'a mut crate::W<REG> {
96        self.variant(Chsizeselect::_6Bit)
97    }
98    #[doc = "7 Bits"]
99    #[inline(always)]
100    pub fn _7_bit(self) -> &'a mut crate::W<REG> {
101        self.variant(Chsizeselect::_7Bit)
102    }
103}
104#[doc = "Stop Bit Mode\n\nValue on reset: 0"]
105#[derive(Clone, Copy, Debug, PartialEq, Eq)]
106pub enum Sbmodeselect {
107    #[doc = "0: One Stop Bit"]
108    _1Bit = 0,
109    #[doc = "1: Two Stop Bits"]
110    _2Bit = 1,
111}
112impl From<Sbmodeselect> for bool {
113    #[inline(always)]
114    fn from(variant: Sbmodeselect) -> Self {
115        variant as u8 != 0
116    }
117}
118#[doc = "Field `SBMODE` reader - Stop Bit Mode"]
119pub type SbmodeR = crate::BitReader<Sbmodeselect>;
120impl SbmodeR {
121    #[doc = "Get enumerated values variant"]
122    #[inline(always)]
123    pub const fn variant(&self) -> Sbmodeselect {
124        match self.bits {
125            false => Sbmodeselect::_1Bit,
126            true => Sbmodeselect::_2Bit,
127        }
128    }
129    #[doc = "One Stop Bit"]
130    #[inline(always)]
131    pub fn is_1_bit(&self) -> bool {
132        *self == Sbmodeselect::_1Bit
133    }
134    #[doc = "Two Stop Bits"]
135    #[inline(always)]
136    pub fn is_2_bit(&self) -> bool {
137        *self == Sbmodeselect::_2Bit
138    }
139}
140#[doc = "Field `SBMODE` writer - Stop Bit Mode"]
141pub type SbmodeW<'a, REG> = crate::BitWriter<'a, REG, Sbmodeselect>;
142impl<'a, REG> SbmodeW<'a, REG>
143where
144    REG: crate::Writable + crate::RegisterSpec,
145{
146    #[doc = "One Stop Bit"]
147    #[inline(always)]
148    pub fn _1_bit(self) -> &'a mut crate::W<REG> {
149        self.variant(Sbmodeselect::_1Bit)
150    }
151    #[doc = "Two Stop Bits"]
152    #[inline(always)]
153    pub fn _2_bit(self) -> &'a mut crate::W<REG> {
154        self.variant(Sbmodeselect::_2Bit)
155    }
156}
157#[doc = "Field `COLDEN` reader - Collision Detection Enable"]
158pub type ColdenR = crate::BitReader;
159#[doc = "Field `COLDEN` writer - Collision Detection Enable"]
160pub type ColdenW<'a, REG> = crate::BitWriter<'a, REG>;
161#[doc = "Field `SFDE` reader - Start of Frame Detection Enable"]
162pub type SfdeR = crate::BitReader;
163#[doc = "Field `SFDE` writer - Start of Frame Detection Enable"]
164pub type SfdeW<'a, REG> = crate::BitWriter<'a, REG>;
165#[doc = "Field `ENC` reader - Encoding Format"]
166pub type EncR = crate::BitReader;
167#[doc = "Field `ENC` writer - Encoding Format"]
168pub type EncW<'a, REG> = crate::BitWriter<'a, REG>;
169#[doc = "Parity Mode\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq, Eq)]
171pub enum Pmodeselect {
172    #[doc = "0: Even Parity"]
173    Even = 0,
174    #[doc = "1: Odd Parity"]
175    Odd = 1,
176}
177impl From<Pmodeselect> for bool {
178    #[inline(always)]
179    fn from(variant: Pmodeselect) -> Self {
180        variant as u8 != 0
181    }
182}
183#[doc = "Field `PMODE` reader - Parity Mode"]
184pub type PmodeR = crate::BitReader<Pmodeselect>;
185impl PmodeR {
186    #[doc = "Get enumerated values variant"]
187    #[inline(always)]
188    pub const fn variant(&self) -> Pmodeselect {
189        match self.bits {
190            false => Pmodeselect::Even,
191            true => Pmodeselect::Odd,
192        }
193    }
194    #[doc = "Even Parity"]
195    #[inline(always)]
196    pub fn is_even(&self) -> bool {
197        *self == Pmodeselect::Even
198    }
199    #[doc = "Odd Parity"]
200    #[inline(always)]
201    pub fn is_odd(&self) -> bool {
202        *self == Pmodeselect::Odd
203    }
204}
205#[doc = "Field `PMODE` writer - Parity Mode"]
206pub type PmodeW<'a, REG> = crate::BitWriter<'a, REG, Pmodeselect>;
207impl<'a, REG> PmodeW<'a, REG>
208where
209    REG: crate::Writable + crate::RegisterSpec,
210{
211    #[doc = "Even Parity"]
212    #[inline(always)]
213    pub fn even(self) -> &'a mut crate::W<REG> {
214        self.variant(Pmodeselect::Even)
215    }
216    #[doc = "Odd Parity"]
217    #[inline(always)]
218    pub fn odd(self) -> &'a mut crate::W<REG> {
219        self.variant(Pmodeselect::Odd)
220    }
221}
222#[doc = "Field `TXEN` reader - Transmitter Enable"]
223pub type TxenR = crate::BitReader;
224#[doc = "Field `TXEN` writer - Transmitter Enable"]
225pub type TxenW<'a, REG> = crate::BitWriter<'a, REG>;
226#[doc = "Field `RXEN` reader - Receiver Enable"]
227pub type RxenR = crate::BitReader;
228#[doc = "Field `RXEN` writer - Receiver Enable"]
229pub type RxenW<'a, REG> = crate::BitWriter<'a, REG>;
230#[doc = "LIN Command\n\nValue on reset: 0"]
231#[derive(Clone, Copy, Debug, PartialEq, Eq)]
232#[repr(u8)]
233pub enum Lincmdselect {
234    #[doc = "0: Normal USART transmission"]
235    None = 0,
236    #[doc = "1: Break field is transmitted when DATA is written"]
237    SoftwareControlTransmitCmd = 1,
238    #[doc = "2: Break, sync and identifier are automatically transmitted when DATA is written with the identifier"]
239    AutoTransmitCmd = 2,
240}
241impl From<Lincmdselect> for u8 {
242    #[inline(always)]
243    fn from(variant: Lincmdselect) -> Self {
244        variant as _
245    }
246}
247impl crate::FieldSpec for Lincmdselect {
248    type Ux = u8;
249}
250impl crate::IsEnum for Lincmdselect {}
251#[doc = "Field `LINCMD` reader - LIN Command"]
252pub type LincmdR = crate::FieldReader<Lincmdselect>;
253impl LincmdR {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub const fn variant(&self) -> Option<Lincmdselect> {
257        match self.bits {
258            0 => Some(Lincmdselect::None),
259            1 => Some(Lincmdselect::SoftwareControlTransmitCmd),
260            2 => Some(Lincmdselect::AutoTransmitCmd),
261            _ => None,
262        }
263    }
264    #[doc = "Normal USART transmission"]
265    #[inline(always)]
266    pub fn is_none(&self) -> bool {
267        *self == Lincmdselect::None
268    }
269    #[doc = "Break field is transmitted when DATA is written"]
270    #[inline(always)]
271    pub fn is_software_control_transmit_cmd(&self) -> bool {
272        *self == Lincmdselect::SoftwareControlTransmitCmd
273    }
274    #[doc = "Break, sync and identifier are automatically transmitted when DATA is written with the identifier"]
275    #[inline(always)]
276    pub fn is_auto_transmit_cmd(&self) -> bool {
277        *self == Lincmdselect::AutoTransmitCmd
278    }
279}
280#[doc = "Field `LINCMD` writer - LIN Command"]
281pub type LincmdW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lincmdselect>;
282impl<'a, REG> LincmdW<'a, REG>
283where
284    REG: crate::Writable + crate::RegisterSpec,
285    REG::Ux: From<u8>,
286{
287    #[doc = "Normal USART transmission"]
288    #[inline(always)]
289    pub fn none(self) -> &'a mut crate::W<REG> {
290        self.variant(Lincmdselect::None)
291    }
292    #[doc = "Break field is transmitted when DATA is written"]
293    #[inline(always)]
294    pub fn software_control_transmit_cmd(self) -> &'a mut crate::W<REG> {
295        self.variant(Lincmdselect::SoftwareControlTransmitCmd)
296    }
297    #[doc = "Break, sync and identifier are automatically transmitted when DATA is written with the identifier"]
298    #[inline(always)]
299    pub fn auto_transmit_cmd(self) -> &'a mut crate::W<REG> {
300        self.variant(Lincmdselect::AutoTransmitCmd)
301    }
302}
303impl R {
304    #[doc = "Bits 0:2 - Character Size"]
305    #[inline(always)]
306    pub fn chsize(&self) -> ChsizeR {
307        ChsizeR::new((self.bits & 7) as u8)
308    }
309    #[doc = "Bit 6 - Stop Bit Mode"]
310    #[inline(always)]
311    pub fn sbmode(&self) -> SbmodeR {
312        SbmodeR::new(((self.bits >> 6) & 1) != 0)
313    }
314    #[doc = "Bit 8 - Collision Detection Enable"]
315    #[inline(always)]
316    pub fn colden(&self) -> ColdenR {
317        ColdenR::new(((self.bits >> 8) & 1) != 0)
318    }
319    #[doc = "Bit 9 - Start of Frame Detection Enable"]
320    #[inline(always)]
321    pub fn sfde(&self) -> SfdeR {
322        SfdeR::new(((self.bits >> 9) & 1) != 0)
323    }
324    #[doc = "Bit 10 - Encoding Format"]
325    #[inline(always)]
326    pub fn enc(&self) -> EncR {
327        EncR::new(((self.bits >> 10) & 1) != 0)
328    }
329    #[doc = "Bit 13 - Parity Mode"]
330    #[inline(always)]
331    pub fn pmode(&self) -> PmodeR {
332        PmodeR::new(((self.bits >> 13) & 1) != 0)
333    }
334    #[doc = "Bit 16 - Transmitter Enable"]
335    #[inline(always)]
336    pub fn txen(&self) -> TxenR {
337        TxenR::new(((self.bits >> 16) & 1) != 0)
338    }
339    #[doc = "Bit 17 - Receiver Enable"]
340    #[inline(always)]
341    pub fn rxen(&self) -> RxenR {
342        RxenR::new(((self.bits >> 17) & 1) != 0)
343    }
344    #[doc = "Bits 24:25 - LIN Command"]
345    #[inline(always)]
346    pub fn lincmd(&self) -> LincmdR {
347        LincmdR::new(((self.bits >> 24) & 3) as u8)
348    }
349}
350impl W {
351    #[doc = "Bits 0:2 - Character Size"]
352    #[inline(always)]
353    #[must_use]
354    pub fn chsize(&mut self) -> ChsizeW<CtrlbSpec> {
355        ChsizeW::new(self, 0)
356    }
357    #[doc = "Bit 6 - Stop Bit Mode"]
358    #[inline(always)]
359    #[must_use]
360    pub fn sbmode(&mut self) -> SbmodeW<CtrlbSpec> {
361        SbmodeW::new(self, 6)
362    }
363    #[doc = "Bit 8 - Collision Detection Enable"]
364    #[inline(always)]
365    #[must_use]
366    pub fn colden(&mut self) -> ColdenW<CtrlbSpec> {
367        ColdenW::new(self, 8)
368    }
369    #[doc = "Bit 9 - Start of Frame Detection Enable"]
370    #[inline(always)]
371    #[must_use]
372    pub fn sfde(&mut self) -> SfdeW<CtrlbSpec> {
373        SfdeW::new(self, 9)
374    }
375    #[doc = "Bit 10 - Encoding Format"]
376    #[inline(always)]
377    #[must_use]
378    pub fn enc(&mut self) -> EncW<CtrlbSpec> {
379        EncW::new(self, 10)
380    }
381    #[doc = "Bit 13 - Parity Mode"]
382    #[inline(always)]
383    #[must_use]
384    pub fn pmode(&mut self) -> PmodeW<CtrlbSpec> {
385        PmodeW::new(self, 13)
386    }
387    #[doc = "Bit 16 - Transmitter Enable"]
388    #[inline(always)]
389    #[must_use]
390    pub fn txen(&mut self) -> TxenW<CtrlbSpec> {
391        TxenW::new(self, 16)
392    }
393    #[doc = "Bit 17 - Receiver Enable"]
394    #[inline(always)]
395    #[must_use]
396    pub fn rxen(&mut self) -> RxenW<CtrlbSpec> {
397        RxenW::new(self, 17)
398    }
399    #[doc = "Bits 24:25 - LIN Command"]
400    #[inline(always)]
401    #[must_use]
402    pub fn lincmd(&mut self) -> LincmdW<CtrlbSpec> {
403        LincmdW::new(self, 24)
404    }
405}
406#[doc = "USART_INT Control B\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
407pub struct CtrlbSpec;
408impl crate::RegisterSpec for CtrlbSpec {
409    type Ux = u32;
410}
411#[doc = "`read()` method returns [`ctrlb::R`](R) reader structure"]
412impl crate::Readable for CtrlbSpec {}
413#[doc = "`write(|w| ..)` method takes [`ctrlb::W`](W) writer structure"]
414impl crate::Writable for CtrlbSpec {
415    type Safety = crate::Unsafe;
416    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
417    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
418}
419#[doc = "`reset()` method sets CTRLB to value 0"]
420impl crate::Resettable for CtrlbSpec {
421    const RESET_VALUE: u32 = 0;
422}
atsamd51g/sercom0/usart_int/ctrlb.rs

atsamd51g/sercom0/usart_int/
ctrlb.rs
