atsamd51g/sys_tick/
csr.rs
1#[doc = "Register `CSR` reader"]
2pub type R = crate::R<CsrSpec>;
3#[doc = "Register `CSR` writer"]
4pub type W = crate::W<CsrSpec>;
5#[doc = "SysTick Counter Enable\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum Enableselect {
8 #[doc = "0: Counter disabled"]
9 Value0 = 0,
10 #[doc = "1: Counter enabled"]
11 Value1 = 1,
12}
13impl From<Enableselect> for bool {
14 #[inline(always)]
15 fn from(variant: Enableselect) -> Self {
16 variant as u8 != 0
17 }
18}
19#[doc = "Field `ENABLE` reader - SysTick Counter Enable"]
20pub type EnableR = crate::BitReader<Enableselect>;
21impl EnableR {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> Enableselect {
25 match self.bits {
26 false => Enableselect::Value0,
27 true => Enableselect::Value1,
28 }
29 }
30 #[doc = "Counter disabled"]
31 #[inline(always)]
32 pub fn is_value_0(&self) -> bool {
33 *self == Enableselect::Value0
34 }
35 #[doc = "Counter enabled"]
36 #[inline(always)]
37 pub fn is_value_1(&self) -> bool {
38 *self == Enableselect::Value1
39 }
40}
41#[doc = "Field `ENABLE` writer - SysTick Counter Enable"]
42pub type EnableW<'a, REG> = crate::BitWriter<'a, REG, Enableselect>;
43impl<'a, REG> EnableW<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "Counter disabled"]
48 #[inline(always)]
49 pub fn value_0(self) -> &'a mut crate::W<REG> {
50 self.variant(Enableselect::Value0)
51 }
52 #[doc = "Counter enabled"]
53 #[inline(always)]
54 pub fn value_1(self) -> &'a mut crate::W<REG> {
55 self.variant(Enableselect::Value1)
56 }
57}
58#[doc = "SysTick Exception Request Enable\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum Tickintselect {
61 #[doc = "0: Counting down to 0 does not assert the SysTick exception request"]
62 Value0 = 0,
63 #[doc = "1: Counting down to 0 asserts the SysTick exception request"]
64 Value1 = 1,
65}
66impl From<Tickintselect> for bool {
67 #[inline(always)]
68 fn from(variant: Tickintselect) -> Self {
69 variant as u8 != 0
70 }
71}
72#[doc = "Field `TICKINT` reader - SysTick Exception Request Enable"]
73pub type TickintR = crate::BitReader<Tickintselect>;
74impl TickintR {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub const fn variant(&self) -> Tickintselect {
78 match self.bits {
79 false => Tickintselect::Value0,
80 true => Tickintselect::Value1,
81 }
82 }
83 #[doc = "Counting down to 0 does not assert the SysTick exception request"]
84 #[inline(always)]
85 pub fn is_value_0(&self) -> bool {
86 *self == Tickintselect::Value0
87 }
88 #[doc = "Counting down to 0 asserts the SysTick exception request"]
89 #[inline(always)]
90 pub fn is_value_1(&self) -> bool {
91 *self == Tickintselect::Value1
92 }
93}
94#[doc = "Field `TICKINT` writer - SysTick Exception Request Enable"]
95pub type TickintW<'a, REG> = crate::BitWriter<'a, REG, Tickintselect>;
96impl<'a, REG> TickintW<'a, REG>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "Counting down to 0 does not assert the SysTick exception request"]
101 #[inline(always)]
102 pub fn value_0(self) -> &'a mut crate::W<REG> {
103 self.variant(Tickintselect::Value0)
104 }
105 #[doc = "Counting down to 0 asserts the SysTick exception request"]
106 #[inline(always)]
107 pub fn value_1(self) -> &'a mut crate::W<REG> {
108 self.variant(Tickintselect::Value1)
109 }
110}
111#[doc = "Clock Source 0=external, 1=processor\n\nValue on reset: 1"]
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113pub enum Clksourceselect {
114 #[doc = "0: External clock"]
115 Value0 = 0,
116 #[doc = "1: Processor clock"]
117 Value1 = 1,
118}
119impl From<Clksourceselect> for bool {
120 #[inline(always)]
121 fn from(variant: Clksourceselect) -> Self {
122 variant as u8 != 0
123 }
124}
125#[doc = "Field `CLKSOURCE` reader - Clock Source 0=external, 1=processor"]
126pub type ClksourceR = crate::BitReader<Clksourceselect>;
127impl ClksourceR {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub const fn variant(&self) -> Clksourceselect {
131 match self.bits {
132 false => Clksourceselect::Value0,
133 true => Clksourceselect::Value1,
134 }
135 }
136 #[doc = "External clock"]
137 #[inline(always)]
138 pub fn is_value_0(&self) -> bool {
139 *self == Clksourceselect::Value0
140 }
141 #[doc = "Processor clock"]
142 #[inline(always)]
143 pub fn is_value_1(&self) -> bool {
144 *self == Clksourceselect::Value1
145 }
146}
147#[doc = "Field `CLKSOURCE` writer - Clock Source 0=external, 1=processor"]
148pub type ClksourceW<'a, REG> = crate::BitWriter<'a, REG, Clksourceselect>;
149impl<'a, REG> ClksourceW<'a, REG>
150where
151 REG: crate::Writable + crate::RegisterSpec,
152{
153 #[doc = "External clock"]
154 #[inline(always)]
155 pub fn value_0(self) -> &'a mut crate::W<REG> {
156 self.variant(Clksourceselect::Value0)
157 }
158 #[doc = "Processor clock"]
159 #[inline(always)]
160 pub fn value_1(self) -> &'a mut crate::W<REG> {
161 self.variant(Clksourceselect::Value1)
162 }
163}
164#[doc = "Field `COUNTFLAG` reader - Timer counted to 0 since last read of register"]
165pub type CountflagR = crate::BitReader;
166#[doc = "Field `COUNTFLAG` writer - Timer counted to 0 since last read of register"]
167pub type CountflagW<'a, REG> = crate::BitWriter<'a, REG>;
168impl R {
169 #[doc = "Bit 0 - SysTick Counter Enable"]
170 #[inline(always)]
171 pub fn enable(&self) -> EnableR {
172 EnableR::new((self.bits & 1) != 0)
173 }
174 #[doc = "Bit 1 - SysTick Exception Request Enable"]
175 #[inline(always)]
176 pub fn tickint(&self) -> TickintR {
177 TickintR::new(((self.bits >> 1) & 1) != 0)
178 }
179 #[doc = "Bit 2 - Clock Source 0=external, 1=processor"]
180 #[inline(always)]
181 pub fn clksource(&self) -> ClksourceR {
182 ClksourceR::new(((self.bits >> 2) & 1) != 0)
183 }
184 #[doc = "Bit 16 - Timer counted to 0 since last read of register"]
185 #[inline(always)]
186 pub fn countflag(&self) -> CountflagR {
187 CountflagR::new(((self.bits >> 16) & 1) != 0)
188 }
189}
190impl W {
191 #[doc = "Bit 0 - SysTick Counter Enable"]
192 #[inline(always)]
193 #[must_use]
194 pub fn enable(&mut self) -> EnableW<CsrSpec> {
195 EnableW::new(self, 0)
196 }
197 #[doc = "Bit 1 - SysTick Exception Request Enable"]
198 #[inline(always)]
199 #[must_use]
200 pub fn tickint(&mut self) -> TickintW<CsrSpec> {
201 TickintW::new(self, 1)
202 }
203 #[doc = "Bit 2 - Clock Source 0=external, 1=processor"]
204 #[inline(always)]
205 #[must_use]
206 pub fn clksource(&mut self) -> ClksourceW<CsrSpec> {
207 ClksourceW::new(self, 2)
208 }
209 #[doc = "Bit 16 - Timer counted to 0 since last read of register"]
210 #[inline(always)]
211 #[must_use]
212 pub fn countflag(&mut self) -> CountflagW<CsrSpec> {
213 CountflagW::new(self, 16)
214 }
215}
216#[doc = "SysTick Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`csr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`csr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
217pub struct CsrSpec;
218impl crate::RegisterSpec for CsrSpec {
219 type Ux = u32;
220}
221#[doc = "`read()` method returns [`csr::R`](R) reader structure"]
222impl crate::Readable for CsrSpec {}
223#[doc = "`write(|w| ..)` method takes [`csr::W`](W) writer structure"]
224impl crate::Writable for CsrSpec {
225 type Safety = crate::Unsafe;
226 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
227 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
228}
229#[doc = "`reset()` method sets CSR to value 0x04"]
230impl crate::Resettable for CsrSpec {
231 const RESET_VALUE: u32 = 0x04;
232}