atsamd51g/pac/
intflagc.rs

1#[doc = "Register `INTFLAGC` reader"]
2pub type R = crate::R<IntflagcSpec>;
3#[doc = "Register `INTFLAGC` writer"]
4pub type W = crate::W<IntflagcSpec>;
5#[doc = "Field `TCC2_` reader - TCC2"]
6pub type Tcc2_R = crate::BitReader;
7#[doc = "Field `TCC2_` writer - TCC2"]
8pub type Tcc2_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PDEC_` reader - PDEC"]
10pub type Pdec_R = crate::BitReader;
11#[doc = "Field `PDEC_` writer - PDEC"]
12pub type Pdec_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `AC_` reader - AC"]
14pub type Ac_R = crate::BitReader;
15#[doc = "Field `AC_` writer - AC"]
16pub type Ac_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `AES_` reader - AES"]
18pub type Aes_R = crate::BitReader;
19#[doc = "Field `AES_` writer - AES"]
20pub type Aes_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `TRNG_` reader - TRNG"]
22pub type Trng_R = crate::BitReader;
23#[doc = "Field `TRNG_` writer - TRNG"]
24pub type Trng_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ICM_` reader - ICM"]
26pub type Icm_R = crate::BitReader;
27#[doc = "Field `ICM_` writer - ICM"]
28pub type Icm_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `PUKCC_` reader - PUKCC"]
30pub type Pukcc_R = crate::BitReader;
31#[doc = "Field `PUKCC_` writer - PUKCC"]
32pub type Pukcc_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `QSPI_` reader - QSPI"]
34pub type Qspi_R = crate::BitReader;
35#[doc = "Field `QSPI_` writer - QSPI"]
36pub type Qspi_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `CCL_` reader - CCL"]
38pub type Ccl_R = crate::BitReader;
39#[doc = "Field `CCL_` writer - CCL"]
40pub type Ccl_W<'a, REG> = crate::BitWriter<'a, REG>;
41impl R {
42    #[doc = "Bit 3 - TCC2"]
43    #[inline(always)]
44    pub fn tcc2_(&self) -> Tcc2_R {
45        Tcc2_R::new(((self.bits >> 3) & 1) != 0)
46    }
47    #[doc = "Bit 7 - PDEC"]
48    #[inline(always)]
49    pub fn pdec_(&self) -> Pdec_R {
50        Pdec_R::new(((self.bits >> 7) & 1) != 0)
51    }
52    #[doc = "Bit 8 - AC"]
53    #[inline(always)]
54    pub fn ac_(&self) -> Ac_R {
55        Ac_R::new(((self.bits >> 8) & 1) != 0)
56    }
57    #[doc = "Bit 9 - AES"]
58    #[inline(always)]
59    pub fn aes_(&self) -> Aes_R {
60        Aes_R::new(((self.bits >> 9) & 1) != 0)
61    }
62    #[doc = "Bit 10 - TRNG"]
63    #[inline(always)]
64    pub fn trng_(&self) -> Trng_R {
65        Trng_R::new(((self.bits >> 10) & 1) != 0)
66    }
67    #[doc = "Bit 11 - ICM"]
68    #[inline(always)]
69    pub fn icm_(&self) -> Icm_R {
70        Icm_R::new(((self.bits >> 11) & 1) != 0)
71    }
72    #[doc = "Bit 12 - PUKCC"]
73    #[inline(always)]
74    pub fn pukcc_(&self) -> Pukcc_R {
75        Pukcc_R::new(((self.bits >> 12) & 1) != 0)
76    }
77    #[doc = "Bit 13 - QSPI"]
78    #[inline(always)]
79    pub fn qspi_(&self) -> Qspi_R {
80        Qspi_R::new(((self.bits >> 13) & 1) != 0)
81    }
82    #[doc = "Bit 14 - CCL"]
83    #[inline(always)]
84    pub fn ccl_(&self) -> Ccl_R {
85        Ccl_R::new(((self.bits >> 14) & 1) != 0)
86    }
87}
88impl W {
89    #[doc = "Bit 3 - TCC2"]
90    #[inline(always)]
91    #[must_use]
92    pub fn tcc2_(&mut self) -> Tcc2_W<IntflagcSpec> {
93        Tcc2_W::new(self, 3)
94    }
95    #[doc = "Bit 7 - PDEC"]
96    #[inline(always)]
97    #[must_use]
98    pub fn pdec_(&mut self) -> Pdec_W<IntflagcSpec> {
99        Pdec_W::new(self, 7)
100    }
101    #[doc = "Bit 8 - AC"]
102    #[inline(always)]
103    #[must_use]
104    pub fn ac_(&mut self) -> Ac_W<IntflagcSpec> {
105        Ac_W::new(self, 8)
106    }
107    #[doc = "Bit 9 - AES"]
108    #[inline(always)]
109    #[must_use]
110    pub fn aes_(&mut self) -> Aes_W<IntflagcSpec> {
111        Aes_W::new(self, 9)
112    }
113    #[doc = "Bit 10 - TRNG"]
114    #[inline(always)]
115    #[must_use]
116    pub fn trng_(&mut self) -> Trng_W<IntflagcSpec> {
117        Trng_W::new(self, 10)
118    }
119    #[doc = "Bit 11 - ICM"]
120    #[inline(always)]
121    #[must_use]
122    pub fn icm_(&mut self) -> Icm_W<IntflagcSpec> {
123        Icm_W::new(self, 11)
124    }
125    #[doc = "Bit 12 - PUKCC"]
126    #[inline(always)]
127    #[must_use]
128    pub fn pukcc_(&mut self) -> Pukcc_W<IntflagcSpec> {
129        Pukcc_W::new(self, 12)
130    }
131    #[doc = "Bit 13 - QSPI"]
132    #[inline(always)]
133    #[must_use]
134    pub fn qspi_(&mut self) -> Qspi_W<IntflagcSpec> {
135        Qspi_W::new(self, 13)
136    }
137    #[doc = "Bit 14 - CCL"]
138    #[inline(always)]
139    #[must_use]
140    pub fn ccl_(&mut self) -> Ccl_W<IntflagcSpec> {
141        Ccl_W::new(self, 14)
142    }
143}
144#[doc = "Peripheral interrupt flag status - Bridge C\n\nYou can [`read`](crate::Reg::read) this register and get [`intflagc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intflagc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
145pub struct IntflagcSpec;
146impl crate::RegisterSpec for IntflagcSpec {
147    type Ux = u32;
148}
149#[doc = "`read()` method returns [`intflagc::R`](R) reader structure"]
150impl crate::Readable for IntflagcSpec {}
151#[doc = "`write(|w| ..)` method takes [`intflagc::W`](W) writer structure"]
152impl crate::Writable for IntflagcSpec {
153    type Safety = crate::Unsafe;
154    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
155    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
156}
157#[doc = "`reset()` method sets INTFLAGC to value 0"]
158impl crate::Resettable for IntflagcSpec {
159    const RESET_VALUE: u32 = 0;
160}
atsamd51g/pac/intflagc.rs

atsamd51g/pac/
intflagc.rs
