atsamd51g/sercom0/i2cm/
ctrla.rs

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1#[doc = "Register `CTRLA` reader"]
2pub type R = crate::R<CtrlaSpec>;
3#[doc = "Register `CTRLA` writer"]
4pub type W = crate::W<CtrlaSpec>;
5#[doc = "Field `SWRST` reader - Software Reset"]
6pub type SwrstR = crate::BitReader;
7#[doc = "Field `SWRST` writer - Software Reset"]
8pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ENABLE` reader - Enable"]
10pub type EnableR = crate::BitReader;
11#[doc = "Field `ENABLE` writer - Enable"]
12pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Operating Mode\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15#[repr(u8)]
16pub enum Modeselect {
17    #[doc = "0: USART with external clock"]
18    UsartExtClk = 0,
19    #[doc = "1: USART with internal clock"]
20    UsartIntClk = 1,
21    #[doc = "2: SPI in slave operation"]
22    SpiSlave = 2,
23    #[doc = "3: SPI in master operation"]
24    SpiMaster = 3,
25    #[doc = "4: I2C slave operation"]
26    I2cSlave = 4,
27    #[doc = "5: I2C master operation"]
28    I2cMaster = 5,
29}
30impl From<Modeselect> for u8 {
31    #[inline(always)]
32    fn from(variant: Modeselect) -> Self {
33        variant as _
34    }
35}
36impl crate::FieldSpec for Modeselect {
37    type Ux = u8;
38}
39impl crate::IsEnum for Modeselect {}
40#[doc = "Field `MODE` reader - Operating Mode"]
41pub type ModeR = crate::FieldReader<Modeselect>;
42impl ModeR {
43    #[doc = "Get enumerated values variant"]
44    #[inline(always)]
45    pub const fn variant(&self) -> Option<Modeselect> {
46        match self.bits {
47            0 => Some(Modeselect::UsartExtClk),
48            1 => Some(Modeselect::UsartIntClk),
49            2 => Some(Modeselect::SpiSlave),
50            3 => Some(Modeselect::SpiMaster),
51            4 => Some(Modeselect::I2cSlave),
52            5 => Some(Modeselect::I2cMaster),
53            _ => None,
54        }
55    }
56    #[doc = "USART with external clock"]
57    #[inline(always)]
58    pub fn is_usart_ext_clk(&self) -> bool {
59        *self == Modeselect::UsartExtClk
60    }
61    #[doc = "USART with internal clock"]
62    #[inline(always)]
63    pub fn is_usart_int_clk(&self) -> bool {
64        *self == Modeselect::UsartIntClk
65    }
66    #[doc = "SPI in slave operation"]
67    #[inline(always)]
68    pub fn is_spi_slave(&self) -> bool {
69        *self == Modeselect::SpiSlave
70    }
71    #[doc = "SPI in master operation"]
72    #[inline(always)]
73    pub fn is_spi_master(&self) -> bool {
74        *self == Modeselect::SpiMaster
75    }
76    #[doc = "I2C slave operation"]
77    #[inline(always)]
78    pub fn is_i2c_slave(&self) -> bool {
79        *self == Modeselect::I2cSlave
80    }
81    #[doc = "I2C master operation"]
82    #[inline(always)]
83    pub fn is_i2c_master(&self) -> bool {
84        *self == Modeselect::I2cMaster
85    }
86}
87#[doc = "Field `MODE` writer - Operating Mode"]
88pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Modeselect>;
89impl<'a, REG> ModeW<'a, REG>
90where
91    REG: crate::Writable + crate::RegisterSpec,
92    REG::Ux: From<u8>,
93{
94    #[doc = "USART with external clock"]
95    #[inline(always)]
96    pub fn usart_ext_clk(self) -> &'a mut crate::W<REG> {
97        self.variant(Modeselect::UsartExtClk)
98    }
99    #[doc = "USART with internal clock"]
100    #[inline(always)]
101    pub fn usart_int_clk(self) -> &'a mut crate::W<REG> {
102        self.variant(Modeselect::UsartIntClk)
103    }
104    #[doc = "SPI in slave operation"]
105    #[inline(always)]
106    pub fn spi_slave(self) -> &'a mut crate::W<REG> {
107        self.variant(Modeselect::SpiSlave)
108    }
109    #[doc = "SPI in master operation"]
110    #[inline(always)]
111    pub fn spi_master(self) -> &'a mut crate::W<REG> {
112        self.variant(Modeselect::SpiMaster)
113    }
114    #[doc = "I2C slave operation"]
115    #[inline(always)]
116    pub fn i2c_slave(self) -> &'a mut crate::W<REG> {
117        self.variant(Modeselect::I2cSlave)
118    }
119    #[doc = "I2C master operation"]
120    #[inline(always)]
121    pub fn i2c_master(self) -> &'a mut crate::W<REG> {
122        self.variant(Modeselect::I2cMaster)
123    }
124}
125#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
126pub type RunstdbyR = crate::BitReader;
127#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
128pub type RunstdbyW<'a, REG> = crate::BitWriter<'a, REG>;
129#[doc = "Field `PINOUT` reader - Pin Usage"]
130pub type PinoutR = crate::BitReader;
131#[doc = "Field `PINOUT` writer - Pin Usage"]
132pub type PinoutW<'a, REG> = crate::BitWriter<'a, REG>;
133#[doc = "SDA Hold Time\n\nValue on reset: 0"]
134#[derive(Clone, Copy, Debug, PartialEq, Eq)]
135#[repr(u8)]
136pub enum Sdaholdselect {
137    #[doc = "0: Disabled"]
138    Disable = 0,
139    #[doc = "1: 50-100ns hold time"]
140    _75ns = 1,
141    #[doc = "2: 300-600ns hold time"]
142    _450ns = 2,
143    #[doc = "3: 400-800ns hold time"]
144    _600ns = 3,
145}
146impl From<Sdaholdselect> for u8 {
147    #[inline(always)]
148    fn from(variant: Sdaholdselect) -> Self {
149        variant as _
150    }
151}
152impl crate::FieldSpec for Sdaholdselect {
153    type Ux = u8;
154}
155impl crate::IsEnum for Sdaholdselect {}
156#[doc = "Field `SDAHOLD` reader - SDA Hold Time"]
157pub type SdaholdR = crate::FieldReader<Sdaholdselect>;
158impl SdaholdR {
159    #[doc = "Get enumerated values variant"]
160    #[inline(always)]
161    pub const fn variant(&self) -> Sdaholdselect {
162        match self.bits {
163            0 => Sdaholdselect::Disable,
164            1 => Sdaholdselect::_75ns,
165            2 => Sdaholdselect::_450ns,
166            3 => Sdaholdselect::_600ns,
167            _ => unreachable!(),
168        }
169    }
170    #[doc = "Disabled"]
171    #[inline(always)]
172    pub fn is_disable(&self) -> bool {
173        *self == Sdaholdselect::Disable
174    }
175    #[doc = "50-100ns hold time"]
176    #[inline(always)]
177    pub fn is_75ns(&self) -> bool {
178        *self == Sdaholdselect::_75ns
179    }
180    #[doc = "300-600ns hold time"]
181    #[inline(always)]
182    pub fn is_450ns(&self) -> bool {
183        *self == Sdaholdselect::_450ns
184    }
185    #[doc = "400-800ns hold time"]
186    #[inline(always)]
187    pub fn is_600ns(&self) -> bool {
188        *self == Sdaholdselect::_600ns
189    }
190}
191#[doc = "Field `SDAHOLD` writer - SDA Hold Time"]
192pub type SdaholdW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sdaholdselect, crate::Safe>;
193impl<'a, REG> SdaholdW<'a, REG>
194where
195    REG: crate::Writable + crate::RegisterSpec,
196    REG::Ux: From<u8>,
197{
198    #[doc = "Disabled"]
199    #[inline(always)]
200    pub fn disable(self) -> &'a mut crate::W<REG> {
201        self.variant(Sdaholdselect::Disable)
202    }
203    #[doc = "50-100ns hold time"]
204    #[inline(always)]
205    pub fn _75ns(self) -> &'a mut crate::W<REG> {
206        self.variant(Sdaholdselect::_75ns)
207    }
208    #[doc = "300-600ns hold time"]
209    #[inline(always)]
210    pub fn _450ns(self) -> &'a mut crate::W<REG> {
211        self.variant(Sdaholdselect::_450ns)
212    }
213    #[doc = "400-800ns hold time"]
214    #[inline(always)]
215    pub fn _600ns(self) -> &'a mut crate::W<REG> {
216        self.variant(Sdaholdselect::_600ns)
217    }
218}
219#[doc = "Field `MEXTTOEN` reader - Master SCL Low Extend Timeout"]
220pub type MexttoenR = crate::BitReader;
221#[doc = "Field `MEXTTOEN` writer - Master SCL Low Extend Timeout"]
222pub type MexttoenW<'a, REG> = crate::BitWriter<'a, REG>;
223#[doc = "Field `SEXTTOEN` reader - Slave SCL Low Extend Timeout"]
224pub type SexttoenR = crate::BitReader;
225#[doc = "Field `SEXTTOEN` writer - Slave SCL Low Extend Timeout"]
226pub type SexttoenW<'a, REG> = crate::BitWriter<'a, REG>;
227#[doc = "Transfer Speed\n\nValue on reset: 0"]
228#[derive(Clone, Copy, Debug, PartialEq, Eq)]
229#[repr(u8)]
230pub enum Speedselect {
231    #[doc = "0: Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz"]
232    StandardAndFastMode = 0,
233    #[doc = "1: Fast-mode Plus Upto 1MHz"]
234    FastplusMode = 1,
235    #[doc = "2: High-speed mode Upto 3.4MHz"]
236    HighSpeedMode = 2,
237}
238impl From<Speedselect> for u8 {
239    #[inline(always)]
240    fn from(variant: Speedselect) -> Self {
241        variant as _
242    }
243}
244impl crate::FieldSpec for Speedselect {
245    type Ux = u8;
246}
247impl crate::IsEnum for Speedselect {}
248#[doc = "Field `SPEED` reader - Transfer Speed"]
249pub type SpeedR = crate::FieldReader<Speedselect>;
250impl SpeedR {
251    #[doc = "Get enumerated values variant"]
252    #[inline(always)]
253    pub const fn variant(&self) -> Option<Speedselect> {
254        match self.bits {
255            0 => Some(Speedselect::StandardAndFastMode),
256            1 => Some(Speedselect::FastplusMode),
257            2 => Some(Speedselect::HighSpeedMode),
258            _ => None,
259        }
260    }
261    #[doc = "Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz"]
262    #[inline(always)]
263    pub fn is_standard_and_fast_mode(&self) -> bool {
264        *self == Speedselect::StandardAndFastMode
265    }
266    #[doc = "Fast-mode Plus Upto 1MHz"]
267    #[inline(always)]
268    pub fn is_fastplus_mode(&self) -> bool {
269        *self == Speedselect::FastplusMode
270    }
271    #[doc = "High-speed mode Upto 3.4MHz"]
272    #[inline(always)]
273    pub fn is_high_speed_mode(&self) -> bool {
274        *self == Speedselect::HighSpeedMode
275    }
276}
277#[doc = "Field `SPEED` writer - Transfer Speed"]
278pub type SpeedW<'a, REG> = crate::FieldWriter<'a, REG, 2, Speedselect>;
279impl<'a, REG> SpeedW<'a, REG>
280where
281    REG: crate::Writable + crate::RegisterSpec,
282    REG::Ux: From<u8>,
283{
284    #[doc = "Standard Mode(Sm) Upto 100kHz and Fast Mode(Fm) Upto 400kHz"]
285    #[inline(always)]
286    pub fn standard_and_fast_mode(self) -> &'a mut crate::W<REG> {
287        self.variant(Speedselect::StandardAndFastMode)
288    }
289    #[doc = "Fast-mode Plus Upto 1MHz"]
290    #[inline(always)]
291    pub fn fastplus_mode(self) -> &'a mut crate::W<REG> {
292        self.variant(Speedselect::FastplusMode)
293    }
294    #[doc = "High-speed mode Upto 3.4MHz"]
295    #[inline(always)]
296    pub fn high_speed_mode(self) -> &'a mut crate::W<REG> {
297        self.variant(Speedselect::HighSpeedMode)
298    }
299}
300#[doc = "Field `SCLSM` reader - SCL Clock Stretch Mode"]
301pub type SclsmR = crate::BitReader;
302#[doc = "Field `SCLSM` writer - SCL Clock Stretch Mode"]
303pub type SclsmW<'a, REG> = crate::BitWriter<'a, REG>;
304#[doc = "Inactive Time-Out\n\nValue on reset: 0"]
305#[derive(Clone, Copy, Debug, PartialEq, Eq)]
306#[repr(u8)]
307pub enum Inactoutselect {
308    #[doc = "0: Disabled"]
309    Disable = 0,
310    #[doc = "1: 5-6 SCL Time-Out(50-60us)"]
311    _55us = 1,
312    #[doc = "2: 10-11 SCL Time-Out(100-110us)"]
313    _105us = 2,
314    #[doc = "3: 20-21 SCL Time-Out(200-210us)"]
315    _205us = 3,
316}
317impl From<Inactoutselect> for u8 {
318    #[inline(always)]
319    fn from(variant: Inactoutselect) -> Self {
320        variant as _
321    }
322}
323impl crate::FieldSpec for Inactoutselect {
324    type Ux = u8;
325}
326impl crate::IsEnum for Inactoutselect {}
327#[doc = "Field `INACTOUT` reader - Inactive Time-Out"]
328pub type InactoutR = crate::FieldReader<Inactoutselect>;
329impl InactoutR {
330    #[doc = "Get enumerated values variant"]
331    #[inline(always)]
332    pub const fn variant(&self) -> Inactoutselect {
333        match self.bits {
334            0 => Inactoutselect::Disable,
335            1 => Inactoutselect::_55us,
336            2 => Inactoutselect::_105us,
337            3 => Inactoutselect::_205us,
338            _ => unreachable!(),
339        }
340    }
341    #[doc = "Disabled"]
342    #[inline(always)]
343    pub fn is_disable(&self) -> bool {
344        *self == Inactoutselect::Disable
345    }
346    #[doc = "5-6 SCL Time-Out(50-60us)"]
347    #[inline(always)]
348    pub fn is_55us(&self) -> bool {
349        *self == Inactoutselect::_55us
350    }
351    #[doc = "10-11 SCL Time-Out(100-110us)"]
352    #[inline(always)]
353    pub fn is_105us(&self) -> bool {
354        *self == Inactoutselect::_105us
355    }
356    #[doc = "20-21 SCL Time-Out(200-210us)"]
357    #[inline(always)]
358    pub fn is_205us(&self) -> bool {
359        *self == Inactoutselect::_205us
360    }
361}
362#[doc = "Field `INACTOUT` writer - Inactive Time-Out"]
363pub type InactoutW<'a, REG> = crate::FieldWriter<'a, REG, 2, Inactoutselect, crate::Safe>;
364impl<'a, REG> InactoutW<'a, REG>
365where
366    REG: crate::Writable + crate::RegisterSpec,
367    REG::Ux: From<u8>,
368{
369    #[doc = "Disabled"]
370    #[inline(always)]
371    pub fn disable(self) -> &'a mut crate::W<REG> {
372        self.variant(Inactoutselect::Disable)
373    }
374    #[doc = "5-6 SCL Time-Out(50-60us)"]
375    #[inline(always)]
376    pub fn _55us(self) -> &'a mut crate::W<REG> {
377        self.variant(Inactoutselect::_55us)
378    }
379    #[doc = "10-11 SCL Time-Out(100-110us)"]
380    #[inline(always)]
381    pub fn _105us(self) -> &'a mut crate::W<REG> {
382        self.variant(Inactoutselect::_105us)
383    }
384    #[doc = "20-21 SCL Time-Out(200-210us)"]
385    #[inline(always)]
386    pub fn _205us(self) -> &'a mut crate::W<REG> {
387        self.variant(Inactoutselect::_205us)
388    }
389}
390#[doc = "Field `LOWTOUTEN` reader - SCL Low Timeout Enable"]
391pub type LowtoutenR = crate::BitReader;
392#[doc = "Field `LOWTOUTEN` writer - SCL Low Timeout Enable"]
393pub type LowtoutenW<'a, REG> = crate::BitWriter<'a, REG>;
394impl R {
395    #[doc = "Bit 0 - Software Reset"]
396    #[inline(always)]
397    pub fn swrst(&self) -> SwrstR {
398        SwrstR::new((self.bits & 1) != 0)
399    }
400    #[doc = "Bit 1 - Enable"]
401    #[inline(always)]
402    pub fn enable(&self) -> EnableR {
403        EnableR::new(((self.bits >> 1) & 1) != 0)
404    }
405    #[doc = "Bits 2:4 - Operating Mode"]
406    #[inline(always)]
407    pub fn mode(&self) -> ModeR {
408        ModeR::new(((self.bits >> 2) & 7) as u8)
409    }
410    #[doc = "Bit 7 - Run in Standby"]
411    #[inline(always)]
412    pub fn runstdby(&self) -> RunstdbyR {
413        RunstdbyR::new(((self.bits >> 7) & 1) != 0)
414    }
415    #[doc = "Bit 16 - Pin Usage"]
416    #[inline(always)]
417    pub fn pinout(&self) -> PinoutR {
418        PinoutR::new(((self.bits >> 16) & 1) != 0)
419    }
420    #[doc = "Bits 20:21 - SDA Hold Time"]
421    #[inline(always)]
422    pub fn sdahold(&self) -> SdaholdR {
423        SdaholdR::new(((self.bits >> 20) & 3) as u8)
424    }
425    #[doc = "Bit 22 - Master SCL Low Extend Timeout"]
426    #[inline(always)]
427    pub fn mexttoen(&self) -> MexttoenR {
428        MexttoenR::new(((self.bits >> 22) & 1) != 0)
429    }
430    #[doc = "Bit 23 - Slave SCL Low Extend Timeout"]
431    #[inline(always)]
432    pub fn sexttoen(&self) -> SexttoenR {
433        SexttoenR::new(((self.bits >> 23) & 1) != 0)
434    }
435    #[doc = "Bits 24:25 - Transfer Speed"]
436    #[inline(always)]
437    pub fn speed(&self) -> SpeedR {
438        SpeedR::new(((self.bits >> 24) & 3) as u8)
439    }
440    #[doc = "Bit 27 - SCL Clock Stretch Mode"]
441    #[inline(always)]
442    pub fn sclsm(&self) -> SclsmR {
443        SclsmR::new(((self.bits >> 27) & 1) != 0)
444    }
445    #[doc = "Bits 28:29 - Inactive Time-Out"]
446    #[inline(always)]
447    pub fn inactout(&self) -> InactoutR {
448        InactoutR::new(((self.bits >> 28) & 3) as u8)
449    }
450    #[doc = "Bit 30 - SCL Low Timeout Enable"]
451    #[inline(always)]
452    pub fn lowtouten(&self) -> LowtoutenR {
453        LowtoutenR::new(((self.bits >> 30) & 1) != 0)
454    }
455}
456impl W {
457    #[doc = "Bit 0 - Software Reset"]
458    #[inline(always)]
459    #[must_use]
460    pub fn swrst(&mut self) -> SwrstW<CtrlaSpec> {
461        SwrstW::new(self, 0)
462    }
463    #[doc = "Bit 1 - Enable"]
464    #[inline(always)]
465    #[must_use]
466    pub fn enable(&mut self) -> EnableW<CtrlaSpec> {
467        EnableW::new(self, 1)
468    }
469    #[doc = "Bits 2:4 - Operating Mode"]
470    #[inline(always)]
471    #[must_use]
472    pub fn mode(&mut self) -> ModeW<CtrlaSpec> {
473        ModeW::new(self, 2)
474    }
475    #[doc = "Bit 7 - Run in Standby"]
476    #[inline(always)]
477    #[must_use]
478    pub fn runstdby(&mut self) -> RunstdbyW<CtrlaSpec> {
479        RunstdbyW::new(self, 7)
480    }
481    #[doc = "Bit 16 - Pin Usage"]
482    #[inline(always)]
483    #[must_use]
484    pub fn pinout(&mut self) -> PinoutW<CtrlaSpec> {
485        PinoutW::new(self, 16)
486    }
487    #[doc = "Bits 20:21 - SDA Hold Time"]
488    #[inline(always)]
489    #[must_use]
490    pub fn sdahold(&mut self) -> SdaholdW<CtrlaSpec> {
491        SdaholdW::new(self, 20)
492    }
493    #[doc = "Bit 22 - Master SCL Low Extend Timeout"]
494    #[inline(always)]
495    #[must_use]
496    pub fn mexttoen(&mut self) -> MexttoenW<CtrlaSpec> {
497        MexttoenW::new(self, 22)
498    }
499    #[doc = "Bit 23 - Slave SCL Low Extend Timeout"]
500    #[inline(always)]
501    #[must_use]
502    pub fn sexttoen(&mut self) -> SexttoenW<CtrlaSpec> {
503        SexttoenW::new(self, 23)
504    }
505    #[doc = "Bits 24:25 - Transfer Speed"]
506    #[inline(always)]
507    #[must_use]
508    pub fn speed(&mut self) -> SpeedW<CtrlaSpec> {
509        SpeedW::new(self, 24)
510    }
511    #[doc = "Bit 27 - SCL Clock Stretch Mode"]
512    #[inline(always)]
513    #[must_use]
514    pub fn sclsm(&mut self) -> SclsmW<CtrlaSpec> {
515        SclsmW::new(self, 27)
516    }
517    #[doc = "Bits 28:29 - Inactive Time-Out"]
518    #[inline(always)]
519    #[must_use]
520    pub fn inactout(&mut self) -> InactoutW<CtrlaSpec> {
521        InactoutW::new(self, 28)
522    }
523    #[doc = "Bit 30 - SCL Low Timeout Enable"]
524    #[inline(always)]
525    #[must_use]
526    pub fn lowtouten(&mut self) -> LowtoutenW<CtrlaSpec> {
527        LowtoutenW::new(self, 30)
528    }
529}
530#[doc = "I2CM Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrla::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrla::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
531pub struct CtrlaSpec;
532impl crate::RegisterSpec for CtrlaSpec {
533    type Ux = u32;
534}
535#[doc = "`read()` method returns [`ctrla::R`](R) reader structure"]
536impl crate::Readable for CtrlaSpec {}
537#[doc = "`write(|w| ..)` method takes [`ctrla::W`](W) writer structure"]
538impl crate::Writable for CtrlaSpec {
539    type Safety = crate::Unsafe;
540    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
541    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
542}
543#[doc = "`reset()` method sets CTRLA to value 0"]
544impl crate::Resettable for CtrlaSpec {
545    const RESET_VALUE: u32 = 0;
546}
atsamd51g/sercom0/i2cm/ctrla.rs

atsamd51g/sercom0/i2cm/
ctrla.rs
