atsamd51g/usb/host/host_pipe/
binterval.rs

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1#[doc = "Register `BINTERVAL` reader"]
2pub type R = crate::R<BintervalSpec>;
3#[doc = "Register `BINTERVAL` writer"]
4pub type W = crate::W<BintervalSpec>;
5#[doc = "Field `BITINTERVAL` reader - Bit Interval"]
6pub type BitintervalR = crate::FieldReader;
7#[doc = "Field `BITINTERVAL` writer - Bit Interval"]
8pub type BitintervalW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9impl R {
10    #[doc = "Bits 0:7 - Bit Interval"]
11    #[inline(always)]
12    pub fn bitinterval(&self) -> BitintervalR {
13        BitintervalR::new(self.bits)
14    }
15}
16impl W {
17    #[doc = "Bits 0:7 - Bit Interval"]
18    #[inline(always)]
19    #[must_use]
20    pub fn bitinterval(&mut self) -> BitintervalW<BintervalSpec> {
21        BitintervalW::new(self, 0)
22    }
23}
24#[doc = "HOST_PIPE Bus Access Period of Pipe\n\nYou can [`read`](crate::Reg::read) this register and get [`binterval::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`binterval::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
25pub struct BintervalSpec;
26impl crate::RegisterSpec for BintervalSpec {
27    type Ux = u8;
28}
29#[doc = "`read()` method returns [`binterval::R`](R) reader structure"]
30impl crate::Readable for BintervalSpec {}
31#[doc = "`write(|w| ..)` method takes [`binterval::W`](W) writer structure"]
32impl crate::Writable for BintervalSpec {
33    type Safety = crate::Unsafe;
34    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
35    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
36}
37#[doc = "`reset()` method sets BINTERVAL to value 0"]
38impl crate::Resettable for BintervalSpec {
39    const RESET_VALUE: u8 = 0;
40}
atsamd51g/usb/host/host_pipe/binterval.rs

atsamd51g/usb/host/host_pipe/
binterval.rs
