atsamd51g/eic/
dprescaler.rs

Help
1#[doc = "Register `DPRESCALER` reader"]
2pub type R = crate::R<DprescalerSpec>;
3#[doc = "Register `DPRESCALER` writer"]
4pub type W = crate::W<DprescalerSpec>;
5#[doc = "Debouncer Prescaler\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Prescaler0select {
9    #[doc = "0: EIC clock divided by 2"]
10    Div2 = 0,
11    #[doc = "1: EIC clock divided by 4"]
12    Div4 = 1,
13    #[doc = "2: EIC clock divided by 8"]
14    Div8 = 2,
15    #[doc = "3: EIC clock divided by 16"]
16    Div16 = 3,
17    #[doc = "4: EIC clock divided by 32"]
18    Div32 = 4,
19    #[doc = "5: EIC clock divided by 64"]
20    Div64 = 5,
21    #[doc = "6: EIC clock divided by 128"]
22    Div128 = 6,
23    #[doc = "7: EIC clock divided by 256"]
24    Div256 = 7,
25}
26impl From<Prescaler0select> for u8 {
27    #[inline(always)]
28    fn from(variant: Prescaler0select) -> Self {
29        variant as _
30    }
31}
32impl crate::FieldSpec for Prescaler0select {
33    type Ux = u8;
34}
35impl crate::IsEnum for Prescaler0select {}
36#[doc = "Field `PRESCALER0` reader - Debouncer Prescaler"]
37pub type Prescaler0R = crate::FieldReader<Prescaler0select>;
38impl Prescaler0R {
39    #[doc = "Get enumerated values variant"]
40    #[inline(always)]
41    pub const fn variant(&self) -> Prescaler0select {
42        match self.bits {
43            0 => Prescaler0select::Div2,
44            1 => Prescaler0select::Div4,
45            2 => Prescaler0select::Div8,
46            3 => Prescaler0select::Div16,
47            4 => Prescaler0select::Div32,
48            5 => Prescaler0select::Div64,
49            6 => Prescaler0select::Div128,
50            7 => Prescaler0select::Div256,
51            _ => unreachable!(),
52        }
53    }
54    #[doc = "EIC clock divided by 2"]
55    #[inline(always)]
56    pub fn is_div2(&self) -> bool {
57        *self == Prescaler0select::Div2
58    }
59    #[doc = "EIC clock divided by 4"]
60    #[inline(always)]
61    pub fn is_div4(&self) -> bool {
62        *self == Prescaler0select::Div4
63    }
64    #[doc = "EIC clock divided by 8"]
65    #[inline(always)]
66    pub fn is_div8(&self) -> bool {
67        *self == Prescaler0select::Div8
68    }
69    #[doc = "EIC clock divided by 16"]
70    #[inline(always)]
71    pub fn is_div16(&self) -> bool {
72        *self == Prescaler0select::Div16
73    }
74    #[doc = "EIC clock divided by 32"]
75    #[inline(always)]
76    pub fn is_div32(&self) -> bool {
77        *self == Prescaler0select::Div32
78    }
79    #[doc = "EIC clock divided by 64"]
80    #[inline(always)]
81    pub fn is_div64(&self) -> bool {
82        *self == Prescaler0select::Div64
83    }
84    #[doc = "EIC clock divided by 128"]
85    #[inline(always)]
86    pub fn is_div128(&self) -> bool {
87        *self == Prescaler0select::Div128
88    }
89    #[doc = "EIC clock divided by 256"]
90    #[inline(always)]
91    pub fn is_div256(&self) -> bool {
92        *self == Prescaler0select::Div256
93    }
94}
95#[doc = "Field `PRESCALER0` writer - Debouncer Prescaler"]
96pub type Prescaler0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Prescaler0select, crate::Safe>;
97impl<'a, REG> Prescaler0W<'a, REG>
98where
99    REG: crate::Writable + crate::RegisterSpec,
100    REG::Ux: From<u8>,
101{
102    #[doc = "EIC clock divided by 2"]
103    #[inline(always)]
104    pub fn div2(self) -> &'a mut crate::W<REG> {
105        self.variant(Prescaler0select::Div2)
106    }
107    #[doc = "EIC clock divided by 4"]
108    #[inline(always)]
109    pub fn div4(self) -> &'a mut crate::W<REG> {
110        self.variant(Prescaler0select::Div4)
111    }
112    #[doc = "EIC clock divided by 8"]
113    #[inline(always)]
114    pub fn div8(self) -> &'a mut crate::W<REG> {
115        self.variant(Prescaler0select::Div8)
116    }
117    #[doc = "EIC clock divided by 16"]
118    #[inline(always)]
119    pub fn div16(self) -> &'a mut crate::W<REG> {
120        self.variant(Prescaler0select::Div16)
121    }
122    #[doc = "EIC clock divided by 32"]
123    #[inline(always)]
124    pub fn div32(self) -> &'a mut crate::W<REG> {
125        self.variant(Prescaler0select::Div32)
126    }
127    #[doc = "EIC clock divided by 64"]
128    #[inline(always)]
129    pub fn div64(self) -> &'a mut crate::W<REG> {
130        self.variant(Prescaler0select::Div64)
131    }
132    #[doc = "EIC clock divided by 128"]
133    #[inline(always)]
134    pub fn div128(self) -> &'a mut crate::W<REG> {
135        self.variant(Prescaler0select::Div128)
136    }
137    #[doc = "EIC clock divided by 256"]
138    #[inline(always)]
139    pub fn div256(self) -> &'a mut crate::W<REG> {
140        self.variant(Prescaler0select::Div256)
141    }
142}
143#[doc = "Debouncer number of states\n\nValue on reset: 0"]
144#[derive(Clone, Copy, Debug, PartialEq, Eq)]
145pub enum States0select {
146    #[doc = "0: 3 low frequency samples"]
147    Lfreq3 = 0,
148    #[doc = "1: 7 low frequency samples"]
149    Lfreq7 = 1,
150}
151impl From<States0select> for bool {
152    #[inline(always)]
153    fn from(variant: States0select) -> Self {
154        variant as u8 != 0
155    }
156}
157#[doc = "Field `STATES0` reader - Debouncer number of states"]
158pub type States0R = crate::BitReader<States0select>;
159impl States0R {
160    #[doc = "Get enumerated values variant"]
161    #[inline(always)]
162    pub const fn variant(&self) -> States0select {
163        match self.bits {
164            false => States0select::Lfreq3,
165            true => States0select::Lfreq7,
166        }
167    }
168    #[doc = "3 low frequency samples"]
169    #[inline(always)]
170    pub fn is_lfreq3(&self) -> bool {
171        *self == States0select::Lfreq3
172    }
173    #[doc = "7 low frequency samples"]
174    #[inline(always)]
175    pub fn is_lfreq7(&self) -> bool {
176        *self == States0select::Lfreq7
177    }
178}
179#[doc = "Field `STATES0` writer - Debouncer number of states"]
180pub type States0W<'a, REG> = crate::BitWriter<'a, REG, States0select>;
181impl<'a, REG> States0W<'a, REG>
182where
183    REG: crate::Writable + crate::RegisterSpec,
184{
185    #[doc = "3 low frequency samples"]
186    #[inline(always)]
187    pub fn lfreq3(self) -> &'a mut crate::W<REG> {
188        self.variant(States0select::Lfreq3)
189    }
190    #[doc = "7 low frequency samples"]
191    #[inline(always)]
192    pub fn lfreq7(self) -> &'a mut crate::W<REG> {
193        self.variant(States0select::Lfreq7)
194    }
195}
196#[doc = "Debouncer Prescaler\n\nValue on reset: 0"]
197#[derive(Clone, Copy, Debug, PartialEq, Eq)]
198#[repr(u8)]
199pub enum Prescaler1select {
200    #[doc = "0: EIC clock divided by 2"]
201    Div2 = 0,
202    #[doc = "1: EIC clock divided by 4"]
203    Div4 = 1,
204    #[doc = "2: EIC clock divided by 8"]
205    Div8 = 2,
206    #[doc = "3: EIC clock divided by 16"]
207    Div16 = 3,
208    #[doc = "4: EIC clock divided by 32"]
209    Div32 = 4,
210    #[doc = "5: EIC clock divided by 64"]
211    Div64 = 5,
212    #[doc = "6: EIC clock divided by 128"]
213    Div128 = 6,
214    #[doc = "7: EIC clock divided by 256"]
215    Div256 = 7,
216}
217impl From<Prescaler1select> for u8 {
218    #[inline(always)]
219    fn from(variant: Prescaler1select) -> Self {
220        variant as _
221    }
222}
223impl crate::FieldSpec for Prescaler1select {
224    type Ux = u8;
225}
226impl crate::IsEnum for Prescaler1select {}
227#[doc = "Field `PRESCALER1` reader - Debouncer Prescaler"]
228pub type Prescaler1R = crate::FieldReader<Prescaler1select>;
229impl Prescaler1R {
230    #[doc = "Get enumerated values variant"]
231    #[inline(always)]
232    pub const fn variant(&self) -> Prescaler1select {
233        match self.bits {
234            0 => Prescaler1select::Div2,
235            1 => Prescaler1select::Div4,
236            2 => Prescaler1select::Div8,
237            3 => Prescaler1select::Div16,
238            4 => Prescaler1select::Div32,
239            5 => Prescaler1select::Div64,
240            6 => Prescaler1select::Div128,
241            7 => Prescaler1select::Div256,
242            _ => unreachable!(),
243        }
244    }
245    #[doc = "EIC clock divided by 2"]
246    #[inline(always)]
247    pub fn is_div2(&self) -> bool {
248        *self == Prescaler1select::Div2
249    }
250    #[doc = "EIC clock divided by 4"]
251    #[inline(always)]
252    pub fn is_div4(&self) -> bool {
253        *self == Prescaler1select::Div4
254    }
255    #[doc = "EIC clock divided by 8"]
256    #[inline(always)]
257    pub fn is_div8(&self) -> bool {
258        *self == Prescaler1select::Div8
259    }
260    #[doc = "EIC clock divided by 16"]
261    #[inline(always)]
262    pub fn is_div16(&self) -> bool {
263        *self == Prescaler1select::Div16
264    }
265    #[doc = "EIC clock divided by 32"]
266    #[inline(always)]
267    pub fn is_div32(&self) -> bool {
268        *self == Prescaler1select::Div32
269    }
270    #[doc = "EIC clock divided by 64"]
271    #[inline(always)]
272    pub fn is_div64(&self) -> bool {
273        *self == Prescaler1select::Div64
274    }
275    #[doc = "EIC clock divided by 128"]
276    #[inline(always)]
277    pub fn is_div128(&self) -> bool {
278        *self == Prescaler1select::Div128
279    }
280    #[doc = "EIC clock divided by 256"]
281    #[inline(always)]
282    pub fn is_div256(&self) -> bool {
283        *self == Prescaler1select::Div256
284    }
285}
286#[doc = "Field `PRESCALER1` writer - Debouncer Prescaler"]
287pub type Prescaler1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Prescaler1select, crate::Safe>;
288impl<'a, REG> Prescaler1W<'a, REG>
289where
290    REG: crate::Writable + crate::RegisterSpec,
291    REG::Ux: From<u8>,
292{
293    #[doc = "EIC clock divided by 2"]
294    #[inline(always)]
295    pub fn div2(self) -> &'a mut crate::W<REG> {
296        self.variant(Prescaler1select::Div2)
297    }
298    #[doc = "EIC clock divided by 4"]
299    #[inline(always)]
300    pub fn div4(self) -> &'a mut crate::W<REG> {
301        self.variant(Prescaler1select::Div4)
302    }
303    #[doc = "EIC clock divided by 8"]
304    #[inline(always)]
305    pub fn div8(self) -> &'a mut crate::W<REG> {
306        self.variant(Prescaler1select::Div8)
307    }
308    #[doc = "EIC clock divided by 16"]
309    #[inline(always)]
310    pub fn div16(self) -> &'a mut crate::W<REG> {
311        self.variant(Prescaler1select::Div16)
312    }
313    #[doc = "EIC clock divided by 32"]
314    #[inline(always)]
315    pub fn div32(self) -> &'a mut crate::W<REG> {
316        self.variant(Prescaler1select::Div32)
317    }
318    #[doc = "EIC clock divided by 64"]
319    #[inline(always)]
320    pub fn div64(self) -> &'a mut crate::W<REG> {
321        self.variant(Prescaler1select::Div64)
322    }
323    #[doc = "EIC clock divided by 128"]
324    #[inline(always)]
325    pub fn div128(self) -> &'a mut crate::W<REG> {
326        self.variant(Prescaler1select::Div128)
327    }
328    #[doc = "EIC clock divided by 256"]
329    #[inline(always)]
330    pub fn div256(self) -> &'a mut crate::W<REG> {
331        self.variant(Prescaler1select::Div256)
332    }
333}
334#[doc = "Debouncer number of states\n\nValue on reset: 0"]
335#[derive(Clone, Copy, Debug, PartialEq, Eq)]
336pub enum States1select {
337    #[doc = "0: 3 low frequency samples"]
338    Lfreq3 = 0,
339    #[doc = "1: 7 low frequency samples"]
340    Lfreq7 = 1,
341}
342impl From<States1select> for bool {
343    #[inline(always)]
344    fn from(variant: States1select) -> Self {
345        variant as u8 != 0
346    }
347}
348#[doc = "Field `STATES1` reader - Debouncer number of states"]
349pub type States1R = crate::BitReader<States1select>;
350impl States1R {
351    #[doc = "Get enumerated values variant"]
352    #[inline(always)]
353    pub const fn variant(&self) -> States1select {
354        match self.bits {
355            false => States1select::Lfreq3,
356            true => States1select::Lfreq7,
357        }
358    }
359    #[doc = "3 low frequency samples"]
360    #[inline(always)]
361    pub fn is_lfreq3(&self) -> bool {
362        *self == States1select::Lfreq3
363    }
364    #[doc = "7 low frequency samples"]
365    #[inline(always)]
366    pub fn is_lfreq7(&self) -> bool {
367        *self == States1select::Lfreq7
368    }
369}
370#[doc = "Field `STATES1` writer - Debouncer number of states"]
371pub type States1W<'a, REG> = crate::BitWriter<'a, REG, States1select>;
372impl<'a, REG> States1W<'a, REG>
373where
374    REG: crate::Writable + crate::RegisterSpec,
375{
376    #[doc = "3 low frequency samples"]
377    #[inline(always)]
378    pub fn lfreq3(self) -> &'a mut crate::W<REG> {
379        self.variant(States1select::Lfreq3)
380    }
381    #[doc = "7 low frequency samples"]
382    #[inline(always)]
383    pub fn lfreq7(self) -> &'a mut crate::W<REG> {
384        self.variant(States1select::Lfreq7)
385    }
386}
387#[doc = "Pin Sampler frequency selection\n\nValue on reset: 0"]
388#[derive(Clone, Copy, Debug, PartialEq, Eq)]
389pub enum Tickonselect {
390    #[doc = "0: Clocked by GCLK"]
391    ClkGclkEic = 0,
392    #[doc = "1: Clocked by Low Frequency Clock"]
393    ClkLfreq = 1,
394}
395impl From<Tickonselect> for bool {
396    #[inline(always)]
397    fn from(variant: Tickonselect) -> Self {
398        variant as u8 != 0
399    }
400}
401#[doc = "Field `TICKON` reader - Pin Sampler frequency selection"]
402pub type TickonR = crate::BitReader<Tickonselect>;
403impl TickonR {
404    #[doc = "Get enumerated values variant"]
405    #[inline(always)]
406    pub const fn variant(&self) -> Tickonselect {
407        match self.bits {
408            false => Tickonselect::ClkGclkEic,
409            true => Tickonselect::ClkLfreq,
410        }
411    }
412    #[doc = "Clocked by GCLK"]
413    #[inline(always)]
414    pub fn is_clk_gclk_eic(&self) -> bool {
415        *self == Tickonselect::ClkGclkEic
416    }
417    #[doc = "Clocked by Low Frequency Clock"]
418    #[inline(always)]
419    pub fn is_clk_lfreq(&self) -> bool {
420        *self == Tickonselect::ClkLfreq
421    }
422}
423#[doc = "Field `TICKON` writer - Pin Sampler frequency selection"]
424pub type TickonW<'a, REG> = crate::BitWriter<'a, REG, Tickonselect>;
425impl<'a, REG> TickonW<'a, REG>
426where
427    REG: crate::Writable + crate::RegisterSpec,
428{
429    #[doc = "Clocked by GCLK"]
430    #[inline(always)]
431    pub fn clk_gclk_eic(self) -> &'a mut crate::W<REG> {
432        self.variant(Tickonselect::ClkGclkEic)
433    }
434    #[doc = "Clocked by Low Frequency Clock"]
435    #[inline(always)]
436    pub fn clk_lfreq(self) -> &'a mut crate::W<REG> {
437        self.variant(Tickonselect::ClkLfreq)
438    }
439}
440impl R {
441    #[doc = "Bits 0:2 - Debouncer Prescaler"]
442    #[inline(always)]
443    pub fn prescaler0(&self) -> Prescaler0R {
444        Prescaler0R::new((self.bits & 7) as u8)
445    }
446    #[doc = "Bit 3 - Debouncer number of states"]
447    #[inline(always)]
448    pub fn states0(&self) -> States0R {
449        States0R::new(((self.bits >> 3) & 1) != 0)
450    }
451    #[doc = "Bits 4:6 - Debouncer Prescaler"]
452    #[inline(always)]
453    pub fn prescaler1(&self) -> Prescaler1R {
454        Prescaler1R::new(((self.bits >> 4) & 7) as u8)
455    }
456    #[doc = "Bit 7 - Debouncer number of states"]
457    #[inline(always)]
458    pub fn states1(&self) -> States1R {
459        States1R::new(((self.bits >> 7) & 1) != 0)
460    }
461    #[doc = "Bit 16 - Pin Sampler frequency selection"]
462    #[inline(always)]
463    pub fn tickon(&self) -> TickonR {
464        TickonR::new(((self.bits >> 16) & 1) != 0)
465    }
466}
467impl W {
468    #[doc = "Bits 0:2 - Debouncer Prescaler"]
469    #[inline(always)]
470    #[must_use]
471    pub fn prescaler0(&mut self) -> Prescaler0W<DprescalerSpec> {
472        Prescaler0W::new(self, 0)
473    }
474    #[doc = "Bit 3 - Debouncer number of states"]
475    #[inline(always)]
476    #[must_use]
477    pub fn states0(&mut self) -> States0W<DprescalerSpec> {
478        States0W::new(self, 3)
479    }
480    #[doc = "Bits 4:6 - Debouncer Prescaler"]
481    #[inline(always)]
482    #[must_use]
483    pub fn prescaler1(&mut self) -> Prescaler1W<DprescalerSpec> {
484        Prescaler1W::new(self, 4)
485    }
486    #[doc = "Bit 7 - Debouncer number of states"]
487    #[inline(always)]
488    #[must_use]
489    pub fn states1(&mut self) -> States1W<DprescalerSpec> {
490        States1W::new(self, 7)
491    }
492    #[doc = "Bit 16 - Pin Sampler frequency selection"]
493    #[inline(always)]
494    #[must_use]
495    pub fn tickon(&mut self) -> TickonW<DprescalerSpec> {
496        TickonW::new(self, 16)
497    }
498}
499#[doc = "Debouncer Prescaler\n\nYou can [`read`](crate::Reg::read) this register and get [`dprescaler::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dprescaler::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
500pub struct DprescalerSpec;
501impl crate::RegisterSpec for DprescalerSpec {
502    type Ux = u32;
503}
504#[doc = "`read()` method returns [`dprescaler::R`](R) reader structure"]
505impl crate::Readable for DprescalerSpec {}
506#[doc = "`write(|w| ..)` method takes [`dprescaler::W`](W) writer structure"]
507impl crate::Writable for DprescalerSpec {
508    type Safety = crate::Unsafe;
509    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
510    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
511}
512#[doc = "`reset()` method sets DPRESCALER to value 0"]
513impl crate::Resettable for DprescalerSpec {
514    const RESET_VALUE: u32 = 0;
515}
atsamd51g/eic/dprescaler.rs

atsamd51g/eic/
dprescaler.rs
