atsamd51g/osc32kctrl/
rtcctrl.rs

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1#[doc = "Register `RTCCTRL` reader"]
2pub type R = crate::R<RtcctrlSpec>;
3#[doc = "Register `RTCCTRL` writer"]
4pub type W = crate::W<RtcctrlSpec>;
5#[doc = "RTC Clock Selection\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Rtcselselect {
9    #[doc = "0: 1.024kHz from 32kHz internal ULP oscillator"]
10    Ulp1k = 0,
11    #[doc = "1: 32.768kHz from 32kHz internal ULP oscillator"]
12    Ulp32k = 1,
13    #[doc = "4: 1.024kHz from 32.768kHz internal oscillator"]
14    Xosc1k = 4,
15    #[doc = "5: 32.768kHz from 32.768kHz external crystal oscillator"]
16    Xosc32k = 5,
17}
18impl From<Rtcselselect> for u8 {
19    #[inline(always)]
20    fn from(variant: Rtcselselect) -> Self {
21        variant as _
22    }
23}
24impl crate::FieldSpec for Rtcselselect {
25    type Ux = u8;
26}
27impl crate::IsEnum for Rtcselselect {}
28#[doc = "Field `RTCSEL` reader - RTC Clock Selection"]
29pub type RtcselR = crate::FieldReader<Rtcselselect>;
30impl RtcselR {
31    #[doc = "Get enumerated values variant"]
32    #[inline(always)]
33    pub const fn variant(&self) -> Option<Rtcselselect> {
34        match self.bits {
35            0 => Some(Rtcselselect::Ulp1k),
36            1 => Some(Rtcselselect::Ulp32k),
37            4 => Some(Rtcselselect::Xosc1k),
38            5 => Some(Rtcselselect::Xosc32k),
39            _ => None,
40        }
41    }
42    #[doc = "1.024kHz from 32kHz internal ULP oscillator"]
43    #[inline(always)]
44    pub fn is_ulp1k(&self) -> bool {
45        *self == Rtcselselect::Ulp1k
46    }
47    #[doc = "32.768kHz from 32kHz internal ULP oscillator"]
48    #[inline(always)]
49    pub fn is_ulp32k(&self) -> bool {
50        *self == Rtcselselect::Ulp32k
51    }
52    #[doc = "1.024kHz from 32.768kHz internal oscillator"]
53    #[inline(always)]
54    pub fn is_xosc1k(&self) -> bool {
55        *self == Rtcselselect::Xosc1k
56    }
57    #[doc = "32.768kHz from 32.768kHz external crystal oscillator"]
58    #[inline(always)]
59    pub fn is_xosc32k(&self) -> bool {
60        *self == Rtcselselect::Xosc32k
61    }
62}
63#[doc = "Field `RTCSEL` writer - RTC Clock Selection"]
64pub type RtcselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rtcselselect>;
65impl<'a, REG> RtcselW<'a, REG>
66where
67    REG: crate::Writable + crate::RegisterSpec,
68    REG::Ux: From<u8>,
69{
70    #[doc = "1.024kHz from 32kHz internal ULP oscillator"]
71    #[inline(always)]
72    pub fn ulp1k(self) -> &'a mut crate::W<REG> {
73        self.variant(Rtcselselect::Ulp1k)
74    }
75    #[doc = "32.768kHz from 32kHz internal ULP oscillator"]
76    #[inline(always)]
77    pub fn ulp32k(self) -> &'a mut crate::W<REG> {
78        self.variant(Rtcselselect::Ulp32k)
79    }
80    #[doc = "1.024kHz from 32.768kHz internal oscillator"]
81    #[inline(always)]
82    pub fn xosc1k(self) -> &'a mut crate::W<REG> {
83        self.variant(Rtcselselect::Xosc1k)
84    }
85    #[doc = "32.768kHz from 32.768kHz external crystal oscillator"]
86    #[inline(always)]
87    pub fn xosc32k(self) -> &'a mut crate::W<REG> {
88        self.variant(Rtcselselect::Xosc32k)
89    }
90}
91impl R {
92    #[doc = "Bits 0:2 - RTC Clock Selection"]
93    #[inline(always)]
94    pub fn rtcsel(&self) -> RtcselR {
95        RtcselR::new(self.bits & 7)
96    }
97}
98impl W {
99    #[doc = "Bits 0:2 - RTC Clock Selection"]
100    #[inline(always)]
101    #[must_use]
102    pub fn rtcsel(&mut self) -> RtcselW<RtcctrlSpec> {
103        RtcselW::new(self, 0)
104    }
105}
106#[doc = "RTC Clock Selection\n\nYou can [`read`](crate::Reg::read) this register and get [`rtcctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtcctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
107pub struct RtcctrlSpec;
108impl crate::RegisterSpec for RtcctrlSpec {
109    type Ux = u8;
110}
111#[doc = "`read()` method returns [`rtcctrl::R`](R) reader structure"]
112impl crate::Readable for RtcctrlSpec {}
113#[doc = "`write(|w| ..)` method takes [`rtcctrl::W`](W) writer structure"]
114impl crate::Writable for RtcctrlSpec {
115    type Safety = crate::Unsafe;
116    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
117    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
118}
119#[doc = "`reset()` method sets RTCCTRL to value 0"]
120impl crate::Resettable for RtcctrlSpec {
121    const RESET_VALUE: u8 = 0;
122}
atsamd51g/osc32kctrl/rtcctrl.rs

atsamd51g/osc32kctrl/
rtcctrl.rs
