atsamd51g/
osc32kctrl.rs

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1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    intenclr: Intenclr,
5    intenset: Intenset,
6    intflag: Intflag,
7    status: Status,
8    rtcctrl: Rtcctrl,
9    _reserved5: [u8; 0x03],
10    xosc32k: Xosc32k,
11    cfdctrl: Cfdctrl,
12    evctrl: Evctrl,
13    _reserved8: [u8; 0x04],
14    osculp32k: Osculp32k,
15}
16impl RegisterBlock {
17    #[doc = "0x00 - Interrupt Enable Clear"]
18    #[inline(always)]
19    pub const fn intenclr(&self) -> &Intenclr {
20        &self.intenclr
21    }
22    #[doc = "0x04 - Interrupt Enable Set"]
23    #[inline(always)]
24    pub const fn intenset(&self) -> &Intenset {
25        &self.intenset
26    }
27    #[doc = "0x08 - Interrupt Flag Status and Clear"]
28    #[inline(always)]
29    pub const fn intflag(&self) -> &Intflag {
30        &self.intflag
31    }
32    #[doc = "0x0c - Power and Clocks Status"]
33    #[inline(always)]
34    pub const fn status(&self) -> &Status {
35        &self.status
36    }
37    #[doc = "0x10 - RTC Clock Selection"]
38    #[inline(always)]
39    pub const fn rtcctrl(&self) -> &Rtcctrl {
40        &self.rtcctrl
41    }
42    #[doc = "0x14 - 32kHz External Crystal Oscillator (XOSC32K) Control"]
43    #[inline(always)]
44    pub const fn xosc32k(&self) -> &Xosc32k {
45        &self.xosc32k
46    }
47    #[doc = "0x16 - Clock Failure Detector Control"]
48    #[inline(always)]
49    pub const fn cfdctrl(&self) -> &Cfdctrl {
50        &self.cfdctrl
51    }
52    #[doc = "0x17 - Event Control"]
53    #[inline(always)]
54    pub const fn evctrl(&self) -> &Evctrl {
55        &self.evctrl
56    }
57    #[doc = "0x1c - 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control"]
58    #[inline(always)]
59    pub const fn osculp32k(&self) -> &Osculp32k {
60        &self.osculp32k
61    }
62}
63#[doc = "INTENCLR (rw) register accessor: Interrupt Enable Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intenclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenclr`]
64module"]
65#[doc(alias = "INTENCLR")]
66pub type Intenclr = crate::Reg<intenclr::IntenclrSpec>;
67#[doc = "Interrupt Enable Clear"]
68pub mod intenclr;
69#[doc = "INTENSET (rw) register accessor: Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`intenset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenset`]
70module"]
71#[doc(alias = "INTENSET")]
72pub type Intenset = crate::Reg<intenset::IntensetSpec>;
73#[doc = "Interrupt Enable Set"]
74pub mod intenset;
75#[doc = "INTFLAG (rw) register accessor: Interrupt Flag Status and Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intflag`]
76module"]
77#[doc(alias = "INTFLAG")]
78pub type Intflag = crate::Reg<intflag::IntflagSpec>;
79#[doc = "Interrupt Flag Status and Clear"]
80pub mod intflag;
81#[doc = "STATUS (r) register accessor: Power and Clocks Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
82module"]
83#[doc(alias = "STATUS")]
84pub type Status = crate::Reg<status::StatusSpec>;
85#[doc = "Power and Clocks Status"]
86pub mod status;
87#[doc = "RTCCTRL (rw) register accessor: RTC Clock Selection\n\nYou can [`read`](crate::Reg::read) this register and get [`rtcctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtcctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rtcctrl`]
88module"]
89#[doc(alias = "RTCCTRL")]
90pub type Rtcctrl = crate::Reg<rtcctrl::RtcctrlSpec>;
91#[doc = "RTC Clock Selection"]
92pub mod rtcctrl;
93#[doc = "XOSC32K (rw) register accessor: 32kHz External Crystal Oscillator (XOSC32K) Control\n\nYou can [`read`](crate::Reg::read) this register and get [`xosc32k::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`xosc32k::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@xosc32k`]
94module"]
95#[doc(alias = "XOSC32K")]
96pub type Xosc32k = crate::Reg<xosc32k::Xosc32kSpec>;
97#[doc = "32kHz External Crystal Oscillator (XOSC32K) Control"]
98pub mod xosc32k;
99#[doc = "CFDCTRL (rw) register accessor: Clock Failure Detector Control\n\nYou can [`read`](crate::Reg::read) this register and get [`cfdctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfdctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfdctrl`]
100module"]
101#[doc(alias = "CFDCTRL")]
102pub type Cfdctrl = crate::Reg<cfdctrl::CfdctrlSpec>;
103#[doc = "Clock Failure Detector Control"]
104pub mod cfdctrl;
105#[doc = "EVCTRL (rw) register accessor: Event Control\n\nYou can [`read`](crate::Reg::read) this register and get [`evctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evctrl`]
106module"]
107#[doc(alias = "EVCTRL")]
108pub type Evctrl = crate::Reg<evctrl::EvctrlSpec>;
109#[doc = "Event Control"]
110pub mod evctrl;
111#[doc = "OSCULP32K (rw) register accessor: 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control\n\nYou can [`read`](crate::Reg::read) this register and get [`osculp32k::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`osculp32k::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculp32k`]
112module"]
113#[doc(alias = "OSCULP32K")]
114pub type Osculp32k = crate::Reg<osculp32k::Osculp32kSpec>;
115#[doc = "32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control"]
116pub mod osculp32k;
atsamd51g/osc32kctrl.rs

atsamd51g/
osc32kctrl.rs
