atsamd51g/dmac/channel/
chstatus.rs

1#[doc = "Register `CHSTATUS` reader"]
2pub type R = crate::R<ChstatusSpec>;
3#[doc = "Register `CHSTATUS` writer"]
4pub type W = crate::W<ChstatusSpec>;
5#[doc = "Field `PEND` reader - Channel Pending"]
6pub type PendR = crate::BitReader;
7#[doc = "Field `PEND` writer - Channel Pending"]
8pub type PendW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `BUSY` reader - Channel Busy"]
10pub type BusyR = crate::BitReader;
11#[doc = "Field `BUSY` writer - Channel Busy"]
12pub type BusyW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `FERR` reader - Channel Fetch Error"]
14pub type FerrR = crate::BitReader;
15#[doc = "Field `FERR` writer - Channel Fetch Error"]
16pub type FerrW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CRCERR` reader - Channel CRC Error"]
18pub type CrcerrR = crate::BitReader;
19#[doc = "Field `CRCERR` writer - Channel CRC Error"]
20pub type CrcerrW<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bit 0 - Channel Pending"]
23    #[inline(always)]
24    pub fn pend(&self) -> PendR {
25        PendR::new((self.bits & 1) != 0)
26    }
27    #[doc = "Bit 1 - Channel Busy"]
28    #[inline(always)]
29    pub fn busy(&self) -> BusyR {
30        BusyR::new(((self.bits >> 1) & 1) != 0)
31    }
32    #[doc = "Bit 2 - Channel Fetch Error"]
33    #[inline(always)]
34    pub fn ferr(&self) -> FerrR {
35        FerrR::new(((self.bits >> 2) & 1) != 0)
36    }
37    #[doc = "Bit 3 - Channel CRC Error"]
38    #[inline(always)]
39    pub fn crcerr(&self) -> CrcerrR {
40        CrcerrR::new(((self.bits >> 3) & 1) != 0)
41    }
42}
43impl W {
44    #[doc = "Bit 0 - Channel Pending"]
45    #[inline(always)]
46    #[must_use]
47    pub fn pend(&mut self) -> PendW<ChstatusSpec> {
48        PendW::new(self, 0)
49    }
50    #[doc = "Bit 1 - Channel Busy"]
51    #[inline(always)]
52    #[must_use]
53    pub fn busy(&mut self) -> BusyW<ChstatusSpec> {
54        BusyW::new(self, 1)
55    }
56    #[doc = "Bit 2 - Channel Fetch Error"]
57    #[inline(always)]
58    #[must_use]
59    pub fn ferr(&mut self) -> FerrW<ChstatusSpec> {
60        FerrW::new(self, 2)
61    }
62    #[doc = "Bit 3 - Channel CRC Error"]
63    #[inline(always)]
64    #[must_use]
65    pub fn crcerr(&mut self) -> CrcerrW<ChstatusSpec> {
66        CrcerrW::new(self, 3)
67    }
68}
69#[doc = "Channel n Status\n\nYou can [`read`](crate::Reg::read) this register and get [`chstatus::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chstatus::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
70pub struct ChstatusSpec;
71impl crate::RegisterSpec for ChstatusSpec {
72    type Ux = u8;
73}
74#[doc = "`read()` method returns [`chstatus::R`](R) reader structure"]
75impl crate::Readable for ChstatusSpec {}
76#[doc = "`write(|w| ..)` method takes [`chstatus::W`](W) writer structure"]
77impl crate::Writable for ChstatusSpec {
78    type Safety = crate::Unsafe;
79    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
80    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
81}
82#[doc = "`reset()` method sets CHSTATUS to value 0"]
83impl crate::Resettable for ChstatusSpec {
84    const RESET_VALUE: u8 = 0;
85}