atsamd51g/rtc/mode1/
ctrlb.rs

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1#[doc = "Register `CTRLB` reader"]
2pub type R = crate::R<CtrlbSpec>;
3#[doc = "Register `CTRLB` writer"]
4pub type W = crate::W<CtrlbSpec>;
5#[doc = "Field `GP0EN` reader - General Purpose 0 Enable"]
6pub type Gp0enR = crate::BitReader;
7#[doc = "Field `GP0EN` writer - General Purpose 0 Enable"]
8pub type Gp0enW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `GP2EN` reader - General Purpose 2 Enable"]
10pub type Gp2enR = crate::BitReader;
11#[doc = "Field `GP2EN` writer - General Purpose 2 Enable"]
12pub type Gp2enW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `DEBMAJ` reader - Debouncer Majority Enable"]
14pub type DebmajR = crate::BitReader;
15#[doc = "Field `DEBMAJ` writer - Debouncer Majority Enable"]
16pub type DebmajW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `DEBASYNC` reader - Debouncer Asynchronous Enable"]
18pub type DebasyncR = crate::BitReader;
19#[doc = "Field `DEBASYNC` writer - Debouncer Asynchronous Enable"]
20pub type DebasyncW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `RTCOUT` reader - RTC Output Enable"]
22pub type RtcoutR = crate::BitReader;
23#[doc = "Field `RTCOUT` writer - RTC Output Enable"]
24pub type RtcoutW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `DMAEN` reader - DMA Enable"]
26pub type DmaenR = crate::BitReader;
27#[doc = "Field `DMAEN` writer - DMA Enable"]
28pub type DmaenW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Debounce Freqnuency\n\nValue on reset: 0"]
30#[derive(Clone, Copy, Debug, PartialEq, Eq)]
31#[repr(u8)]
32pub enum Debfselect {
33    #[doc = "0: CLK_RTC_DEB = CLK_RTC/2"]
34    Div2 = 0,
35    #[doc = "1: CLK_RTC_DEB = CLK_RTC/4"]
36    Div4 = 1,
37    #[doc = "2: CLK_RTC_DEB = CLK_RTC/8"]
38    Div8 = 2,
39    #[doc = "3: CLK_RTC_DEB = CLK_RTC/16"]
40    Div16 = 3,
41    #[doc = "4: CLK_RTC_DEB = CLK_RTC/32"]
42    Div32 = 4,
43    #[doc = "5: CLK_RTC_DEB = CLK_RTC/64"]
44    Div64 = 5,
45    #[doc = "6: CLK_RTC_DEB = CLK_RTC/128"]
46    Div128 = 6,
47    #[doc = "7: CLK_RTC_DEB = CLK_RTC/256"]
48    Div256 = 7,
49}
50impl From<Debfselect> for u8 {
51    #[inline(always)]
52    fn from(variant: Debfselect) -> Self {
53        variant as _
54    }
55}
56impl crate::FieldSpec for Debfselect {
57    type Ux = u8;
58}
59impl crate::IsEnum for Debfselect {}
60#[doc = "Field `DEBF` reader - Debounce Freqnuency"]
61pub type DebfR = crate::FieldReader<Debfselect>;
62impl DebfR {
63    #[doc = "Get enumerated values variant"]
64    #[inline(always)]
65    pub const fn variant(&self) -> Debfselect {
66        match self.bits {
67            0 => Debfselect::Div2,
68            1 => Debfselect::Div4,
69            2 => Debfselect::Div8,
70            3 => Debfselect::Div16,
71            4 => Debfselect::Div32,
72            5 => Debfselect::Div64,
73            6 => Debfselect::Div128,
74            7 => Debfselect::Div256,
75            _ => unreachable!(),
76        }
77    }
78    #[doc = "CLK_RTC_DEB = CLK_RTC/2"]
79    #[inline(always)]
80    pub fn is_div2(&self) -> bool {
81        *self == Debfselect::Div2
82    }
83    #[doc = "CLK_RTC_DEB = CLK_RTC/4"]
84    #[inline(always)]
85    pub fn is_div4(&self) -> bool {
86        *self == Debfselect::Div4
87    }
88    #[doc = "CLK_RTC_DEB = CLK_RTC/8"]
89    #[inline(always)]
90    pub fn is_div8(&self) -> bool {
91        *self == Debfselect::Div8
92    }
93    #[doc = "CLK_RTC_DEB = CLK_RTC/16"]
94    #[inline(always)]
95    pub fn is_div16(&self) -> bool {
96        *self == Debfselect::Div16
97    }
98    #[doc = "CLK_RTC_DEB = CLK_RTC/32"]
99    #[inline(always)]
100    pub fn is_div32(&self) -> bool {
101        *self == Debfselect::Div32
102    }
103    #[doc = "CLK_RTC_DEB = CLK_RTC/64"]
104    #[inline(always)]
105    pub fn is_div64(&self) -> bool {
106        *self == Debfselect::Div64
107    }
108    #[doc = "CLK_RTC_DEB = CLK_RTC/128"]
109    #[inline(always)]
110    pub fn is_div128(&self) -> bool {
111        *self == Debfselect::Div128
112    }
113    #[doc = "CLK_RTC_DEB = CLK_RTC/256"]
114    #[inline(always)]
115    pub fn is_div256(&self) -> bool {
116        *self == Debfselect::Div256
117    }
118}
119#[doc = "Field `DEBF` writer - Debounce Freqnuency"]
120pub type DebfW<'a, REG> = crate::FieldWriter<'a, REG, 3, Debfselect, crate::Safe>;
121impl<'a, REG> DebfW<'a, REG>
122where
123    REG: crate::Writable + crate::RegisterSpec,
124    REG::Ux: From<u8>,
125{
126    #[doc = "CLK_RTC_DEB = CLK_RTC/2"]
127    #[inline(always)]
128    pub fn div2(self) -> &'a mut crate::W<REG> {
129        self.variant(Debfselect::Div2)
130    }
131    #[doc = "CLK_RTC_DEB = CLK_RTC/4"]
132    #[inline(always)]
133    pub fn div4(self) -> &'a mut crate::W<REG> {
134        self.variant(Debfselect::Div4)
135    }
136    #[doc = "CLK_RTC_DEB = CLK_RTC/8"]
137    #[inline(always)]
138    pub fn div8(self) -> &'a mut crate::W<REG> {
139        self.variant(Debfselect::Div8)
140    }
141    #[doc = "CLK_RTC_DEB = CLK_RTC/16"]
142    #[inline(always)]
143    pub fn div16(self) -> &'a mut crate::W<REG> {
144        self.variant(Debfselect::Div16)
145    }
146    #[doc = "CLK_RTC_DEB = CLK_RTC/32"]
147    #[inline(always)]
148    pub fn div32(self) -> &'a mut crate::W<REG> {
149        self.variant(Debfselect::Div32)
150    }
151    #[doc = "CLK_RTC_DEB = CLK_RTC/64"]
152    #[inline(always)]
153    pub fn div64(self) -> &'a mut crate::W<REG> {
154        self.variant(Debfselect::Div64)
155    }
156    #[doc = "CLK_RTC_DEB = CLK_RTC/128"]
157    #[inline(always)]
158    pub fn div128(self) -> &'a mut crate::W<REG> {
159        self.variant(Debfselect::Div128)
160    }
161    #[doc = "CLK_RTC_DEB = CLK_RTC/256"]
162    #[inline(always)]
163    pub fn div256(self) -> &'a mut crate::W<REG> {
164        self.variant(Debfselect::Div256)
165    }
166}
167#[doc = "Active Layer Freqnuency\n\nValue on reset: 0"]
168#[derive(Clone, Copy, Debug, PartialEq, Eq)]
169#[repr(u8)]
170pub enum Actfselect {
171    #[doc = "0: CLK_RTC_OUT = CLK_RTC/2"]
172    Div2 = 0,
173    #[doc = "1: CLK_RTC_OUT = CLK_RTC/4"]
174    Div4 = 1,
175    #[doc = "2: CLK_RTC_OUT = CLK_RTC/8"]
176    Div8 = 2,
177    #[doc = "3: CLK_RTC_OUT = CLK_RTC/16"]
178    Div16 = 3,
179    #[doc = "4: CLK_RTC_OUT = CLK_RTC/32"]
180    Div32 = 4,
181    #[doc = "5: CLK_RTC_OUT = CLK_RTC/64"]
182    Div64 = 5,
183    #[doc = "6: CLK_RTC_OUT = CLK_RTC/128"]
184    Div128 = 6,
185    #[doc = "7: CLK_RTC_OUT = CLK_RTC/256"]
186    Div256 = 7,
187}
188impl From<Actfselect> for u8 {
189    #[inline(always)]
190    fn from(variant: Actfselect) -> Self {
191        variant as _
192    }
193}
194impl crate::FieldSpec for Actfselect {
195    type Ux = u8;
196}
197impl crate::IsEnum for Actfselect {}
198#[doc = "Field `ACTF` reader - Active Layer Freqnuency"]
199pub type ActfR = crate::FieldReader<Actfselect>;
200impl ActfR {
201    #[doc = "Get enumerated values variant"]
202    #[inline(always)]
203    pub const fn variant(&self) -> Actfselect {
204        match self.bits {
205            0 => Actfselect::Div2,
206            1 => Actfselect::Div4,
207            2 => Actfselect::Div8,
208            3 => Actfselect::Div16,
209            4 => Actfselect::Div32,
210            5 => Actfselect::Div64,
211            6 => Actfselect::Div128,
212            7 => Actfselect::Div256,
213            _ => unreachable!(),
214        }
215    }
216    #[doc = "CLK_RTC_OUT = CLK_RTC/2"]
217    #[inline(always)]
218    pub fn is_div2(&self) -> bool {
219        *self == Actfselect::Div2
220    }
221    #[doc = "CLK_RTC_OUT = CLK_RTC/4"]
222    #[inline(always)]
223    pub fn is_div4(&self) -> bool {
224        *self == Actfselect::Div4
225    }
226    #[doc = "CLK_RTC_OUT = CLK_RTC/8"]
227    #[inline(always)]
228    pub fn is_div8(&self) -> bool {
229        *self == Actfselect::Div8
230    }
231    #[doc = "CLK_RTC_OUT = CLK_RTC/16"]
232    #[inline(always)]
233    pub fn is_div16(&self) -> bool {
234        *self == Actfselect::Div16
235    }
236    #[doc = "CLK_RTC_OUT = CLK_RTC/32"]
237    #[inline(always)]
238    pub fn is_div32(&self) -> bool {
239        *self == Actfselect::Div32
240    }
241    #[doc = "CLK_RTC_OUT = CLK_RTC/64"]
242    #[inline(always)]
243    pub fn is_div64(&self) -> bool {
244        *self == Actfselect::Div64
245    }
246    #[doc = "CLK_RTC_OUT = CLK_RTC/128"]
247    #[inline(always)]
248    pub fn is_div128(&self) -> bool {
249        *self == Actfselect::Div128
250    }
251    #[doc = "CLK_RTC_OUT = CLK_RTC/256"]
252    #[inline(always)]
253    pub fn is_div256(&self) -> bool {
254        *self == Actfselect::Div256
255    }
256}
257#[doc = "Field `ACTF` writer - Active Layer Freqnuency"]
258pub type ActfW<'a, REG> = crate::FieldWriter<'a, REG, 3, Actfselect, crate::Safe>;
259impl<'a, REG> ActfW<'a, REG>
260where
261    REG: crate::Writable + crate::RegisterSpec,
262    REG::Ux: From<u8>,
263{
264    #[doc = "CLK_RTC_OUT = CLK_RTC/2"]
265    #[inline(always)]
266    pub fn div2(self) -> &'a mut crate::W<REG> {
267        self.variant(Actfselect::Div2)
268    }
269    #[doc = "CLK_RTC_OUT = CLK_RTC/4"]
270    #[inline(always)]
271    pub fn div4(self) -> &'a mut crate::W<REG> {
272        self.variant(Actfselect::Div4)
273    }
274    #[doc = "CLK_RTC_OUT = CLK_RTC/8"]
275    #[inline(always)]
276    pub fn div8(self) -> &'a mut crate::W<REG> {
277        self.variant(Actfselect::Div8)
278    }
279    #[doc = "CLK_RTC_OUT = CLK_RTC/16"]
280    #[inline(always)]
281    pub fn div16(self) -> &'a mut crate::W<REG> {
282        self.variant(Actfselect::Div16)
283    }
284    #[doc = "CLK_RTC_OUT = CLK_RTC/32"]
285    #[inline(always)]
286    pub fn div32(self) -> &'a mut crate::W<REG> {
287        self.variant(Actfselect::Div32)
288    }
289    #[doc = "CLK_RTC_OUT = CLK_RTC/64"]
290    #[inline(always)]
291    pub fn div64(self) -> &'a mut crate::W<REG> {
292        self.variant(Actfselect::Div64)
293    }
294    #[doc = "CLK_RTC_OUT = CLK_RTC/128"]
295    #[inline(always)]
296    pub fn div128(self) -> &'a mut crate::W<REG> {
297        self.variant(Actfselect::Div128)
298    }
299    #[doc = "CLK_RTC_OUT = CLK_RTC/256"]
300    #[inline(always)]
301    pub fn div256(self) -> &'a mut crate::W<REG> {
302        self.variant(Actfselect::Div256)
303    }
304}
305impl R {
306    #[doc = "Bit 0 - General Purpose 0 Enable"]
307    #[inline(always)]
308    pub fn gp0en(&self) -> Gp0enR {
309        Gp0enR::new((self.bits & 1) != 0)
310    }
311    #[doc = "Bit 1 - General Purpose 2 Enable"]
312    #[inline(always)]
313    pub fn gp2en(&self) -> Gp2enR {
314        Gp2enR::new(((self.bits >> 1) & 1) != 0)
315    }
316    #[doc = "Bit 4 - Debouncer Majority Enable"]
317    #[inline(always)]
318    pub fn debmaj(&self) -> DebmajR {
319        DebmajR::new(((self.bits >> 4) & 1) != 0)
320    }
321    #[doc = "Bit 5 - Debouncer Asynchronous Enable"]
322    #[inline(always)]
323    pub fn debasync(&self) -> DebasyncR {
324        DebasyncR::new(((self.bits >> 5) & 1) != 0)
325    }
326    #[doc = "Bit 6 - RTC Output Enable"]
327    #[inline(always)]
328    pub fn rtcout(&self) -> RtcoutR {
329        RtcoutR::new(((self.bits >> 6) & 1) != 0)
330    }
331    #[doc = "Bit 7 - DMA Enable"]
332    #[inline(always)]
333    pub fn dmaen(&self) -> DmaenR {
334        DmaenR::new(((self.bits >> 7) & 1) != 0)
335    }
336    #[doc = "Bits 8:10 - Debounce Freqnuency"]
337    #[inline(always)]
338    pub fn debf(&self) -> DebfR {
339        DebfR::new(((self.bits >> 8) & 7) as u8)
340    }
341    #[doc = "Bits 12:14 - Active Layer Freqnuency"]
342    #[inline(always)]
343    pub fn actf(&self) -> ActfR {
344        ActfR::new(((self.bits >> 12) & 7) as u8)
345    }
346}
347impl W {
348    #[doc = "Bit 0 - General Purpose 0 Enable"]
349    #[inline(always)]
350    #[must_use]
351    pub fn gp0en(&mut self) -> Gp0enW<CtrlbSpec> {
352        Gp0enW::new(self, 0)
353    }
354    #[doc = "Bit 1 - General Purpose 2 Enable"]
355    #[inline(always)]
356    #[must_use]
357    pub fn gp2en(&mut self) -> Gp2enW<CtrlbSpec> {
358        Gp2enW::new(self, 1)
359    }
360    #[doc = "Bit 4 - Debouncer Majority Enable"]
361    #[inline(always)]
362    #[must_use]
363    pub fn debmaj(&mut self) -> DebmajW<CtrlbSpec> {
364        DebmajW::new(self, 4)
365    }
366    #[doc = "Bit 5 - Debouncer Asynchronous Enable"]
367    #[inline(always)]
368    #[must_use]
369    pub fn debasync(&mut self) -> DebasyncW<CtrlbSpec> {
370        DebasyncW::new(self, 5)
371    }
372    #[doc = "Bit 6 - RTC Output Enable"]
373    #[inline(always)]
374    #[must_use]
375    pub fn rtcout(&mut self) -> RtcoutW<CtrlbSpec> {
376        RtcoutW::new(self, 6)
377    }
378    #[doc = "Bit 7 - DMA Enable"]
379    #[inline(always)]
380    #[must_use]
381    pub fn dmaen(&mut self) -> DmaenW<CtrlbSpec> {
382        DmaenW::new(self, 7)
383    }
384    #[doc = "Bits 8:10 - Debounce Freqnuency"]
385    #[inline(always)]
386    #[must_use]
387    pub fn debf(&mut self) -> DebfW<CtrlbSpec> {
388        DebfW::new(self, 8)
389    }
390    #[doc = "Bits 12:14 - Active Layer Freqnuency"]
391    #[inline(always)]
392    #[must_use]
393    pub fn actf(&mut self) -> ActfW<CtrlbSpec> {
394        ActfW::new(self, 12)
395    }
396}
397#[doc = "MODE1 Control B\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
398pub struct CtrlbSpec;
399impl crate::RegisterSpec for CtrlbSpec {
400    type Ux = u16;
401}
402#[doc = "`read()` method returns [`ctrlb::R`](R) reader structure"]
403impl crate::Readable for CtrlbSpec {}
404#[doc = "`write(|w| ..)` method takes [`ctrlb::W`](W) writer structure"]
405impl crate::Writable for CtrlbSpec {
406    type Safety = crate::Unsafe;
407    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
408    const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
409}
410#[doc = "`reset()` method sets CTRLB to value 0"]
411impl crate::Resettable for CtrlbSpec {
412    const RESET_VALUE: u16 = 0;
413}
atsamd51g/rtc/mode1/ctrlb.rs

atsamd51g/rtc/mode1/
ctrlb.rs
