atsamd51g/
core_debug.rs

Help
1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    dhcsr: Dhcsr,
5    dcrsr: Dcrsr,
6    dcrdr: Dcrdr,
7    demcr: Demcr,
8}
9impl RegisterBlock {
10    #[doc = "0x00 - Debug Halting Control and Status Register"]
11    #[inline(always)]
12    pub const fn dhcsr(&self) -> &Dhcsr {
13        &self.dhcsr
14    }
15    #[doc = "0x04 - Debug Core Register Selector Register"]
16    #[inline(always)]
17    pub const fn dcrsr(&self) -> &Dcrsr {
18        &self.dcrsr
19    }
20    #[doc = "0x08 - Debug Core Register Data Register"]
21    #[inline(always)]
22    pub const fn dcrdr(&self) -> &Dcrdr {
23        &self.dcrdr
24    }
25    #[doc = "0x0c - Debug Exception and Monitor Control Register"]
26    #[inline(always)]
27    pub const fn demcr(&self) -> &Demcr {
28        &self.demcr
29    }
30}
31#[doc = "DHCSR (rw) register accessor: Debug Halting Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dhcsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dhcsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dhcsr`]
32module"]
33#[doc(alias = "DHCSR")]
34pub type Dhcsr = crate::Reg<dhcsr::DhcsrSpec>;
35#[doc = "Debug Halting Control and Status Register"]
36pub mod dhcsr;
37#[doc = "DCRSR (w) register accessor: Debug Core Register Selector Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcrsr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcrsr`]
38module"]
39#[doc(alias = "DCRSR")]
40pub type Dcrsr = crate::Reg<dcrsr::DcrsrSpec>;
41#[doc = "Debug Core Register Selector Register"]
42pub mod dcrsr;
43#[doc = "DCRDR (rw) register accessor: Debug Core Register Data Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dcrdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcrdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcrdr`]
44module"]
45#[doc(alias = "DCRDR")]
46pub type Dcrdr = crate::Reg<dcrdr::DcrdrSpec>;
47#[doc = "Debug Core Register Data Register"]
48pub mod dcrdr;
49#[doc = "DEMCR (rw) register accessor: Debug Exception and Monitor Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`demcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`demcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@demcr`]
50module"]
51#[doc(alias = "DEMCR")]
52pub type Demcr = crate::Reg<demcr::DemcrSpec>;
53#[doc = "Debug Exception and Monitor Control Register"]
54pub mod demcr;
atsamd51g/core_debug.rs

atsamd51g/
core_debug.rs
