atsamd51g/oscctrl/
dpll.rs

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1#[repr(C)]
2#[doc = "DPLL\\[%s\\]"]
3#[doc(alias = "DPLL")]
4pub struct Dpll {
5    dpllctrla: Dpllctrla,
6    _reserved1: [u8; 0x03],
7    dpllratio: Dpllratio,
8    dpllctrlb: Dpllctrlb,
9    dpllsyncbusy: Dpllsyncbusy,
10    dpllstatus: Dpllstatus,
11}
12impl Dpll {
13    #[doc = "0x00 - DPLL Control A"]
14    #[inline(always)]
15    pub const fn dpllctrla(&self) -> &Dpllctrla {
16        &self.dpllctrla
17    }
18    #[doc = "0x04 - DPLL Ratio Control"]
19    #[inline(always)]
20    pub const fn dpllratio(&self) -> &Dpllratio {
21        &self.dpllratio
22    }
23    #[doc = "0x08 - DPLL Control B"]
24    #[inline(always)]
25    pub const fn dpllctrlb(&self) -> &Dpllctrlb {
26        &self.dpllctrlb
27    }
28    #[doc = "0x0c - DPLL Synchronization Busy"]
29    #[inline(always)]
30    pub const fn dpllsyncbusy(&self) -> &Dpllsyncbusy {
31        &self.dpllsyncbusy
32    }
33    #[doc = "0x10 - DPLL Status"]
34    #[inline(always)]
35    pub const fn dpllstatus(&self) -> &Dpllstatus {
36        &self.dpllstatus
37    }
38}
39#[doc = "DPLLCTRLA (rw) register accessor: DPLL Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllctrla::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllctrla::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllctrla`]
40module"]
41#[doc(alias = "DPLLCTRLA")]
42pub type Dpllctrla = crate::Reg<dpllctrla::DpllctrlaSpec>;
43#[doc = "DPLL Control A"]
44pub mod dpllctrla;
45#[doc = "DPLLRATIO (rw) register accessor: DPLL Ratio Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllratio::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllratio::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllratio`]
46module"]
47#[doc(alias = "DPLLRATIO")]
48pub type Dpllratio = crate::Reg<dpllratio::DpllratioSpec>;
49#[doc = "DPLL Ratio Control"]
50pub mod dpllratio;
51#[doc = "DPLLCTRLB (rw) register accessor: DPLL Control B\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllctrlb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dpllctrlb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllctrlb`]
52module"]
53#[doc(alias = "DPLLCTRLB")]
54pub type Dpllctrlb = crate::Reg<dpllctrlb::DpllctrlbSpec>;
55#[doc = "DPLL Control B"]
56pub mod dpllctrlb;
57#[doc = "DPLLSYNCBUSY (r) register accessor: DPLL Synchronization Busy\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllsyncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllsyncbusy`]
58module"]
59#[doc(alias = "DPLLSYNCBUSY")]
60pub type Dpllsyncbusy = crate::Reg<dpllsyncbusy::DpllsyncbusySpec>;
61#[doc = "DPLL Synchronization Busy"]
62pub mod dpllsyncbusy;
63#[doc = "DPLLSTATUS (r) register accessor: DPLL Status\n\nYou can [`read`](crate::Reg::read) this register and get [`dpllstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dpllstatus`]
64module"]
65#[doc(alias = "DPLLSTATUS")]
66pub type Dpllstatus = crate::Reg<dpllstatus::DpllstatusSpec>;
67#[doc = "DPLL Status"]
68pub mod dpllstatus;
atsamd51g/oscctrl/dpll.rs

atsamd51g/oscctrl/
dpll.rs
