atsamd51g/cmcc/
maint0.rs

1#[doc = "Register `MAINT0` writer"]
2pub type W = crate::W<Maint0Spec>;
3#[doc = "Field `INVALL` writer - Cache Controller invalidate All"]
4pub type InvallW<'a, REG> = crate::BitWriter<'a, REG>;
5impl W {
6    #[doc = "Bit 0 - Cache Controller invalidate All"]
7    #[inline(always)]
8    #[must_use]
9    pub fn invall(&mut self) -> InvallW<Maint0Spec> {
10        InvallW::new(self, 0)
11    }
12}
13#[doc = "Cache Maintenance Register 0\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`maint0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
14pub struct Maint0Spec;
15impl crate::RegisterSpec for Maint0Spec {
16    type Ux = u32;
17}
18#[doc = "`write(|w| ..)` method takes [`maint0::W`](W) writer structure"]
19impl crate::Writable for Maint0Spec {
20    type Safety = crate::Unsafe;
21    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
22    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
23}
24#[doc = "`reset()` method sets MAINT0 to value 0"]
25impl crate::Resettable for Maint0Spec {
26    const RESET_VALUE: u32 = 0;
27}