1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 ctrla: Ctrla,
5 evctrl: Evctrl,
6 dbgctrl: Dbgctrl,
7 inputctrl: Inputctrl,
8 ctrlb: Ctrlb,
9 refctrl: Refctrl,
10 _reserved6: [u8; 0x01],
11 avgctrl: Avgctrl,
12 sampctrl: Sampctrl,
13 winlt: Winlt,
14 winut: Winut,
15 gaincorr: Gaincorr,
16 offsetcorr: Offsetcorr,
17 swtrig: Swtrig,
18 _reserved13: [u8; 0x17],
19 intenclr: Intenclr,
20 intenset: Intenset,
21 intflag: Intflag,
22 status: Status,
23 syncbusy: Syncbusy,
24 dseqdata: Dseqdata,
25 dseqctrl: Dseqctrl,
26 dseqstat: Dseqstat,
27 result: Result,
28 _reserved22: [u8; 0x02],
29 ress: Ress,
30 _reserved23: [u8; 0x02],
31 calib: Calib,
32}
33impl RegisterBlock {
34#[doc = "0x00 - Control A"]
35 #[inline(always)]
36pub const fn ctrla(&self) -> &Ctrla {
37&self.ctrla
38 }
39#[doc = "0x02 - Event Control"]
40 #[inline(always)]
41pub const fn evctrl(&self) -> &Evctrl {
42&self.evctrl
43 }
44#[doc = "0x03 - Debug Control"]
45 #[inline(always)]
46pub const fn dbgctrl(&self) -> &Dbgctrl {
47&self.dbgctrl
48 }
49#[doc = "0x04 - Input Control"]
50 #[inline(always)]
51pub const fn inputctrl(&self) -> &Inputctrl {
52&self.inputctrl
53 }
54#[doc = "0x06 - Control B"]
55 #[inline(always)]
56pub const fn ctrlb(&self) -> &Ctrlb {
57&self.ctrlb
58 }
59#[doc = "0x08 - Reference Control"]
60 #[inline(always)]
61pub const fn refctrl(&self) -> &Refctrl {
62&self.refctrl
63 }
64#[doc = "0x0a - Average Control"]
65 #[inline(always)]
66pub const fn avgctrl(&self) -> &Avgctrl {
67&self.avgctrl
68 }
69#[doc = "0x0b - Sample Time Control"]
70 #[inline(always)]
71pub const fn sampctrl(&self) -> &Sampctrl {
72&self.sampctrl
73 }
74#[doc = "0x0c - Window Monitor Lower Threshold"]
75 #[inline(always)]
76pub const fn winlt(&self) -> &Winlt {
77&self.winlt
78 }
79#[doc = "0x0e - Window Monitor Upper Threshold"]
80 #[inline(always)]
81pub const fn winut(&self) -> &Winut {
82&self.winut
83 }
84#[doc = "0x10 - Gain Correction"]
85 #[inline(always)]
86pub const fn gaincorr(&self) -> &Gaincorr {
87&self.gaincorr
88 }
89#[doc = "0x12 - Offset Correction"]
90 #[inline(always)]
91pub const fn offsetcorr(&self) -> &Offsetcorr {
92&self.offsetcorr
93 }
94#[doc = "0x14 - Software Trigger"]
95 #[inline(always)]
96pub const fn swtrig(&self) -> &Swtrig {
97&self.swtrig
98 }
99#[doc = "0x2c - Interrupt Enable Clear"]
100 #[inline(always)]
101pub const fn intenclr(&self) -> &Intenclr {
102&self.intenclr
103 }
104#[doc = "0x2d - Interrupt Enable Set"]
105 #[inline(always)]
106pub const fn intenset(&self) -> &Intenset {
107&self.intenset
108 }
109#[doc = "0x2e - Interrupt Flag Status and Clear"]
110 #[inline(always)]
111pub const fn intflag(&self) -> &Intflag {
112&self.intflag
113 }
114#[doc = "0x2f - Status"]
115 #[inline(always)]
116pub const fn status(&self) -> &Status {
117&self.status
118 }
119#[doc = "0x30 - Synchronization Busy"]
120 #[inline(always)]
121pub const fn syncbusy(&self) -> &Syncbusy {
122&self.syncbusy
123 }
124#[doc = "0x34 - DMA Sequencial Data"]
125 #[inline(always)]
126pub const fn dseqdata(&self) -> &Dseqdata {
127&self.dseqdata
128 }
129#[doc = "0x38 - DMA Sequential Control"]
130 #[inline(always)]
131pub const fn dseqctrl(&self) -> &Dseqctrl {
132&self.dseqctrl
133 }
134#[doc = "0x3c - DMA Sequencial Status"]
135 #[inline(always)]
136pub const fn dseqstat(&self) -> &Dseqstat {
137&self.dseqstat
138 }
139#[doc = "0x40 - Result Conversion Value"]
140 #[inline(always)]
141pub const fn result(&self) -> &Result {
142&self.result
143 }
144#[doc = "0x44 - Last Sample Result"]
145 #[inline(always)]
146pub const fn ress(&self) -> &Ress {
147&self.ress
148 }
149#[doc = "0x48 - Calibration"]
150 #[inline(always)]
151pub const fn calib(&self) -> &Calib {
152&self.calib
153 }
154}
155#[doc = "CTRLA (rw) register accessor: Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrla::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrla::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrla`]
156module"]
157#[doc(alias = "CTRLA")]
158pub type Ctrla = crate::Reg<ctrla::CtrlaSpec>;
159#[doc = "Control A"]
160pub mod ctrla;
161#[doc = "EVCTRL (rw) register accessor: Event Control\n\nYou can [`read`](crate::Reg::read) this register and get [`evctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evctrl`]
162module"]
163#[doc(alias = "EVCTRL")]
164pub type Evctrl = crate::Reg<evctrl::EvctrlSpec>;
165#[doc = "Event Control"]
166pub mod evctrl;
167#[doc = "DBGCTRL (rw) register accessor: Debug Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbgctrl`]
168module"]
169#[doc(alias = "DBGCTRL")]
170pub type Dbgctrl = crate::Reg<dbgctrl::DbgctrlSpec>;
171#[doc = "Debug Control"]
172pub mod dbgctrl;
173#[doc = "INPUTCTRL (rw) register accessor: Input Control\n\nYou can [`read`](crate::Reg::read) this register and get [`inputctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`inputctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inputctrl`]
174module"]
175#[doc(alias = "INPUTCTRL")]
176pub type Inputctrl = crate::Reg<inputctrl::InputctrlSpec>;
177#[doc = "Input Control"]
178pub mod inputctrl;
179#[doc = "CTRLB (rw) register accessor: Control B\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrlb`]
180module"]
181#[doc(alias = "CTRLB")]
182pub type Ctrlb = crate::Reg<ctrlb::CtrlbSpec>;
183#[doc = "Control B"]
184pub mod ctrlb;
185#[doc = "REFCTRL (rw) register accessor: Reference Control\n\nYou can [`read`](crate::Reg::read) this register and get [`refctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`refctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refctrl`]
186module"]
187#[doc(alias = "REFCTRL")]
188pub type Refctrl = crate::Reg<refctrl::RefctrlSpec>;
189#[doc = "Reference Control"]
190pub mod refctrl;
191#[doc = "AVGCTRL (rw) register accessor: Average Control\n\nYou can [`read`](crate::Reg::read) this register and get [`avgctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`avgctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@avgctrl`]
192module"]
193#[doc(alias = "AVGCTRL")]
194pub type Avgctrl = crate::Reg<avgctrl::AvgctrlSpec>;
195#[doc = "Average Control"]
196pub mod avgctrl;
197#[doc = "SAMPCTRL (rw) register accessor: Sample Time Control\n\nYou can [`read`](crate::Reg::read) this register and get [`sampctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sampctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sampctrl`]
198module"]
199#[doc(alias = "SAMPCTRL")]
200pub type Sampctrl = crate::Reg<sampctrl::SampctrlSpec>;
201#[doc = "Sample Time Control"]
202pub mod sampctrl;
203#[doc = "WINLT (rw) register accessor: Window Monitor Lower Threshold\n\nYou can [`read`](crate::Reg::read) this register and get [`winlt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`winlt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@winlt`]
204module"]
205#[doc(alias = "WINLT")]
206pub type Winlt = crate::Reg<winlt::WinltSpec>;
207#[doc = "Window Monitor Lower Threshold"]
208pub mod winlt;
209#[doc = "WINUT (rw) register accessor: Window Monitor Upper Threshold\n\nYou can [`read`](crate::Reg::read) this register and get [`winut::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`winut::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@winut`]
210module"]
211#[doc(alias = "WINUT")]
212pub type Winut = crate::Reg<winut::WinutSpec>;
213#[doc = "Window Monitor Upper Threshold"]
214pub mod winut;
215#[doc = "GAINCORR (rw) register accessor: Gain Correction\n\nYou can [`read`](crate::Reg::read) this register and get [`gaincorr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gaincorr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gaincorr`]
216module"]
217#[doc(alias = "GAINCORR")]
218pub type Gaincorr = crate::Reg<gaincorr::GaincorrSpec>;
219#[doc = "Gain Correction"]
220pub mod gaincorr;
221#[doc = "OFFSETCORR (rw) register accessor: Offset Correction\n\nYou can [`read`](crate::Reg::read) this register and get [`offsetcorr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`offsetcorr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@offsetcorr`]
222module"]
223#[doc(alias = "OFFSETCORR")]
224pub type Offsetcorr = crate::Reg<offsetcorr::OffsetcorrSpec>;
225#[doc = "Offset Correction"]
226pub mod offsetcorr;
227#[doc = "SWTRIG (rw) register accessor: Software Trigger\n\nYou can [`read`](crate::Reg::read) this register and get [`swtrig::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swtrig::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swtrig`]
228module"]
229#[doc(alias = "SWTRIG")]
230pub type Swtrig = crate::Reg<swtrig::SwtrigSpec>;
231#[doc = "Software Trigger"]
232pub mod swtrig;
233#[doc = "INTENCLR (rw) register accessor: Interrupt Enable Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intenclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenclr`]
234module"]
235#[doc(alias = "INTENCLR")]
236pub type Intenclr = crate::Reg<intenclr::IntenclrSpec>;
237#[doc = "Interrupt Enable Clear"]
238pub mod intenclr;
239#[doc = "INTENSET (rw) register accessor: Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`intenset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenset`]
240module"]
241#[doc(alias = "INTENSET")]
242pub type Intenset = crate::Reg<intenset::IntensetSpec>;
243#[doc = "Interrupt Enable Set"]
244pub mod intenset;
245#[doc = "INTFLAG (rw) register accessor: Interrupt Flag Status and Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intflag`]
246module"]
247#[doc(alias = "INTFLAG")]
248pub type Intflag = crate::Reg<intflag::IntflagSpec>;
249#[doc = "Interrupt Flag Status and Clear"]
250pub mod intflag;
251#[doc = "STATUS (r) register accessor: Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
252module"]
253#[doc(alias = "STATUS")]
254pub type Status = crate::Reg<status::StatusSpec>;
255#[doc = "Status"]
256pub mod status;
257#[doc = "SYNCBUSY (r) register accessor: Synchronization Busy\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`]
258module"]
259#[doc(alias = "SYNCBUSY")]
260pub type Syncbusy = crate::Reg<syncbusy::SyncbusySpec>;
261#[doc = "Synchronization Busy"]
262pub mod syncbusy;
263#[doc = "DSEQDATA (w) register accessor: DMA Sequencial Data\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dseqdata::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dseqdata`]
264module"]
265#[doc(alias = "DSEQDATA")]
266pub type Dseqdata = crate::Reg<dseqdata::DseqdataSpec>;
267#[doc = "DMA Sequencial Data"]
268pub mod dseqdata;
269#[doc = "DSEQCTRL (rw) register accessor: DMA Sequential Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dseqctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dseqctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dseqctrl`]
270module"]
271#[doc(alias = "DSEQCTRL")]
272pub type Dseqctrl = crate::Reg<dseqctrl::DseqctrlSpec>;
273#[doc = "DMA Sequential Control"]
274pub mod dseqctrl;
275#[doc = "DSEQSTAT (r) register accessor: DMA Sequencial Status\n\nYou can [`read`](crate::Reg::read) this register and get [`dseqstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dseqstat`]
276module"]
277#[doc(alias = "DSEQSTAT")]
278pub type Dseqstat = crate::Reg<dseqstat::DseqstatSpec>;
279#[doc = "DMA Sequencial Status"]
280pub mod dseqstat;
281#[doc = "RESULT (r) register accessor: Result Conversion Value\n\nYou can [`read`](crate::Reg::read) this register and get [`result::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@result`]
282module"]
283#[doc(alias = "RESULT")]
284pub type Result = crate::Reg<result::ResultSpec>;
285#[doc = "Result Conversion Value"]
286pub mod result;
287#[doc = "RESS (r) register accessor: Last Sample Result\n\nYou can [`read`](crate::Reg::read) this register and get [`ress::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ress`]
288module"]
289#[doc(alias = "RESS")]
290pub type Ress = crate::Reg<ress::RessSpec>;
291#[doc = "Last Sample Result"]
292pub mod ress;
293#[doc = "CALIB (rw) register accessor: Calibration\n\nYou can [`read`](crate::Reg::read) this register and get [`calib::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`calib::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@calib`]
294module"]
295#[doc(alias = "CALIB")]
296pub type Calib = crate::Reg<calib::CalibSpec>;
297#[doc = "Calibration"]
298pub mod calib;