atsamd51p/
system_control.rs

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1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    _reserved0: [u8; 0x04],
5    ictr: Ictr,
6    actlr: Actlr,
7    _reserved2: [u8; 0x0cf4],
8    cpuid: Cpuid,
9    icsr: Icsr,
10    vtor: Vtor,
11    aircr: Aircr,
12    scr: Scr,
13    ccr: Ccr,
14    shpr1: Shpr1,
15    shpr2: Shpr2,
16    shpr3: Shpr3,
17    shcsr: Shcsr,
18    cfsr: Cfsr,
19    hfsr: Hfsr,
20    dfsr: Dfsr,
21    mmfar: Mmfar,
22    bfar: Bfar,
23    afsr: Afsr,
24    pfr: [Pfr; 2],
25    dfr: Dfr,
26    adr: Adr,
27    mmfr: [Mmfr; 4],
28    isar: [Isar; 5],
29    _reserved23: [u8; 0x14],
30    cpacr: Cpacr,
31}
32impl RegisterBlock {
33    #[doc = "0x04 - Interrupt Controller Type Register"]
34    #[inline(always)]
35    pub const fn ictr(&self) -> &Ictr {
36        &self.ictr
37    }
38    #[doc = "0x08 - Auxiliary Control Register"]
39    #[inline(always)]
40    pub const fn actlr(&self) -> &Actlr {
41        &self.actlr
42    }
43    #[doc = "0xd00 - CPUID Base Register"]
44    #[inline(always)]
45    pub const fn cpuid(&self) -> &Cpuid {
46        &self.cpuid
47    }
48    #[doc = "0xd04 - Interrupt Control and State Register"]
49    #[inline(always)]
50    pub const fn icsr(&self) -> &Icsr {
51        &self.icsr
52    }
53    #[doc = "0xd08 - Vector Table Offset Register"]
54    #[inline(always)]
55    pub const fn vtor(&self) -> &Vtor {
56        &self.vtor
57    }
58    #[doc = "0xd0c - Application Interrupt and Reset Control Register"]
59    #[inline(always)]
60    pub const fn aircr(&self) -> &Aircr {
61        &self.aircr
62    }
63    #[doc = "0xd10 - System Control Register"]
64    #[inline(always)]
65    pub const fn scr(&self) -> &Scr {
66        &self.scr
67    }
68    #[doc = "0xd14 - Configuration and Control Register"]
69    #[inline(always)]
70    pub const fn ccr(&self) -> &Ccr {
71        &self.ccr
72    }
73    #[doc = "0xd18 - System Handler Priority Register 1"]
74    #[inline(always)]
75    pub const fn shpr1(&self) -> &Shpr1 {
76        &self.shpr1
77    }
78    #[doc = "0xd1c - System Handler Priority Register 2"]
79    #[inline(always)]
80    pub const fn shpr2(&self) -> &Shpr2 {
81        &self.shpr2
82    }
83    #[doc = "0xd20 - System Handler Priority Register 3"]
84    #[inline(always)]
85    pub const fn shpr3(&self) -> &Shpr3 {
86        &self.shpr3
87    }
88    #[doc = "0xd24 - System Handler Control and State Register"]
89    #[inline(always)]
90    pub const fn shcsr(&self) -> &Shcsr {
91        &self.shcsr
92    }
93    #[doc = "0xd28 - Configurable Fault Status Register"]
94    #[inline(always)]
95    pub const fn cfsr(&self) -> &Cfsr {
96        &self.cfsr
97    }
98    #[doc = "0xd2c - HardFault Status Register"]
99    #[inline(always)]
100    pub const fn hfsr(&self) -> &Hfsr {
101        &self.hfsr
102    }
103    #[doc = "0xd30 - Debug Fault Status Register"]
104    #[inline(always)]
105    pub const fn dfsr(&self) -> &Dfsr {
106        &self.dfsr
107    }
108    #[doc = "0xd34 - MemManage Fault Address Register"]
109    #[inline(always)]
110    pub const fn mmfar(&self) -> &Mmfar {
111        &self.mmfar
112    }
113    #[doc = "0xd38 - BusFault Address Register"]
114    #[inline(always)]
115    pub const fn bfar(&self) -> &Bfar {
116        &self.bfar
117    }
118    #[doc = "0xd3c - Auxiliary Fault Status Register"]
119    #[inline(always)]
120    pub const fn afsr(&self) -> &Afsr {
121        &self.afsr
122    }
123    #[doc = "0xd40..0xd48 - Processor Feature Register"]
124    #[inline(always)]
125    pub const fn pfr(&self, n: usize) -> &Pfr {
126        &self.pfr[n]
127    }
128    #[doc = "Iterator for array of:"]
129    #[doc = "0xd40..0xd48 - Processor Feature Register"]
130    #[inline(always)]
131    pub fn pfr_iter(&self) -> impl Iterator<Item = &Pfr> {
132        self.pfr.iter()
133    }
134    #[doc = "0xd48 - Debug Feature Register"]
135    #[inline(always)]
136    pub const fn dfr(&self) -> &Dfr {
137        &self.dfr
138    }
139    #[doc = "0xd4c - Auxiliary Feature Register"]
140    #[inline(always)]
141    pub const fn adr(&self) -> &Adr {
142        &self.adr
143    }
144    #[doc = "0xd50..0xd60 - Memory Model Feature Register"]
145    #[inline(always)]
146    pub const fn mmfr(&self, n: usize) -> &Mmfr {
147        &self.mmfr[n]
148    }
149    #[doc = "Iterator for array of:"]
150    #[doc = "0xd50..0xd60 - Memory Model Feature Register"]
151    #[inline(always)]
152    pub fn mmfr_iter(&self) -> impl Iterator<Item = &Mmfr> {
153        self.mmfr.iter()
154    }
155    #[doc = "0xd60..0xd74 - Instruction Set Attributes Register"]
156    #[inline(always)]
157    pub const fn isar(&self, n: usize) -> &Isar {
158        &self.isar[n]
159    }
160    #[doc = "Iterator for array of:"]
161    #[doc = "0xd60..0xd74 - Instruction Set Attributes Register"]
162    #[inline(always)]
163    pub fn isar_iter(&self) -> impl Iterator<Item = &Isar> {
164        self.isar.iter()
165    }
166    #[doc = "0xd88 - Coprocessor Access Control Register"]
167    #[inline(always)]
168    pub const fn cpacr(&self) -> &Cpacr {
169        &self.cpacr
170    }
171}
172#[doc = "ICTR (r) register accessor: Interrupt Controller Type Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ictr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ictr`]
173module"]
174#[doc(alias = "ICTR")]
175pub type Ictr = crate::Reg<ictr::IctrSpec>;
176#[doc = "Interrupt Controller Type Register"]
177pub mod ictr;
178#[doc = "ACTLR (rw) register accessor: Auxiliary Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`actlr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`actlr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@actlr`]
179module"]
180#[doc(alias = "ACTLR")]
181pub type Actlr = crate::Reg<actlr::ActlrSpec>;
182#[doc = "Auxiliary Control Register"]
183pub mod actlr;
184#[doc = "CPUID (r) register accessor: CPUID Base Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpuid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuid`]
185module"]
186#[doc(alias = "CPUID")]
187pub type Cpuid = crate::Reg<cpuid::CpuidSpec>;
188#[doc = "CPUID Base Register"]
189pub mod cpuid;
190#[doc = "ICSR (rw) register accessor: Interrupt Control and State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`icsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icsr`]
191module"]
192#[doc(alias = "ICSR")]
193pub type Icsr = crate::Reg<icsr::IcsrSpec>;
194#[doc = "Interrupt Control and State Register"]
195pub mod icsr;
196#[doc = "VTOR (rw) register accessor: Vector Table Offset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`vtor::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vtor::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vtor`]
197module"]
198#[doc(alias = "VTOR")]
199pub type Vtor = crate::Reg<vtor::VtorSpec>;
200#[doc = "Vector Table Offset Register"]
201pub mod vtor;
202#[doc = "AIRCR (rw) register accessor: Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`aircr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aircr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aircr`]
203module"]
204#[doc(alias = "AIRCR")]
205pub type Aircr = crate::Reg<aircr::AircrSpec>;
206#[doc = "Application Interrupt and Reset Control Register"]
207pub mod aircr;
208#[doc = "SCR (rw) register accessor: System Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`scr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr`]
209module"]
210#[doc(alias = "SCR")]
211pub type Scr = crate::Reg<scr::ScrSpec>;
212#[doc = "System Control Register"]
213pub mod scr;
214#[doc = "CCR (rw) register accessor: Configuration and Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`]
215module"]
216#[doc(alias = "CCR")]
217pub type Ccr = crate::Reg<ccr::CcrSpec>;
218#[doc = "Configuration and Control Register"]
219pub mod ccr;
220#[doc = "SHPR1 (rw) register accessor: System Handler Priority Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr1`]
221module"]
222#[doc(alias = "SHPR1")]
223pub type Shpr1 = crate::Reg<shpr1::Shpr1Spec>;
224#[doc = "System Handler Priority Register 1"]
225pub mod shpr1;
226#[doc = "SHPR2 (rw) register accessor: System Handler Priority Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr2`]
227module"]
228#[doc(alias = "SHPR2")]
229pub type Shpr2 = crate::Reg<shpr2::Shpr2Spec>;
230#[doc = "System Handler Priority Register 2"]
231pub mod shpr2;
232#[doc = "SHPR3 (rw) register accessor: System Handler Priority Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr3`]
233module"]
234#[doc(alias = "SHPR3")]
235pub type Shpr3 = crate::Reg<shpr3::Shpr3Spec>;
236#[doc = "System Handler Priority Register 3"]
237pub mod shpr3;
238#[doc = "SHCSR (rw) register accessor: System Handler Control and State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`shcsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shcsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shcsr`]
239module"]
240#[doc(alias = "SHCSR")]
241pub type Shcsr = crate::Reg<shcsr::ShcsrSpec>;
242#[doc = "System Handler Control and State Register"]
243pub mod shcsr;
244#[doc = "CFSR (rw) register accessor: Configurable Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cfsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfsr`]
245module"]
246#[doc(alias = "CFSR")]
247pub type Cfsr = crate::Reg<cfsr::CfsrSpec>;
248#[doc = "Configurable Fault Status Register"]
249pub mod cfsr;
250#[doc = "HFSR (rw) register accessor: HardFault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hfsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfsr`]
251module"]
252#[doc(alias = "HFSR")]
253pub type Hfsr = crate::Reg<hfsr::HfsrSpec>;
254#[doc = "HardFault Status Register"]
255pub mod hfsr;
256#[doc = "DFSR (rw) register accessor: Debug Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dfsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dfsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dfsr`]
257module"]
258#[doc(alias = "DFSR")]
259pub type Dfsr = crate::Reg<dfsr::DfsrSpec>;
260#[doc = "Debug Fault Status Register"]
261pub mod dfsr;
262#[doc = "MMFAR (rw) register accessor: MemManage Fault Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmfar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmfar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmfar`]
263module"]
264#[doc(alias = "MMFAR")]
265pub type Mmfar = crate::Reg<mmfar::MmfarSpec>;
266#[doc = "MemManage Fault Address Register"]
267pub mod mmfar;
268#[doc = "BFAR (rw) register accessor: BusFault Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bfar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bfar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfar`]
269module"]
270#[doc(alias = "BFAR")]
271pub type Bfar = crate::Reg<bfar::BfarSpec>;
272#[doc = "BusFault Address Register"]
273pub mod bfar;
274#[doc = "AFSR (rw) register accessor: Auxiliary Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`afsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`afsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@afsr`]
275module"]
276#[doc(alias = "AFSR")]
277pub type Afsr = crate::Reg<afsr::AfsrSpec>;
278#[doc = "Auxiliary Fault Status Register"]
279pub mod afsr;
280#[doc = "PFR (rw) register accessor: Processor Feature Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pfr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pfr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pfr`]
281module"]
282#[doc(alias = "PFR")]
283pub type Pfr = crate::Reg<pfr::PfrSpec>;
284#[doc = "Processor Feature Register"]
285pub mod pfr;
286#[doc = "DFR (r) register accessor: Debug Feature Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dfr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dfr`]
287module"]
288#[doc(alias = "DFR")]
289pub type Dfr = crate::Reg<dfr::DfrSpec>;
290#[doc = "Debug Feature Register"]
291pub mod dfr;
292#[doc = "ADR (r) register accessor: Auxiliary Feature Register\n\nYou can [`read`](crate::Reg::read) this register and get [`adr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adr`]
293module"]
294#[doc(alias = "ADR")]
295pub type Adr = crate::Reg<adr::AdrSpec>;
296#[doc = "Auxiliary Feature Register"]
297pub mod adr;
298#[doc = "MMFR (r) register accessor: Memory Model Feature Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmfr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmfr`]
299module"]
300#[doc(alias = "MMFR")]
301pub type Mmfr = crate::Reg<mmfr::MmfrSpec>;
302#[doc = "Memory Model Feature Register"]
303pub mod mmfr;
304#[doc = "ISAR (r) register accessor: Instruction Set Attributes Register\n\nYou can [`read`](crate::Reg::read) this register and get [`isar::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isar`]
305module"]
306#[doc(alias = "ISAR")]
307pub type Isar = crate::Reg<isar::IsarSpec>;
308#[doc = "Instruction Set Attributes Register"]
309pub mod isar;
310#[doc = "CPACR (rw) register accessor: Coprocessor Access Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpacr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpacr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpacr`]
311module"]
312#[doc(alias = "CPACR")]
313pub type Cpacr = crate::Reg<cpacr::CpacrSpec>;
314#[doc = "Coprocessor Access Control Register"]
315pub mod cpacr;
atsamd51p/system_control.rs

atsamd51p/
system_control.rs
