atsamd51p/mclk/
apbamask.rs1#[doc = "Register `APBAMASK` reader"]
2pub type R = crate::R<ApbamaskSpec>;
3#[doc = "Register `APBAMASK` writer"]
4pub type W = crate::W<ApbamaskSpec>;
5#[doc = "Field `PAC_` reader - PAC APB Clock Enable"]
6pub type Pac_R = crate::BitReader;
7#[doc = "Field `PAC_` writer - PAC APB Clock Enable"]
8pub type Pac_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PM_` reader - PM APB Clock Enable"]
10pub type Pm_R = crate::BitReader;
11#[doc = "Field `PM_` writer - PM APB Clock Enable"]
12pub type Pm_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `MCLK_` reader - MCLK APB Clock Enable"]
14pub type Mclk_R = crate::BitReader;
15#[doc = "Field `MCLK_` writer - MCLK APB Clock Enable"]
16pub type Mclk_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RSTC_` reader - RSTC APB Clock Enable"]
18pub type Rstc_R = crate::BitReader;
19#[doc = "Field `RSTC_` writer - RSTC APB Clock Enable"]
20pub type Rstc_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `OSCCTRL_` reader - OSCCTRL APB Clock Enable"]
22pub type Oscctrl_R = crate::BitReader;
23#[doc = "Field `OSCCTRL_` writer - OSCCTRL APB Clock Enable"]
24pub type Oscctrl_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `OSC32KCTRL_` reader - OSC32KCTRL APB Clock Enable"]
26pub type Osc32kctrl_R = crate::BitReader;
27#[doc = "Field `OSC32KCTRL_` writer - OSC32KCTRL APB Clock Enable"]
28pub type Osc32kctrl_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `SUPC_` reader - SUPC APB Clock Enable"]
30pub type Supc_R = crate::BitReader;
31#[doc = "Field `SUPC_` writer - SUPC APB Clock Enable"]
32pub type Supc_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `GCLK_` reader - GCLK APB Clock Enable"]
34pub type Gclk_R = crate::BitReader;
35#[doc = "Field `GCLK_` writer - GCLK APB Clock Enable"]
36pub type Gclk_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `WDT_` reader - WDT APB Clock Enable"]
38pub type Wdt_R = crate::BitReader;
39#[doc = "Field `WDT_` writer - WDT APB Clock Enable"]
40pub type Wdt_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `RTC_` reader - RTC APB Clock Enable"]
42pub type Rtc_R = crate::BitReader;
43#[doc = "Field `RTC_` writer - RTC APB Clock Enable"]
44pub type Rtc_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `EIC_` reader - EIC APB Clock Enable"]
46pub type Eic_R = crate::BitReader;
47#[doc = "Field `EIC_` writer - EIC APB Clock Enable"]
48pub type Eic_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `FREQM_` reader - FREQM APB Clock Enable"]
50pub type Freqm_R = crate::BitReader;
51#[doc = "Field `FREQM_` writer - FREQM APB Clock Enable"]
52pub type Freqm_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `SERCOM0_` reader - SERCOM0 APB Clock Enable"]
54pub type Sercom0_R = crate::BitReader;
55#[doc = "Field `SERCOM0_` writer - SERCOM0 APB Clock Enable"]
56pub type Sercom0_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `SERCOM1_` reader - SERCOM1 APB Clock Enable"]
58pub type Sercom1_R = crate::BitReader;
59#[doc = "Field `SERCOM1_` writer - SERCOM1 APB Clock Enable"]
60pub type Sercom1_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `TC0_` reader - TC0 APB Clock Enable"]
62pub type Tc0_R = crate::BitReader;
63#[doc = "Field `TC0_` writer - TC0 APB Clock Enable"]
64pub type Tc0_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `TC1_` reader - TC1 APB Clock Enable"]
66pub type Tc1_R = crate::BitReader;
67#[doc = "Field `TC1_` writer - TC1 APB Clock Enable"]
68pub type Tc1_W<'a, REG> = crate::BitWriter<'a, REG>;
69impl R {
70 #[doc = "Bit 0 - PAC APB Clock Enable"]
71 #[inline(always)]
72 pub fn pac_(&self) -> Pac_R {
73 Pac_R::new((self.bits & 1) != 0)
74 }
75 #[doc = "Bit 1 - PM APB Clock Enable"]
76 #[inline(always)]
77 pub fn pm_(&self) -> Pm_R {
78 Pm_R::new(((self.bits >> 1) & 1) != 0)
79 }
80 #[doc = "Bit 2 - MCLK APB Clock Enable"]
81 #[inline(always)]
82 pub fn mclk_(&self) -> Mclk_R {
83 Mclk_R::new(((self.bits >> 2) & 1) != 0)
84 }
85 #[doc = "Bit 3 - RSTC APB Clock Enable"]
86 #[inline(always)]
87 pub fn rstc_(&self) -> Rstc_R {
88 Rstc_R::new(((self.bits >> 3) & 1) != 0)
89 }
90 #[doc = "Bit 4 - OSCCTRL APB Clock Enable"]
91 #[inline(always)]
92 pub fn oscctrl_(&self) -> Oscctrl_R {
93 Oscctrl_R::new(((self.bits >> 4) & 1) != 0)
94 }
95 #[doc = "Bit 5 - OSC32KCTRL APB Clock Enable"]
96 #[inline(always)]
97 pub fn osc32kctrl_(&self) -> Osc32kctrl_R {
98 Osc32kctrl_R::new(((self.bits >> 5) & 1) != 0)
99 }
100 #[doc = "Bit 6 - SUPC APB Clock Enable"]
101 #[inline(always)]
102 pub fn supc_(&self) -> Supc_R {
103 Supc_R::new(((self.bits >> 6) & 1) != 0)
104 }
105 #[doc = "Bit 7 - GCLK APB Clock Enable"]
106 #[inline(always)]
107 pub fn gclk_(&self) -> Gclk_R {
108 Gclk_R::new(((self.bits >> 7) & 1) != 0)
109 }
110 #[doc = "Bit 8 - WDT APB Clock Enable"]
111 #[inline(always)]
112 pub fn wdt_(&self) -> Wdt_R {
113 Wdt_R::new(((self.bits >> 8) & 1) != 0)
114 }
115 #[doc = "Bit 9 - RTC APB Clock Enable"]
116 #[inline(always)]
117 pub fn rtc_(&self) -> Rtc_R {
118 Rtc_R::new(((self.bits >> 9) & 1) != 0)
119 }
120 #[doc = "Bit 10 - EIC APB Clock Enable"]
121 #[inline(always)]
122 pub fn eic_(&self) -> Eic_R {
123 Eic_R::new(((self.bits >> 10) & 1) != 0)
124 }
125 #[doc = "Bit 11 - FREQM APB Clock Enable"]
126 #[inline(always)]
127 pub fn freqm_(&self) -> Freqm_R {
128 Freqm_R::new(((self.bits >> 11) & 1) != 0)
129 }
130 #[doc = "Bit 12 - SERCOM0 APB Clock Enable"]
131 #[inline(always)]
132 pub fn sercom0_(&self) -> Sercom0_R {
133 Sercom0_R::new(((self.bits >> 12) & 1) != 0)
134 }
135 #[doc = "Bit 13 - SERCOM1 APB Clock Enable"]
136 #[inline(always)]
137 pub fn sercom1_(&self) -> Sercom1_R {
138 Sercom1_R::new(((self.bits >> 13) & 1) != 0)
139 }
140 #[doc = "Bit 14 - TC0 APB Clock Enable"]
141 #[inline(always)]
142 pub fn tc0_(&self) -> Tc0_R {
143 Tc0_R::new(((self.bits >> 14) & 1) != 0)
144 }
145 #[doc = "Bit 15 - TC1 APB Clock Enable"]
146 #[inline(always)]
147 pub fn tc1_(&self) -> Tc1_R {
148 Tc1_R::new(((self.bits >> 15) & 1) != 0)
149 }
150}
151impl W {
152 #[doc = "Bit 0 - PAC APB Clock Enable"]
153 #[inline(always)]
154 #[must_use]
155 pub fn pac_(&mut self) -> Pac_W<ApbamaskSpec> {
156 Pac_W::new(self, 0)
157 }
158 #[doc = "Bit 1 - PM APB Clock Enable"]
159 #[inline(always)]
160 #[must_use]
161 pub fn pm_(&mut self) -> Pm_W<ApbamaskSpec> {
162 Pm_W::new(self, 1)
163 }
164 #[doc = "Bit 2 - MCLK APB Clock Enable"]
165 #[inline(always)]
166 #[must_use]
167 pub fn mclk_(&mut self) -> Mclk_W<ApbamaskSpec> {
168 Mclk_W::new(self, 2)
169 }
170 #[doc = "Bit 3 - RSTC APB Clock Enable"]
171 #[inline(always)]
172 #[must_use]
173 pub fn rstc_(&mut self) -> Rstc_W<ApbamaskSpec> {
174 Rstc_W::new(self, 3)
175 }
176 #[doc = "Bit 4 - OSCCTRL APB Clock Enable"]
177 #[inline(always)]
178 #[must_use]
179 pub fn oscctrl_(&mut self) -> Oscctrl_W<ApbamaskSpec> {
180 Oscctrl_W::new(self, 4)
181 }
182 #[doc = "Bit 5 - OSC32KCTRL APB Clock Enable"]
183 #[inline(always)]
184 #[must_use]
185 pub fn osc32kctrl_(&mut self) -> Osc32kctrl_W<ApbamaskSpec> {
186 Osc32kctrl_W::new(self, 5)
187 }
188 #[doc = "Bit 6 - SUPC APB Clock Enable"]
189 #[inline(always)]
190 #[must_use]
191 pub fn supc_(&mut self) -> Supc_W<ApbamaskSpec> {
192 Supc_W::new(self, 6)
193 }
194 #[doc = "Bit 7 - GCLK APB Clock Enable"]
195 #[inline(always)]
196 #[must_use]
197 pub fn gclk_(&mut self) -> Gclk_W<ApbamaskSpec> {
198 Gclk_W::new(self, 7)
199 }
200 #[doc = "Bit 8 - WDT APB Clock Enable"]
201 #[inline(always)]
202 #[must_use]
203 pub fn wdt_(&mut self) -> Wdt_W<ApbamaskSpec> {
204 Wdt_W::new(self, 8)
205 }
206 #[doc = "Bit 9 - RTC APB Clock Enable"]
207 #[inline(always)]
208 #[must_use]
209 pub fn rtc_(&mut self) -> Rtc_W<ApbamaskSpec> {
210 Rtc_W::new(self, 9)
211 }
212 #[doc = "Bit 10 - EIC APB Clock Enable"]
213 #[inline(always)]
214 #[must_use]
215 pub fn eic_(&mut self) -> Eic_W<ApbamaskSpec> {
216 Eic_W::new(self, 10)
217 }
218 #[doc = "Bit 11 - FREQM APB Clock Enable"]
219 #[inline(always)]
220 #[must_use]
221 pub fn freqm_(&mut self) -> Freqm_W<ApbamaskSpec> {
222 Freqm_W::new(self, 11)
223 }
224 #[doc = "Bit 12 - SERCOM0 APB Clock Enable"]
225 #[inline(always)]
226 #[must_use]
227 pub fn sercom0_(&mut self) -> Sercom0_W<ApbamaskSpec> {
228 Sercom0_W::new(self, 12)
229 }
230 #[doc = "Bit 13 - SERCOM1 APB Clock Enable"]
231 #[inline(always)]
232 #[must_use]
233 pub fn sercom1_(&mut self) -> Sercom1_W<ApbamaskSpec> {
234 Sercom1_W::new(self, 13)
235 }
236 #[doc = "Bit 14 - TC0 APB Clock Enable"]
237 #[inline(always)]
238 #[must_use]
239 pub fn tc0_(&mut self) -> Tc0_W<ApbamaskSpec> {
240 Tc0_W::new(self, 14)
241 }
242 #[doc = "Bit 15 - TC1 APB Clock Enable"]
243 #[inline(always)]
244 #[must_use]
245 pub fn tc1_(&mut self) -> Tc1_W<ApbamaskSpec> {
246 Tc1_W::new(self, 15)
247 }
248}
249#[doc = "APBA Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`apbamask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apbamask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
250pub struct ApbamaskSpec;
251impl crate::RegisterSpec for ApbamaskSpec {
252 type Ux = u32;
253}
254#[doc = "`read()` method returns [`apbamask::R`](R) reader structure"]
255impl crate::Readable for ApbamaskSpec {}
256#[doc = "`write(|w| ..)` method takes [`apbamask::W`](W) writer structure"]
257impl crate::Writable for ApbamaskSpec {
258 type Safety = crate::Unsafe;
259 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
260 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
261}
262#[doc = "`reset()` method sets APBAMASK to value 0x07ff"]
263impl crate::Resettable for ApbamaskSpec {
264 const RESET_VALUE: u32 = 0x07ff;
265}