atsamd51p/supc/
intenset.rs

1#[doc = "Register `INTENSET` reader"]
2pub type R = crate::R<IntensetSpec>;
3#[doc = "Register `INTENSET` writer"]
4pub type W = crate::W<IntensetSpec>;
5#[doc = "Field `BOD33RDY` reader - BOD33 Ready"]
6pub type Bod33rdyR = crate::BitReader;
7#[doc = "Field `BOD33RDY` writer - BOD33 Ready"]
8pub type Bod33rdyW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `BOD33DET` reader - BOD33 Detection"]
10pub type Bod33detR = crate::BitReader;
11#[doc = "Field `BOD33DET` writer - BOD33 Detection"]
12pub type Bod33detW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `B33SRDY` reader - BOD33 Synchronization Ready"]
14pub type B33srdyR = crate::BitReader;
15#[doc = "Field `B33SRDY` writer - BOD33 Synchronization Ready"]
16pub type B33srdyW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `VREGRDY` reader - Voltage Regulator Ready"]
18pub type VregrdyR = crate::BitReader;
19#[doc = "Field `VREGRDY` writer - Voltage Regulator Ready"]
20pub type VregrdyW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `VCORERDY` reader - VDDCORE Ready"]
22pub type VcorerdyR = crate::BitReader;
23#[doc = "Field `VCORERDY` writer - VDDCORE Ready"]
24pub type VcorerdyW<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26    #[doc = "Bit 0 - BOD33 Ready"]
27    #[inline(always)]
28    pub fn bod33rdy(&self) -> Bod33rdyR {
29        Bod33rdyR::new((self.bits & 1) != 0)
30    }
31    #[doc = "Bit 1 - BOD33 Detection"]
32    #[inline(always)]
33    pub fn bod33det(&self) -> Bod33detR {
34        Bod33detR::new(((self.bits >> 1) & 1) != 0)
35    }
36    #[doc = "Bit 2 - BOD33 Synchronization Ready"]
37    #[inline(always)]
38    pub fn b33srdy(&self) -> B33srdyR {
39        B33srdyR::new(((self.bits >> 2) & 1) != 0)
40    }
41    #[doc = "Bit 8 - Voltage Regulator Ready"]
42    #[inline(always)]
43    pub fn vregrdy(&self) -> VregrdyR {
44        VregrdyR::new(((self.bits >> 8) & 1) != 0)
45    }
46    #[doc = "Bit 10 - VDDCORE Ready"]
47    #[inline(always)]
48    pub fn vcorerdy(&self) -> VcorerdyR {
49        VcorerdyR::new(((self.bits >> 10) & 1) != 0)
50    }
51}
52impl W {
53    #[doc = "Bit 0 - BOD33 Ready"]
54    #[inline(always)]
55    #[must_use]
56    pub fn bod33rdy(&mut self) -> Bod33rdyW<IntensetSpec> {
57        Bod33rdyW::new(self, 0)
58    }
59    #[doc = "Bit 1 - BOD33 Detection"]
60    #[inline(always)]
61    #[must_use]
62    pub fn bod33det(&mut self) -> Bod33detW<IntensetSpec> {
63        Bod33detW::new(self, 1)
64    }
65    #[doc = "Bit 2 - BOD33 Synchronization Ready"]
66    #[inline(always)]
67    #[must_use]
68    pub fn b33srdy(&mut self) -> B33srdyW<IntensetSpec> {
69        B33srdyW::new(self, 2)
70    }
71    #[doc = "Bit 8 - Voltage Regulator Ready"]
72    #[inline(always)]
73    #[must_use]
74    pub fn vregrdy(&mut self) -> VregrdyW<IntensetSpec> {
75        VregrdyW::new(self, 8)
76    }
77    #[doc = "Bit 10 - VDDCORE Ready"]
78    #[inline(always)]
79    #[must_use]
80    pub fn vcorerdy(&mut self) -> VcorerdyW<IntensetSpec> {
81        VcorerdyW::new(self, 10)
82    }
83}
84#[doc = "Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`intenset::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenset::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
85pub struct IntensetSpec;
86impl crate::RegisterSpec for IntensetSpec {
87    type Ux = u32;
88}
89#[doc = "`read()` method returns [`intenset::R`](R) reader structure"]
90impl crate::Readable for IntensetSpec {}
91#[doc = "`write(|w| ..)` method takes [`intenset::W`](W) writer structure"]
92impl crate::Writable for IntensetSpec {
93    type Safety = crate::Unsafe;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
96}
97#[doc = "`reset()` method sets INTENSET to value 0"]
98impl crate::Resettable for IntensetSpec {
99    const RESET_VALUE: u32 = 0;
100}