atsamd51p/sdhc0/
hc1r.rs

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1#[doc = "Register `HC1R` reader"]
2pub type R = crate::R<Hc1rSpec>;
3#[doc = "Register `HC1R` writer"]
4pub type W = crate::W<Hc1rSpec>;
5#[doc = "LED Control\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum Ledctrlselect {
8    #[doc = "0: LED off"]
9    Off = 0,
10    #[doc = "1: LED on"]
11    On = 1,
12}
13impl From<Ledctrlselect> for bool {
14    #[inline(always)]
15    fn from(variant: Ledctrlselect) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `LEDCTRL` reader - LED Control"]
20pub type LedctrlR = crate::BitReader<Ledctrlselect>;
21impl LedctrlR {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> Ledctrlselect {
25        match self.bits {
26            false => Ledctrlselect::Off,
27            true => Ledctrlselect::On,
28        }
29    }
30    #[doc = "LED off"]
31    #[inline(always)]
32    pub fn is_off(&self) -> bool {
33        *self == Ledctrlselect::Off
34    }
35    #[doc = "LED on"]
36    #[inline(always)]
37    pub fn is_on(&self) -> bool {
38        *self == Ledctrlselect::On
39    }
40}
41#[doc = "Field `LEDCTRL` writer - LED Control"]
42pub type LedctrlW<'a, REG> = crate::BitWriter<'a, REG, Ledctrlselect>;
43impl<'a, REG> LedctrlW<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "LED off"]
48    #[inline(always)]
49    pub fn off(self) -> &'a mut crate::W<REG> {
50        self.variant(Ledctrlselect::Off)
51    }
52    #[doc = "LED on"]
53    #[inline(always)]
54    pub fn on(self) -> &'a mut crate::W<REG> {
55        self.variant(Ledctrlselect::On)
56    }
57}
58#[doc = "Data Width\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum Dwselect {
61    #[doc = "0: 1-bit mode"]
62    _1bit = 0,
63    #[doc = "1: 4-bit mode"]
64    _4bit = 1,
65}
66impl From<Dwselect> for bool {
67    #[inline(always)]
68    fn from(variant: Dwselect) -> Self {
69        variant as u8 != 0
70    }
71}
72#[doc = "Field `DW` reader - Data Width"]
73pub type DwR = crate::BitReader<Dwselect>;
74impl DwR {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> Dwselect {
78        match self.bits {
79            false => Dwselect::_1bit,
80            true => Dwselect::_4bit,
81        }
82    }
83    #[doc = "1-bit mode"]
84    #[inline(always)]
85    pub fn is_1bit(&self) -> bool {
86        *self == Dwselect::_1bit
87    }
88    #[doc = "4-bit mode"]
89    #[inline(always)]
90    pub fn is_4bit(&self) -> bool {
91        *self == Dwselect::_4bit
92    }
93}
94#[doc = "Field `DW` writer - Data Width"]
95pub type DwW<'a, REG> = crate::BitWriter<'a, REG, Dwselect>;
96impl<'a, REG> DwW<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "1-bit mode"]
101    #[inline(always)]
102    pub fn _1bit(self) -> &'a mut crate::W<REG> {
103        self.variant(Dwselect::_1bit)
104    }
105    #[doc = "4-bit mode"]
106    #[inline(always)]
107    pub fn _4bit(self) -> &'a mut crate::W<REG> {
108        self.variant(Dwselect::_4bit)
109    }
110}
111#[doc = "High Speed Enable\n\nValue on reset: 0"]
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113pub enum Hsenselect {
114    #[doc = "0: Normal Speed mode"]
115    Normal = 0,
116    #[doc = "1: High Speed mode"]
117    High = 1,
118}
119impl From<Hsenselect> for bool {
120    #[inline(always)]
121    fn from(variant: Hsenselect) -> Self {
122        variant as u8 != 0
123    }
124}
125#[doc = "Field `HSEN` reader - High Speed Enable"]
126pub type HsenR = crate::BitReader<Hsenselect>;
127impl HsenR {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> Hsenselect {
131        match self.bits {
132            false => Hsenselect::Normal,
133            true => Hsenselect::High,
134        }
135    }
136    #[doc = "Normal Speed mode"]
137    #[inline(always)]
138    pub fn is_normal(&self) -> bool {
139        *self == Hsenselect::Normal
140    }
141    #[doc = "High Speed mode"]
142    #[inline(always)]
143    pub fn is_high(&self) -> bool {
144        *self == Hsenselect::High
145    }
146}
147#[doc = "Field `HSEN` writer - High Speed Enable"]
148pub type HsenW<'a, REG> = crate::BitWriter<'a, REG, Hsenselect>;
149impl<'a, REG> HsenW<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "Normal Speed mode"]
154    #[inline(always)]
155    pub fn normal(self) -> &'a mut crate::W<REG> {
156        self.variant(Hsenselect::Normal)
157    }
158    #[doc = "High Speed mode"]
159    #[inline(always)]
160    pub fn high(self) -> &'a mut crate::W<REG> {
161        self.variant(Hsenselect::High)
162    }
163}
164#[doc = "DMA Select\n\nValue on reset: 0"]
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166#[repr(u8)]
167pub enum Dmaselselect {
168    #[doc = "0: SDMA is selected"]
169    Sdma = 0,
170    #[doc = "2: 32-bit Address ADMA2 is selected"]
171    _32bit = 2,
172}
173impl From<Dmaselselect> for u8 {
174    #[inline(always)]
175    fn from(variant: Dmaselselect) -> Self {
176        variant as _
177    }
178}
179impl crate::FieldSpec for Dmaselselect {
180    type Ux = u8;
181}
182impl crate::IsEnum for Dmaselselect {}
183#[doc = "Field `DMASEL` reader - DMA Select"]
184pub type DmaselR = crate::FieldReader<Dmaselselect>;
185impl DmaselR {
186    #[doc = "Get enumerated values variant"]
187    #[inline(always)]
188    pub const fn variant(&self) -> Option<Dmaselselect> {
189        match self.bits {
190            0 => Some(Dmaselselect::Sdma),
191            2 => Some(Dmaselselect::_32bit),
192            _ => None,
193        }
194    }
195    #[doc = "SDMA is selected"]
196    #[inline(always)]
197    pub fn is_sdma(&self) -> bool {
198        *self == Dmaselselect::Sdma
199    }
200    #[doc = "32-bit Address ADMA2 is selected"]
201    #[inline(always)]
202    pub fn is_32bit(&self) -> bool {
203        *self == Dmaselselect::_32bit
204    }
205}
206#[doc = "Field `DMASEL` writer - DMA Select"]
207pub type DmaselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dmaselselect>;
208impl<'a, REG> DmaselW<'a, REG>
209where
210    REG: crate::Writable + crate::RegisterSpec,
211    REG::Ux: From<u8>,
212{
213    #[doc = "SDMA is selected"]
214    #[inline(always)]
215    pub fn sdma(self) -> &'a mut crate::W<REG> {
216        self.variant(Dmaselselect::Sdma)
217    }
218    #[doc = "32-bit Address ADMA2 is selected"]
219    #[inline(always)]
220    pub fn _32bit(self) -> &'a mut crate::W<REG> {
221        self.variant(Dmaselselect::_32bit)
222    }
223}
224#[doc = "Card Detect Test Level\n\nValue on reset: 0"]
225#[derive(Clone, Copy, Debug, PartialEq, Eq)]
226pub enum Carddtlselect {
227    #[doc = "0: No Card"]
228    No = 0,
229    #[doc = "1: Card Inserted"]
230    Yes = 1,
231}
232impl From<Carddtlselect> for bool {
233    #[inline(always)]
234    fn from(variant: Carddtlselect) -> Self {
235        variant as u8 != 0
236    }
237}
238#[doc = "Field `CARDDTL` reader - Card Detect Test Level"]
239pub type CarddtlR = crate::BitReader<Carddtlselect>;
240impl CarddtlR {
241    #[doc = "Get enumerated values variant"]
242    #[inline(always)]
243    pub const fn variant(&self) -> Carddtlselect {
244        match self.bits {
245            false => Carddtlselect::No,
246            true => Carddtlselect::Yes,
247        }
248    }
249    #[doc = "No Card"]
250    #[inline(always)]
251    pub fn is_no(&self) -> bool {
252        *self == Carddtlselect::No
253    }
254    #[doc = "Card Inserted"]
255    #[inline(always)]
256    pub fn is_yes(&self) -> bool {
257        *self == Carddtlselect::Yes
258    }
259}
260#[doc = "Field `CARDDTL` writer - Card Detect Test Level"]
261pub type CarddtlW<'a, REG> = crate::BitWriter<'a, REG, Carddtlselect>;
262impl<'a, REG> CarddtlW<'a, REG>
263where
264    REG: crate::Writable + crate::RegisterSpec,
265{
266    #[doc = "No Card"]
267    #[inline(always)]
268    pub fn no(self) -> &'a mut crate::W<REG> {
269        self.variant(Carddtlselect::No)
270    }
271    #[doc = "Card Inserted"]
272    #[inline(always)]
273    pub fn yes(self) -> &'a mut crate::W<REG> {
274        self.variant(Carddtlselect::Yes)
275    }
276}
277#[doc = "Card Detect Signal Selection\n\nValue on reset: 0"]
278#[derive(Clone, Copy, Debug, PartialEq, Eq)]
279pub enum Carddselselect {
280    #[doc = "0: SDCD# is selected (for normal use)"]
281    Normal = 0,
282    #[doc = "1: The Card Select Test Level is selected (for test purpose)"]
283    Test = 1,
284}
285impl From<Carddselselect> for bool {
286    #[inline(always)]
287    fn from(variant: Carddselselect) -> Self {
288        variant as u8 != 0
289    }
290}
291#[doc = "Field `CARDDSEL` reader - Card Detect Signal Selection"]
292pub type CarddselR = crate::BitReader<Carddselselect>;
293impl CarddselR {
294    #[doc = "Get enumerated values variant"]
295    #[inline(always)]
296    pub const fn variant(&self) -> Carddselselect {
297        match self.bits {
298            false => Carddselselect::Normal,
299            true => Carddselselect::Test,
300        }
301    }
302    #[doc = "SDCD# is selected (for normal use)"]
303    #[inline(always)]
304    pub fn is_normal(&self) -> bool {
305        *self == Carddselselect::Normal
306    }
307    #[doc = "The Card Select Test Level is selected (for test purpose)"]
308    #[inline(always)]
309    pub fn is_test(&self) -> bool {
310        *self == Carddselselect::Test
311    }
312}
313#[doc = "Field `CARDDSEL` writer - Card Detect Signal Selection"]
314pub type CarddselW<'a, REG> = crate::BitWriter<'a, REG, Carddselselect>;
315impl<'a, REG> CarddselW<'a, REG>
316where
317    REG: crate::Writable + crate::RegisterSpec,
318{
319    #[doc = "SDCD# is selected (for normal use)"]
320    #[inline(always)]
321    pub fn normal(self) -> &'a mut crate::W<REG> {
322        self.variant(Carddselselect::Normal)
323    }
324    #[doc = "The Card Select Test Level is selected (for test purpose)"]
325    #[inline(always)]
326    pub fn test(self) -> &'a mut crate::W<REG> {
327        self.variant(Carddselselect::Test)
328    }
329}
330impl R {
331    #[doc = "Bit 0 - LED Control"]
332    #[inline(always)]
333    pub fn ledctrl(&self) -> LedctrlR {
334        LedctrlR::new((self.bits & 1) != 0)
335    }
336    #[doc = "Bit 1 - Data Width"]
337    #[inline(always)]
338    pub fn dw(&self) -> DwR {
339        DwR::new(((self.bits >> 1) & 1) != 0)
340    }
341    #[doc = "Bit 2 - High Speed Enable"]
342    #[inline(always)]
343    pub fn hsen(&self) -> HsenR {
344        HsenR::new(((self.bits >> 2) & 1) != 0)
345    }
346    #[doc = "Bits 3:4 - DMA Select"]
347    #[inline(always)]
348    pub fn dmasel(&self) -> DmaselR {
349        DmaselR::new((self.bits >> 3) & 3)
350    }
351    #[doc = "Bit 6 - Card Detect Test Level"]
352    #[inline(always)]
353    pub fn carddtl(&self) -> CarddtlR {
354        CarddtlR::new(((self.bits >> 6) & 1) != 0)
355    }
356    #[doc = "Bit 7 - Card Detect Signal Selection"]
357    #[inline(always)]
358    pub fn carddsel(&self) -> CarddselR {
359        CarddselR::new(((self.bits >> 7) & 1) != 0)
360    }
361}
362impl W {
363    #[doc = "Bit 0 - LED Control"]
364    #[inline(always)]
365    #[must_use]
366    pub fn ledctrl(&mut self) -> LedctrlW<Hc1rSpec> {
367        LedctrlW::new(self, 0)
368    }
369    #[doc = "Bit 1 - Data Width"]
370    #[inline(always)]
371    #[must_use]
372    pub fn dw(&mut self) -> DwW<Hc1rSpec> {
373        DwW::new(self, 1)
374    }
375    #[doc = "Bit 2 - High Speed Enable"]
376    #[inline(always)]
377    #[must_use]
378    pub fn hsen(&mut self) -> HsenW<Hc1rSpec> {
379        HsenW::new(self, 2)
380    }
381    #[doc = "Bits 3:4 - DMA Select"]
382    #[inline(always)]
383    #[must_use]
384    pub fn dmasel(&mut self) -> DmaselW<Hc1rSpec> {
385        DmaselW::new(self, 3)
386    }
387    #[doc = "Bit 6 - Card Detect Test Level"]
388    #[inline(always)]
389    #[must_use]
390    pub fn carddtl(&mut self) -> CarddtlW<Hc1rSpec> {
391        CarddtlW::new(self, 6)
392    }
393    #[doc = "Bit 7 - Card Detect Signal Selection"]
394    #[inline(always)]
395    #[must_use]
396    pub fn carddsel(&mut self) -> CarddselW<Hc1rSpec> {
397        CarddselW::new(self, 7)
398    }
399}
400#[doc = "Host Control 1\n\nYou can [`read`](crate::Reg::read) this register and get [`hc1r::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hc1r::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
401pub struct Hc1rSpec;
402impl crate::RegisterSpec for Hc1rSpec {
403    type Ux = u8;
404}
405#[doc = "`read()` method returns [`hc1r::R`](R) reader structure"]
406impl crate::Readable for Hc1rSpec {}
407#[doc = "`write(|w| ..)` method takes [`hc1r::W`](W) writer structure"]
408impl crate::Writable for Hc1rSpec {
409    type Safety = crate::Unsafe;
410    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
411    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
412}
413#[doc = "`reset()` method sets HC1R to value 0"]
414impl crate::Resettable for Hc1rSpec {
415    const RESET_VALUE: u8 = 0;
416}
atsamd51p/sdhc0/hc1r.rs

atsamd51p/sdhc0/
hc1r.rs
