atsamd51p/rtc/mode1/
ctrla.rs

Help
1#[doc = "Register `CTRLA` reader"]
2pub type R = crate::R<CtrlaSpec>;
3#[doc = "Register `CTRLA` writer"]
4pub type W = crate::W<CtrlaSpec>;
5#[doc = "Field `SWRST` reader - Software Reset"]
6pub type SwrstR = crate::BitReader;
7#[doc = "Field `SWRST` writer - Software Reset"]
8pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ENABLE` reader - Enable"]
10pub type EnableR = crate::BitReader;
11#[doc = "Field `ENABLE` writer - Enable"]
12pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Operating Mode\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15#[repr(u8)]
16pub enum Modeselect {
17    #[doc = "0: Mode 0: 32-bit Counter"]
18    Count32 = 0,
19    #[doc = "1: Mode 1: 16-bit Counter"]
20    Count16 = 1,
21    #[doc = "2: Mode 2: Clock/Calendar"]
22    Clock = 2,
23}
24impl From<Modeselect> for u8 {
25    #[inline(always)]
26    fn from(variant: Modeselect) -> Self {
27        variant as _
28    }
29}
30impl crate::FieldSpec for Modeselect {
31    type Ux = u8;
32}
33impl crate::IsEnum for Modeselect {}
34#[doc = "Field `MODE` reader - Operating Mode"]
35pub type ModeR = crate::FieldReader<Modeselect>;
36impl ModeR {
37    #[doc = "Get enumerated values variant"]
38    #[inline(always)]
39    pub const fn variant(&self) -> Option<Modeselect> {
40        match self.bits {
41            0 => Some(Modeselect::Count32),
42            1 => Some(Modeselect::Count16),
43            2 => Some(Modeselect::Clock),
44            _ => None,
45        }
46    }
47    #[doc = "Mode 0: 32-bit Counter"]
48    #[inline(always)]
49    pub fn is_count32(&self) -> bool {
50        *self == Modeselect::Count32
51    }
52    #[doc = "Mode 1: 16-bit Counter"]
53    #[inline(always)]
54    pub fn is_count16(&self) -> bool {
55        *self == Modeselect::Count16
56    }
57    #[doc = "Mode 2: Clock/Calendar"]
58    #[inline(always)]
59    pub fn is_clock(&self) -> bool {
60        *self == Modeselect::Clock
61    }
62}
63#[doc = "Field `MODE` writer - Operating Mode"]
64pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Modeselect>;
65impl<'a, REG> ModeW<'a, REG>
66where
67    REG: crate::Writable + crate::RegisterSpec,
68    REG::Ux: From<u8>,
69{
70    #[doc = "Mode 0: 32-bit Counter"]
71    #[inline(always)]
72    pub fn count32(self) -> &'a mut crate::W<REG> {
73        self.variant(Modeselect::Count32)
74    }
75    #[doc = "Mode 1: 16-bit Counter"]
76    #[inline(always)]
77    pub fn count16(self) -> &'a mut crate::W<REG> {
78        self.variant(Modeselect::Count16)
79    }
80    #[doc = "Mode 2: Clock/Calendar"]
81    #[inline(always)]
82    pub fn clock(self) -> &'a mut crate::W<REG> {
83        self.variant(Modeselect::Clock)
84    }
85}
86#[doc = "Prescaler\n\nValue on reset: 0"]
87#[derive(Clone, Copy, Debug, PartialEq, Eq)]
88#[repr(u8)]
89pub enum Prescalerselect {
90    #[doc = "0: CLK_RTC_CNT = GCLK_RTC/1"]
91    Off = 0,
92    #[doc = "1: CLK_RTC_CNT = GCLK_RTC/1"]
93    Div1 = 1,
94    #[doc = "2: CLK_RTC_CNT = GCLK_RTC/2"]
95    Div2 = 2,
96    #[doc = "3: CLK_RTC_CNT = GCLK_RTC/4"]
97    Div4 = 3,
98    #[doc = "4: CLK_RTC_CNT = GCLK_RTC/8"]
99    Div8 = 4,
100    #[doc = "5: CLK_RTC_CNT = GCLK_RTC/16"]
101    Div16 = 5,
102    #[doc = "6: CLK_RTC_CNT = GCLK_RTC/32"]
103    Div32 = 6,
104    #[doc = "7: CLK_RTC_CNT = GCLK_RTC/64"]
105    Div64 = 7,
106    #[doc = "8: CLK_RTC_CNT = GCLK_RTC/128"]
107    Div128 = 8,
108    #[doc = "9: CLK_RTC_CNT = GCLK_RTC/256"]
109    Div256 = 9,
110    #[doc = "10: CLK_RTC_CNT = GCLK_RTC/512"]
111    Div512 = 10,
112    #[doc = "11: CLK_RTC_CNT = GCLK_RTC/1024"]
113    Div1024 = 11,
114}
115impl From<Prescalerselect> for u8 {
116    #[inline(always)]
117    fn from(variant: Prescalerselect) -> Self {
118        variant as _
119    }
120}
121impl crate::FieldSpec for Prescalerselect {
122    type Ux = u8;
123}
124impl crate::IsEnum for Prescalerselect {}
125#[doc = "Field `PRESCALER` reader - Prescaler"]
126pub type PrescalerR = crate::FieldReader<Prescalerselect>;
127impl PrescalerR {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> Option<Prescalerselect> {
131        match self.bits {
132            0 => Some(Prescalerselect::Off),
133            1 => Some(Prescalerselect::Div1),
134            2 => Some(Prescalerselect::Div2),
135            3 => Some(Prescalerselect::Div4),
136            4 => Some(Prescalerselect::Div8),
137            5 => Some(Prescalerselect::Div16),
138            6 => Some(Prescalerselect::Div32),
139            7 => Some(Prescalerselect::Div64),
140            8 => Some(Prescalerselect::Div128),
141            9 => Some(Prescalerselect::Div256),
142            10 => Some(Prescalerselect::Div512),
143            11 => Some(Prescalerselect::Div1024),
144            _ => None,
145        }
146    }
147    #[doc = "CLK_RTC_CNT = GCLK_RTC/1"]
148    #[inline(always)]
149    pub fn is_off(&self) -> bool {
150        *self == Prescalerselect::Off
151    }
152    #[doc = "CLK_RTC_CNT = GCLK_RTC/1"]
153    #[inline(always)]
154    pub fn is_div1(&self) -> bool {
155        *self == Prescalerselect::Div1
156    }
157    #[doc = "CLK_RTC_CNT = GCLK_RTC/2"]
158    #[inline(always)]
159    pub fn is_div2(&self) -> bool {
160        *self == Prescalerselect::Div2
161    }
162    #[doc = "CLK_RTC_CNT = GCLK_RTC/4"]
163    #[inline(always)]
164    pub fn is_div4(&self) -> bool {
165        *self == Prescalerselect::Div4
166    }
167    #[doc = "CLK_RTC_CNT = GCLK_RTC/8"]
168    #[inline(always)]
169    pub fn is_div8(&self) -> bool {
170        *self == Prescalerselect::Div8
171    }
172    #[doc = "CLK_RTC_CNT = GCLK_RTC/16"]
173    #[inline(always)]
174    pub fn is_div16(&self) -> bool {
175        *self == Prescalerselect::Div16
176    }
177    #[doc = "CLK_RTC_CNT = GCLK_RTC/32"]
178    #[inline(always)]
179    pub fn is_div32(&self) -> bool {
180        *self == Prescalerselect::Div32
181    }
182    #[doc = "CLK_RTC_CNT = GCLK_RTC/64"]
183    #[inline(always)]
184    pub fn is_div64(&self) -> bool {
185        *self == Prescalerselect::Div64
186    }
187    #[doc = "CLK_RTC_CNT = GCLK_RTC/128"]
188    #[inline(always)]
189    pub fn is_div128(&self) -> bool {
190        *self == Prescalerselect::Div128
191    }
192    #[doc = "CLK_RTC_CNT = GCLK_RTC/256"]
193    #[inline(always)]
194    pub fn is_div256(&self) -> bool {
195        *self == Prescalerselect::Div256
196    }
197    #[doc = "CLK_RTC_CNT = GCLK_RTC/512"]
198    #[inline(always)]
199    pub fn is_div512(&self) -> bool {
200        *self == Prescalerselect::Div512
201    }
202    #[doc = "CLK_RTC_CNT = GCLK_RTC/1024"]
203    #[inline(always)]
204    pub fn is_div1024(&self) -> bool {
205        *self == Prescalerselect::Div1024
206    }
207}
208#[doc = "Field `PRESCALER` writer - Prescaler"]
209pub type PrescalerW<'a, REG> = crate::FieldWriter<'a, REG, 4, Prescalerselect>;
210impl<'a, REG> PrescalerW<'a, REG>
211where
212    REG: crate::Writable + crate::RegisterSpec,
213    REG::Ux: From<u8>,
214{
215    #[doc = "CLK_RTC_CNT = GCLK_RTC/1"]
216    #[inline(always)]
217    pub fn off(self) -> &'a mut crate::W<REG> {
218        self.variant(Prescalerselect::Off)
219    }
220    #[doc = "CLK_RTC_CNT = GCLK_RTC/1"]
221    #[inline(always)]
222    pub fn div1(self) -> &'a mut crate::W<REG> {
223        self.variant(Prescalerselect::Div1)
224    }
225    #[doc = "CLK_RTC_CNT = GCLK_RTC/2"]
226    #[inline(always)]
227    pub fn div2(self) -> &'a mut crate::W<REG> {
228        self.variant(Prescalerselect::Div2)
229    }
230    #[doc = "CLK_RTC_CNT = GCLK_RTC/4"]
231    #[inline(always)]
232    pub fn div4(self) -> &'a mut crate::W<REG> {
233        self.variant(Prescalerselect::Div4)
234    }
235    #[doc = "CLK_RTC_CNT = GCLK_RTC/8"]
236    #[inline(always)]
237    pub fn div8(self) -> &'a mut crate::W<REG> {
238        self.variant(Prescalerselect::Div8)
239    }
240    #[doc = "CLK_RTC_CNT = GCLK_RTC/16"]
241    #[inline(always)]
242    pub fn div16(self) -> &'a mut crate::W<REG> {
243        self.variant(Prescalerselect::Div16)
244    }
245    #[doc = "CLK_RTC_CNT = GCLK_RTC/32"]
246    #[inline(always)]
247    pub fn div32(self) -> &'a mut crate::W<REG> {
248        self.variant(Prescalerselect::Div32)
249    }
250    #[doc = "CLK_RTC_CNT = GCLK_RTC/64"]
251    #[inline(always)]
252    pub fn div64(self) -> &'a mut crate::W<REG> {
253        self.variant(Prescalerselect::Div64)
254    }
255    #[doc = "CLK_RTC_CNT = GCLK_RTC/128"]
256    #[inline(always)]
257    pub fn div128(self) -> &'a mut crate::W<REG> {
258        self.variant(Prescalerselect::Div128)
259    }
260    #[doc = "CLK_RTC_CNT = GCLK_RTC/256"]
261    #[inline(always)]
262    pub fn div256(self) -> &'a mut crate::W<REG> {
263        self.variant(Prescalerselect::Div256)
264    }
265    #[doc = "CLK_RTC_CNT = GCLK_RTC/512"]
266    #[inline(always)]
267    pub fn div512(self) -> &'a mut crate::W<REG> {
268        self.variant(Prescalerselect::Div512)
269    }
270    #[doc = "CLK_RTC_CNT = GCLK_RTC/1024"]
271    #[inline(always)]
272    pub fn div1024(self) -> &'a mut crate::W<REG> {
273        self.variant(Prescalerselect::Div1024)
274    }
275}
276#[doc = "Field `BKTRST` reader - BKUP Registers Reset On Tamper Enable"]
277pub type BktrstR = crate::BitReader;
278#[doc = "Field `BKTRST` writer - BKUP Registers Reset On Tamper Enable"]
279pub type BktrstW<'a, REG> = crate::BitWriter<'a, REG>;
280#[doc = "Field `GPTRST` reader - GP Registers Reset On Tamper Enable"]
281pub type GptrstR = crate::BitReader;
282#[doc = "Field `GPTRST` writer - GP Registers Reset On Tamper Enable"]
283pub type GptrstW<'a, REG> = crate::BitWriter<'a, REG>;
284#[doc = "Field `COUNTSYNC` reader - Count Read Synchronization Enable"]
285pub type CountsyncR = crate::BitReader;
286#[doc = "Field `COUNTSYNC` writer - Count Read Synchronization Enable"]
287pub type CountsyncW<'a, REG> = crate::BitWriter<'a, REG>;
288impl R {
289    #[doc = "Bit 0 - Software Reset"]
290    #[inline(always)]
291    pub fn swrst(&self) -> SwrstR {
292        SwrstR::new((self.bits & 1) != 0)
293    }
294    #[doc = "Bit 1 - Enable"]
295    #[inline(always)]
296    pub fn enable(&self) -> EnableR {
297        EnableR::new(((self.bits >> 1) & 1) != 0)
298    }
299    #[doc = "Bits 2:3 - Operating Mode"]
300    #[inline(always)]
301    pub fn mode(&self) -> ModeR {
302        ModeR::new(((self.bits >> 2) & 3) as u8)
303    }
304    #[doc = "Bits 8:11 - Prescaler"]
305    #[inline(always)]
306    pub fn prescaler(&self) -> PrescalerR {
307        PrescalerR::new(((self.bits >> 8) & 0x0f) as u8)
308    }
309    #[doc = "Bit 13 - BKUP Registers Reset On Tamper Enable"]
310    #[inline(always)]
311    pub fn bktrst(&self) -> BktrstR {
312        BktrstR::new(((self.bits >> 13) & 1) != 0)
313    }
314    #[doc = "Bit 14 - GP Registers Reset On Tamper Enable"]
315    #[inline(always)]
316    pub fn gptrst(&self) -> GptrstR {
317        GptrstR::new(((self.bits >> 14) & 1) != 0)
318    }
319    #[doc = "Bit 15 - Count Read Synchronization Enable"]
320    #[inline(always)]
321    pub fn countsync(&self) -> CountsyncR {
322        CountsyncR::new(((self.bits >> 15) & 1) != 0)
323    }
324}
325impl W {
326    #[doc = "Bit 0 - Software Reset"]
327    #[inline(always)]
328    #[must_use]
329    pub fn swrst(&mut self) -> SwrstW<CtrlaSpec> {
330        SwrstW::new(self, 0)
331    }
332    #[doc = "Bit 1 - Enable"]
333    #[inline(always)]
334    #[must_use]
335    pub fn enable(&mut self) -> EnableW<CtrlaSpec> {
336        EnableW::new(self, 1)
337    }
338    #[doc = "Bits 2:3 - Operating Mode"]
339    #[inline(always)]
340    #[must_use]
341    pub fn mode(&mut self) -> ModeW<CtrlaSpec> {
342        ModeW::new(self, 2)
343    }
344    #[doc = "Bits 8:11 - Prescaler"]
345    #[inline(always)]
346    #[must_use]
347    pub fn prescaler(&mut self) -> PrescalerW<CtrlaSpec> {
348        PrescalerW::new(self, 8)
349    }
350    #[doc = "Bit 13 - BKUP Registers Reset On Tamper Enable"]
351    #[inline(always)]
352    #[must_use]
353    pub fn bktrst(&mut self) -> BktrstW<CtrlaSpec> {
354        BktrstW::new(self, 13)
355    }
356    #[doc = "Bit 14 - GP Registers Reset On Tamper Enable"]
357    #[inline(always)]
358    #[must_use]
359    pub fn gptrst(&mut self) -> GptrstW<CtrlaSpec> {
360        GptrstW::new(self, 14)
361    }
362    #[doc = "Bit 15 - Count Read Synchronization Enable"]
363    #[inline(always)]
364    #[must_use]
365    pub fn countsync(&mut self) -> CountsyncW<CtrlaSpec> {
366        CountsyncW::new(self, 15)
367    }
368}
369#[doc = "MODE1 Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrla::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrla::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
370pub struct CtrlaSpec;
371impl crate::RegisterSpec for CtrlaSpec {
372    type Ux = u16;
373}
374#[doc = "`read()` method returns [`ctrla::R`](R) reader structure"]
375impl crate::Readable for CtrlaSpec {}
376#[doc = "`write(|w| ..)` method takes [`ctrla::W`](W) writer structure"]
377impl crate::Writable for CtrlaSpec {
378    type Safety = crate::Unsafe;
379    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
380    const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
381}
382#[doc = "`reset()` method sets CTRLA to value 0"]
383impl crate::Resettable for CtrlaSpec {
384    const RESET_VALUE: u16 = 0;
385}
atsamd51p/rtc/mode1/ctrla.rs

atsamd51p/rtc/mode1/
ctrla.rs
