atsamd51p/system_control/
shpr1.rs

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1#[doc = "Register `SHPR1` reader"]
2pub type R = crate::R<Shpr1Spec>;
3#[doc = "Register `SHPR1` writer"]
4pub type W = crate::W<Shpr1Spec>;
5#[doc = "Field `PRI_4` reader - Priority of system handler 4, MemManage"]
6pub type Pri4R = crate::FieldReader;
7#[doc = "Field `PRI_4` writer - Priority of system handler 4, MemManage"]
8pub type Pri4W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `PRI_5` reader - Priority of system handler 5, BusFault"]
10pub type Pri5R = crate::FieldReader;
11#[doc = "Field `PRI_5` writer - Priority of system handler 5, BusFault"]
12pub type Pri5W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `PRI_6` reader - Priority of system handler 6, UsageFault"]
14pub type Pri6R = crate::FieldReader;
15#[doc = "Field `PRI_6` writer - Priority of system handler 6, UsageFault"]
16pub type Pri6W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17impl R {
18    #[doc = "Bits 0:7 - Priority of system handler 4, MemManage"]
19    #[inline(always)]
20    pub fn pri_4(&self) -> Pri4R {
21        Pri4R::new((self.bits & 0xff) as u8)
22    }
23    #[doc = "Bits 8:15 - Priority of system handler 5, BusFault"]
24    #[inline(always)]
25    pub fn pri_5(&self) -> Pri5R {
26        Pri5R::new(((self.bits >> 8) & 0xff) as u8)
27    }
28    #[doc = "Bits 16:23 - Priority of system handler 6, UsageFault"]
29    #[inline(always)]
30    pub fn pri_6(&self) -> Pri6R {
31        Pri6R::new(((self.bits >> 16) & 0xff) as u8)
32    }
33}
34impl W {
35    #[doc = "Bits 0:7 - Priority of system handler 4, MemManage"]
36    #[inline(always)]
37    #[must_use]
38    pub fn pri_4(&mut self) -> Pri4W<Shpr1Spec> {
39        Pri4W::new(self, 0)
40    }
41    #[doc = "Bits 8:15 - Priority of system handler 5, BusFault"]
42    #[inline(always)]
43    #[must_use]
44    pub fn pri_5(&mut self) -> Pri5W<Shpr1Spec> {
45        Pri5W::new(self, 8)
46    }
47    #[doc = "Bits 16:23 - Priority of system handler 6, UsageFault"]
48    #[inline(always)]
49    #[must_use]
50    pub fn pri_6(&mut self) -> Pri6W<Shpr1Spec> {
51        Pri6W::new(self, 16)
52    }
53}
54#[doc = "System Handler Priority Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct Shpr1Spec;
56impl crate::RegisterSpec for Shpr1Spec {
57    type Ux = u32;
58}
59#[doc = "`read()` method returns [`shpr1::R`](R) reader structure"]
60impl crate::Readable for Shpr1Spec {}
61#[doc = "`write(|w| ..)` method takes [`shpr1::W`](W) writer structure"]
62impl crate::Writable for Shpr1Spec {
63    type Safety = crate::Unsafe;
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
65    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
66}
67#[doc = "`reset()` method sets SHPR1 to value 0"]
68impl crate::Resettable for Shpr1Spec {
69    const RESET_VALUE: u32 = 0;
70}
atsamd51p/system_control/shpr1.rs

atsamd51p/system_control/
shpr1.rs
