atsamd_hal/sercom/pad/
impl_pad_thumbv7em.rs

1//! Implementations of the [`IsPad`], [`GetPad`] and [`InIoSet`] traits
2
3use crate::gpio::*;
4use crate::sercom::*;
5
6use sorted_hlist::mk_hlist;
7
8//==============================================================================
9//  Pad definitions
10//==============================================================================
11
12macro_rules! pad_info {
13
14    (
15        $PinId:ident,
16        $Cfg:ident,
17        $Sercom:ident,
18        $PadNum:ident,
19        $( $IoSet:ident ),+
20    ) => {
21        pad_info!(@impl_pad, $PinId, $Cfg, $Sercom, $PadNum, $( $IoSet ),+ );
22    };
23
24    (
25        $PinId:ident,
26        $Cfg:ident,
27        $Sercom:ident,
28        $PadNum:ident,
29        $( $IoSet:ident ),+
30        + I2C
31    ) => {
32        impl IsI2cPad for Pin<$PinId, Alternate<$Cfg>> {}
33        pad_info!(@impl_pad, $PinId, $Cfg, $Sercom, $PadNum, $( $IoSet ),+ );
34    };
35
36    (
37        @impl_pad,
38        $PinId:ident,
39        $Cfg:ident,
40        $Sercom:ident,
41        $PadNum:ident,
42        $( $IoSet:ident ),+
43    ) => {
44        impl GetPad<$Sercom> for $PinId {
45            type PadNum = $PadNum;
46            type PinMode = Alternate<$Cfg>;
47        }
48        $(
49            impl InIoSet<$IoSet> for Pin<$PinId, Alternate<$Cfg>> {}
50        )+
51        impl IsPad for Pin<$PinId, Alternate<$Cfg>> {
52            type Sercom = $Sercom;
53            type PadNum = $PadNum;
54        }
55        impl IoSets for Pin<$PinId, Alternate<$Cfg>> {
56            type SetList = mk_hlist!($( <$IoSet as IoSet>::Order ),+);
57        }
58    };
59}
60
61macro_rules! pad_table {
62    (
63        #[$id_cfg:meta]
64        $PinId:ident {
65            $(
66                $( #[$sercom_cfg:meta] )?
67                $Cfg:ident: ( $Sercom:ident, $PadNum:ident, $( $IoSet:ident ),+ ) $( + $I2C:ident )?,
68            )+
69        }
70    ) => {
71        $(
72            #[$id_cfg]
73            $( #[$sercom_cfg] )?
74            pad_info!( $PinId, $Cfg, $Sercom, $PadNum, $( $IoSet ),+ $( + $I2C )?);
75        )+
76    };
77    (
78        $PinId:ident {
79            $(
80                $( #[$sercom_cfg:meta] )?
81                $Cfg:ident: ( $Sercom:ident, $PadNum:ident, $( $IoSet:ident ),+ ) $( + $I2C:ident )?,
82            )+
83        }
84    ) => {
85        $(
86            $( #[$sercom_cfg] )?
87            pad_info!( $PinId, $Cfg, $Sercom, $PadNum, $( $IoSet ),+ $( + $I2C )?);
88        )+
89    };
90    (
91        $(
92            $( #[$id_cfg:meta] )?
93            $PinId:ident {
94                $(
95                    $( #[$sercom_cfg:meta] )?
96                    $Cfg:ident: ( $Sercom:ident, $PadNum:ident, $( $IoSet:ident ),+ ) $( + $I2C:ident )?,
97                )+
98            }
99        )+
100    ) => {
101        $(
102            pad_table!(
103                $( #[$id_cfg] )?
104                $PinId{
105                    $(
106                        $( #[$sercom_cfg] )?
107                        $Cfg: ( $Sercom, $PadNum, $( $IoSet),+ ) $( + $I2C )?,
108                    )+
109                }
110            );
111        )+
112    };
113}
114
115// Implement an undocumented `IoSet` for PA16, PA17, PB22 & PB23 configured for
116// `Sercom1`. The pygamer & feather_m4 uses this combination, but it is not
117// listed as valid in the datasheet.
118
119// Implement an undocumented `IoSet` for PA00, PA01, PB22 & PB23 configured for
120// `Sercom1`. The itsybitsy_m4 uses this combination, but it is not
121// listed as valid in the datasheet.
122
123pad_table!(
124    #[hal_cfg("pa00")]
125    PA00 {
126        #[hal_cfg("sercom1")]
127        D: (Sercom1, Pad0, IoSet4, UndocIoSet2),
128    }
129    #[hal_cfg("pa01")]
130    PA01 {
131        #[hal_cfg("sercom1")]
132        D: (Sercom1, Pad1, IoSet4, UndocIoSet2),
133    }
134    #[hal_cfg("pa04")]
135    PA04 {
136        #[hal_cfg("sercom0")]
137        D: (Sercom0, Pad0, IoSet3),
138    }
139    #[hal_cfg("pa05")]
140    PA05 {
141        #[hal_cfg("sercom0")]
142        D: (Sercom0, Pad1, IoSet3),
143    }
144    #[hal_cfg("pa06")]
145    PA06 {
146        #[hal_cfg("sercom0")]
147        D: (Sercom0, Pad2, IoSet3),
148    }
149    #[hal_cfg("pa07")]
150    PA07 {
151        #[hal_cfg("sercom0")]
152        D: (Sercom0, Pad3, IoSet3),
153    }
154    #[hal_cfg("pa08")]
155    PA08 {
156        #[hal_cfg("sercom0")]
157        C: (Sercom0, Pad0, IoSet1) + I2C,
158        #[hal_cfg("sercom2")]
159        D: (Sercom2, Pad1, IoSet3) + I2C,
160    }
161    #[hal_cfg("pa09")]
162    PA09 {
163        #[hal_cfg("sercom0")]
164        C: (Sercom0, Pad1, IoSet1) + I2C,
165        #[hal_cfg("sercom2")]
166        D: (Sercom2, Pad0, IoSet3) + I2C,
167    }
168    #[hal_cfg("pa10")]
169    PA10 {
170        #[hal_cfg("sercom0")]
171        C: (Sercom0, Pad2, IoSet1),
172        #[hal_cfg("sercom2")]
173        D: (Sercom2, Pad2, IoSet3),
174    }
175    #[hal_cfg("pa11")]
176    PA11 {
177        #[hal_cfg("sercom0")]
178        C: (Sercom0, Pad3, IoSet1),
179        #[hal_cfg("sercom2")]
180        D: (Sercom2, Pad3, IoSet3),
181    }
182    #[hal_cfg("pa12")]
183    PA12 {
184        #[hal_cfg("sercom2")]
185        C: (Sercom2, Pad0, IoSet1) + I2C,
186        #[hal_cfg("sercom4")]
187        D: (Sercom4, Pad1, IoSet3) + I2C,
188    }
189    #[hal_cfg("pa13")]
190    PA13 {
191        #[hal_cfg("sercom2")]
192        C: (Sercom2, Pad1, IoSet1) + I2C,
193        #[hal_cfg("sercom4")]
194        D: (Sercom4, Pad0, IoSet3) + I2C,
195    }
196    #[hal_cfg("pa14")]
197    PA14 {
198        #[hal_cfg("sercom2")]
199        C: (Sercom2, Pad2, IoSet1),
200        #[hal_cfg("sercom4")]
201        D: (Sercom4, Pad2, IoSet3),
202    }
203    #[hal_cfg("pa15")]
204    PA15 {
205        #[hal_cfg("sercom2")]
206        C: (Sercom2, Pad3, IoSet1),
207        #[hal_cfg("sercom4")]
208        D: (Sercom4, Pad3, IoSet3),
209    }
210    #[hal_cfg("pa16")]
211    PA16 {
212        #[hal_cfg("sercom1")]
213        C: (Sercom1, Pad0, IoSet1, UndocIoSet1) + I2C,
214        #[hal_cfg("sercom3")]
215        D: (Sercom3, Pad1, IoSet3) + I2C,
216    }
217    #[hal_cfg("pa17")]
218    PA17 {
219        #[hal_cfg("sercom1")]
220        C: (Sercom1, Pad1, IoSet1, UndocIoSet1) + I2C,
221        #[hal_cfg("sercom3")]
222        D: (Sercom3, Pad0, IoSet3) + I2C,
223    }
224    #[hal_cfg("pa18")]
225    PA18 {
226        #[hal_cfg("sercom1")]
227        C: (Sercom1, Pad2, IoSet1),
228        #[hal_cfg("sercom3")]
229        D: (Sercom3, Pad2, IoSet3),
230    }
231    #[hal_cfg("pa19")]
232    PA19 {
233        #[hal_cfg("sercom1")]
234        C: (Sercom1, Pad3, IoSet1),
235        #[hal_cfg("sercom3")]
236        D: (Sercom3, Pad3, IoSet3),
237    }
238    #[hal_cfg("pa20")]
239    PA20 {
240        #[hal_cfg("sercom5")]
241        C: (Sercom5, Pad2, IoSet2),
242        #[hal_cfg("sercom3")]
243        D: (Sercom3, Pad2, IoSet2),
244    }
245    #[hal_cfg("pa21")]
246    PA21 {
247        #[hal_cfg("sercom5")]
248        C: (Sercom5, Pad3, IoSet2),
249        #[hal_cfg("sercom3")]
250        D: (Sercom3, Pad3, IoSet2),
251    }
252    #[hal_cfg("pa22")]
253    PA22 {
254        #[hal_cfg("sercom3")]
255        C: (Sercom3, Pad0, IoSet1) + I2C,
256        #[hal_cfg("sercom5")]
257        D: (Sercom5, Pad1, IoSet2, IoSet3, IoSet4) + I2C,
258    }
259    #[hal_cfg("pa23")]
260    PA23 {
261        #[hal_cfg("sercom3")]
262        C: (Sercom3, Pad1, IoSet1) + I2C,
263        #[hal_cfg("sercom5")]
264        D: (Sercom5, Pad0, IoSet2, IoSet3, IoSet4) + I2C,
265    }
266    #[hal_cfg("pa24")]
267    PA24 {
268        #[hal_cfg("sercom3")]
269        C: (Sercom3, Pad2, IoSet1),
270        #[hal_cfg("sercom5")]
271        D: (Sercom5, Pad2, IoSet3),
272    }
273    #[hal_cfg("pa25")]
274    PA25 {
275        #[hal_cfg("sercom3")]
276        C: (Sercom3, Pad3, IoSet1),
277        #[hal_cfg("sercom5")]
278        D: (Sercom5, Pad3, IoSet3),
279    }
280    #[hal_cfg("pa30")]
281    PA30 {
282        // Pin table in 6.1 does not mention function C, but sercom table in 6.2.8.1 does
283        #[hal_cfg("sercom7")]
284        C: (Sercom7, Pad2, IoSet5),
285        #[hal_cfg("sercom1")]
286        D: (Sercom1, Pad2, IoSet4),
287    }
288    #[hal_cfg("pa31")]
289    PA31 {
290        // Pin table in 6.1 does not mention function C, but sercom table in 6.2.8.1 does
291        #[hal_cfg("sercom7")]
292        C: (Sercom7, Pad3, IoSet5),
293        #[hal_cfg("sercom1")]
294        D: (Sercom1, Pad3, IoSet4),
295    }
296    #[hal_cfg("pb00")]
297    PB00 {
298        #[hal_cfg("sercom5")]
299        D: (Sercom5, Pad2, IoSet5, IoSet6),
300    }
301    #[hal_cfg("pb01")]
302    PB01 {
303        #[hal_cfg("sercom5")]
304        D: (Sercom5, Pad3, IoSet5, IoSet6),
305    }
306    #[hal_cfg("pb02")]
307    PB02 {
308        // According to Metro M4, PB02 is I2C-capable. This disagrees with datasheet table 6-8.
309        #[hal_cfg("sercom5")]
310        D: (Sercom5, Pad0, IoSet6) + I2C,
311    }
312    #[hal_cfg("pb03")]
313    PB03 {
314        // According to Metro M4, PB03 is I2C-capable. This disagrees with datasheet table 6-8.
315        #[hal_cfg("sercom5")]
316        D: (Sercom5, Pad1, IoSet6) + I2C,
317    }
318    #[hal_cfg("pb08")]
319    PB08 {
320        #[hal_cfg("sercom4")]
321        D: (Sercom4, Pad0, IoSet2),
322    }
323    #[hal_cfg("pb09")]
324    PB09 {
325        #[hal_cfg("sercom4")]
326        D: (Sercom4, Pad1, IoSet2),
327    }
328    #[hal_cfg("pb10")]
329    PB10 {
330        #[hal_cfg("sercom4")]
331        D: (Sercom4, Pad2, IoSet2),
332    }
333    #[hal_cfg("pb11")]
334    PB11 {
335        #[hal_cfg("sercom4")]
336        D: (Sercom4, Pad3, IoSet2),
337    }
338    #[hal_cfg("pb12")]
339    PB12 {
340        #[hal_cfg("sercom4")]
341        C: (Sercom4, Pad0, IoSet1),
342    }
343    #[hal_cfg("pb13")]
344    PB13 {
345        #[hal_cfg("sercom4")]
346        C: (Sercom4, Pad1, IoSet1),
347    }
348    #[hal_cfg("pb14")]
349    PB14 {
350        #[hal_cfg("sercom4")]
351        C: (Sercom4, Pad2, IoSet1),
352    }
353    #[hal_cfg("pb15")]
354    PB15 {
355        #[hal_cfg("sercom4")]
356        C: (Sercom4, Pad3, IoSet1),
357    }
358    #[hal_cfg("pb16")]
359    PB16 {
360        #[hal_cfg("sercom5")]
361        C: (Sercom5, Pad0, IoSet1),
362    }
363    #[hal_cfg("pb17")]
364    PB17 {
365        #[hal_cfg("sercom5")]
366        C: (Sercom5, Pad1, IoSet1),
367    }
368    #[hal_cfg("pb18")]
369    PB18 {
370        #[hal_cfg("sercom5")]
371        C: (Sercom5, Pad2, IoSet1),
372        #[hal_cfg("sercom7")]
373        D: (Sercom7, Pad2, IoSet4),
374    }
375    #[hal_cfg("pb19")]
376    PB19 {
377        #[hal_cfg("sercom5")]
378        C: (Sercom5, Pad3, IoSet1),
379        #[hal_cfg("sercom7")]
380        D: (Sercom7, Pad3, IoSet4),
381    }
382    #[hal_cfg("pb20")]
383    PB20 {
384        // According to Grand Central M4, PB20 is I2C-capable. This disagrees with datasheet
385        // table 6-8.
386        #[hal_cfg("sercom3")]
387        C: (Sercom3, Pad0, IoSet2) + I2C,
388        #[hal_cfg("sercom7")]
389        D: (Sercom7, Pad1, IoSet4),
390    }
391    #[hal_cfg("pb21")]
392    PB21 {
393        // According to Grand Central M4, PB21 is I2C-capable. This disagrees with datasheet
394        // table 6-8.
395        #[hal_cfg("sercom3")]
396        C: (Sercom3, Pad1, IoSet2) + I2C,
397        #[hal_cfg("sercom7")]
398        D: (Sercom7, Pad0, IoSet4),
399    }
400    #[hal_cfg("pb22")]
401    PB22 {
402        #[hal_cfg("sercom1")]
403        C: (Sercom1, Pad2, IoSet3, UndocIoSet1, UndocIoSet2),
404        #[hal_cfg("sercom5")]
405        D: (Sercom5, Pad2, IoSet4),
406    }
407    #[hal_cfg("pb23")]
408    PB23 {
409        #[hal_cfg("sercom1")]
410        C: (Sercom1, Pad3, IoSet3, UndocIoSet1, UndocIoSet2),
411        #[hal_cfg("sercom5")]
412        D: (Sercom5, Pad3, IoSet4),
413    }
414    #[hal_cfg("pb24")]
415    PB24 {
416        #[hal_cfg("sercom0")]
417        C: (Sercom0, Pad0, IoSet2),
418        #[hal_cfg("sercom2")]
419        D: (Sercom2, Pad1, IoSet4),
420    }
421    #[hal_cfg("pb25")]
422    PB25 {
423        #[hal_cfg("sercom0")]
424        C: (Sercom0, Pad1, IoSet2),
425        #[hal_cfg("sercom2")]
426        D: (Sercom2, Pad0, IoSet4),
427    }
428    #[hal_cfg("pb26")]
429    PB26 {
430        #[hal_cfg("sercom2")]
431        C: (Sercom2, Pad0, IoSet2),
432        #[hal_cfg("sercom4")]
433        D: (Sercom4, Pad1, IoSet4),
434    }
435    #[hal_cfg("pb27")]
436    PB27 {
437        #[hal_cfg("sercom2")]
438        C: (Sercom2, Pad1, IoSet2),
439        #[hal_cfg("sercom4")]
440        D: (Sercom4, Pad0, IoSet4),
441    }
442    #[hal_cfg("pb28")]
443    PB28 {
444        #[hal_cfg("sercom2")]
445        C: (Sercom2, Pad2, IoSet2),
446        #[hal_cfg("sercom4")]
447        D: (Sercom4, Pad2, IoSet4),
448    }
449    #[hal_cfg("pb29")]
450    PB29 {
451        #[hal_cfg("sercom2")]
452        C: (Sercom2, Pad3, IoSet2),
453        #[hal_cfg("sercom4")]
454        D: (Sercom4, Pad3, IoSet4),
455    }
456    #[hal_cfg("pb30")]
457    PB30 {
458        // Pin table in 6.1 does not mention function C, but sercom table in 6.2.8.1 does
459        #[hal_cfg("sercom7")]
460        C: (Sercom7, Pad0, IoSet5),
461        #[hal_cfg("sercom5")]
462        D: (Sercom5, Pad1, IoSet5),
463    }
464    #[hal_cfg("pb31")]
465    PB31 {
466        // Pin table in 6.1 does not mention function C, but sercom table in 6.2.8.1 does
467        #[hal_cfg("sercom7")]
468        C: (Sercom7, Pad1, IoSet5),
469        #[hal_cfg("sercom5")]
470        D: (Sercom5, Pad0, IoSet5),
471    }
472    #[hal_cfg("pc04")]
473    PC04 {
474        #[hal_cfg("sercom6")]
475        C: (Sercom6, Pad0, IoSet2),
476    }
477    #[hal_cfg("pc05")]
478    PC05 {
479        #[hal_cfg("sercom6")]
480        C: (Sercom6, Pad1, IoSet2),
481    }
482    #[hal_cfg("pc06")]
483    PC06 {
484        #[hal_cfg("sercom6")]
485        C: (Sercom6, Pad2, IoSet2),
486    }
487    #[hal_cfg("pc07")]
488    PC07 {
489        #[hal_cfg("sercom6")]
490        C: (Sercom6, Pad3, IoSet2),
491    }
492    #[hal_cfg("pc10")]
493    PC10 {
494        #[hal_cfg("sercom6")]
495        C: (Sercom6, Pad2, IoSet5),
496        #[hal_cfg("sercom7")]
497        D: (Sercom7, Pad2, IoSet3),
498    }
499    #[hal_cfg("pc11")]
500    PC11 {
501        #[hal_cfg("sercom6")]
502        C: (Sercom6, Pad3, IoSet5),
503        #[hal_cfg("sercom7")]
504        D: (Sercom7, Pad3, IoSet3),
505    }
506    #[hal_cfg("pc12")]
507    PC12 {
508        #[hal_cfg("sercom7")]
509        C: (Sercom7, Pad0, IoSet1, IoSet3),
510        #[hal_cfg("sercom6")]
511        D: (Sercom6, Pad1, IoSet4, IoSet5),
512    }
513    #[hal_cfg("pc13")]
514    PC13 {
515        #[hal_cfg("sercom7")]
516        C: (Sercom7, Pad1, IoSet1, IoSet3),
517        #[hal_cfg("sercom6")]
518        D: (Sercom6, Pad0, IoSet4, IoSet5),
519    }
520    #[hal_cfg("pc14")]
521    PC14 {
522        #[hal_cfg("sercom7")]
523        C: (Sercom7, Pad2, IoSet1),
524        #[hal_cfg("sercom6")]
525        D: (Sercom6, Pad2, IoSet4),
526    }
527    #[hal_cfg("pc15")]
528    PC15 {
529        #[hal_cfg("sercom7")]
530        C: (Sercom7, Pad3, IoSet1),
531        #[hal_cfg("sercom6")]
532        D: (Sercom6, Pad3, IoSet4),
533    }
534    #[hal_cfg("pc16")]
535    PC16 {
536        #[hal_cfg("sercom6")]
537        C: (Sercom6, Pad0, IoSet1),
538        #[hal_cfg("sercom0")]
539        D: (Sercom0, Pad1, IoSet4),
540    }
541    #[hal_cfg("pc17")]
542    PC17 {
543        #[hal_cfg("sercom6")]
544        C: (Sercom6, Pad1, IoSet1),
545        #[hal_cfg("sercom0")]
546        D: (Sercom0, Pad0, IoSet4),
547    }
548    #[hal_cfg("pc18")]
549    PC18 {
550        #[hal_cfg("sercom6")]
551        C: (Sercom6, Pad2, IoSet1),
552        #[hal_cfg("sercom0")]
553        D: (Sercom0, Pad2, IoSet4),
554    }
555    #[hal_cfg("pc19")]
556    PC19 {
557        #[hal_cfg("sercom6")]
558        C: (Sercom6, Pad3, IoSet1),
559        #[hal_cfg("sercom0")]
560        D: (Sercom0, Pad3, IoSet4),
561    }
562    #[hal_cfg("pc22")]
563    PC22 {
564        #[hal_cfg("sercom1")]
565        C: (Sercom1, Pad0, IoSet2),
566        #[hal_cfg("sercom3")]
567        D: (Sercom3, Pad1, IoSet4),
568    }
569    #[hal_cfg("pc23")]
570    PC23 {
571        #[hal_cfg("sercom1")]
572        C: (Sercom1, Pad1, IoSet2),
573        #[hal_cfg("sercom3")]
574        D: (Sercom3, Pad0, IoSet4),
575    }
576    #[hal_cfg("pc24")]
577    PC24 {
578        #[hal_cfg("sercom0")]
579        C: (Sercom0, Pad2, IoSet2),
580        #[hal_cfg("sercom2")]
581        D: (Sercom2, Pad2, IoSet4),
582    }
583    #[hal_cfg("pc25")]
584    PC25 {
585        #[hal_cfg("sercom0")]
586        C: (Sercom0, Pad3, IoSet2),
587        #[hal_cfg("sercom2")]
588        D: (Sercom2, Pad3, IoSet4),
589    }
590    #[hal_cfg("pc27")]
591    PC27 {
592        #[hal_cfg("sercom1")]
593        C: (Sercom1, Pad0, IoSet3),
594    }
595    #[hal_cfg("pc28")]
596    PC28 {
597        #[hal_cfg("sercom1")]
598        C: (Sercom1, Pad1, IoSet3),
599    }
600    #[hal_cfg("pd08")]
601    PD08 {
602        #[hal_cfg("sercom7")]
603        C: (Sercom7, Pad0, IoSet2) + I2C,
604        #[hal_cfg("sercom6")]
605        D: (Sercom6, Pad1, IoSet3) + I2C,
606    }
607    #[hal_cfg("pd09")]
608    PD09 {
609        #[hal_cfg("sercom7")]
610        C: (Sercom7, Pad1, IoSet2) + I2C,
611        #[hal_cfg("sercom6")]
612        D: (Sercom6, Pad0, IoSet3) + I2C,
613    }
614    #[hal_cfg("pd10")]
615    PD10 {
616        #[hal_cfg("sercom7")]
617        C: (Sercom7, Pad2, IoSet2),
618        #[hal_cfg("sercom6")]
619        D: (Sercom6, Pad2, IoSet3),
620    }
621    #[hal_cfg("pd11")]
622    PD11 {
623        #[hal_cfg("sercom7")]
624        C: (Sercom7, Pad3, IoSet2),
625        #[hal_cfg("sercom6")]
626        D: (Sercom6, Pad3, IoSet3),
627    }
628    #[hal_cfg("pd20")]
629    PD20 {
630        #[hal_cfg("sercom1")]
631        C: (Sercom1, Pad2, IoSet2),
632        #[hal_cfg("sercom3")]
633        D: (Sercom3, Pad2, IoSet4),
634    }
635    #[hal_cfg("pd21")]
636    PD21 {
637        #[hal_cfg("sercom1")]
638        C: (Sercom1, Pad3, IoSet2),
639        #[hal_cfg("sercom3")]
640        D: (Sercom3, Pad3, IoSet4),
641    }
642);
atsamd_hal/sercom/pad/impl_pad_thumbv7em.rs

atsamd_hal/sercom/pad/
impl_pad_thumbv7em.rs
