atsamd51p/i2s/
rxctrl.rs

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1#[doc = "Register `RXCTRL` reader"]
2pub type R = crate::R<RxctrlSpec>;
3#[doc = "Register `RXCTRL` writer"]
4pub type W = crate::W<RxctrlSpec>;
5#[doc = "Serializer Mode\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Sermodeselect {
9    #[doc = "0: Receive"]
10    Rx = 0,
11    #[doc = "2: Receive one PDM data on each serial clock edge"]
12    Pdm2 = 2,
13}
14impl From<Sermodeselect> for u8 {
15    #[inline(always)]
16    fn from(variant: Sermodeselect) -> Self {
17        variant as _
18    }
19}
20impl crate::FieldSpec for Sermodeselect {
21    type Ux = u8;
22}
23impl crate::IsEnum for Sermodeselect {}
24#[doc = "Field `SERMODE` reader - Serializer Mode"]
25pub type SermodeR = crate::FieldReader<Sermodeselect>;
26impl SermodeR {
27    #[doc = "Get enumerated values variant"]
28    #[inline(always)]
29    pub const fn variant(&self) -> Option<Sermodeselect> {
30        match self.bits {
31            0 => Some(Sermodeselect::Rx),
32            2 => Some(Sermodeselect::Pdm2),
33            _ => None,
34        }
35    }
36    #[doc = "Receive"]
37    #[inline(always)]
38    pub fn is_rx(&self) -> bool {
39        *self == Sermodeselect::Rx
40    }
41    #[doc = "Receive one PDM data on each serial clock edge"]
42    #[inline(always)]
43    pub fn is_pdm2(&self) -> bool {
44        *self == Sermodeselect::Pdm2
45    }
46}
47#[doc = "Field `SERMODE` writer - Serializer Mode"]
48pub type SermodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sermodeselect>;
49impl<'a, REG> SermodeW<'a, REG>
50where
51    REG: crate::Writable + crate::RegisterSpec,
52    REG::Ux: From<u8>,
53{
54    #[doc = "Receive"]
55    #[inline(always)]
56    pub fn rx(self) -> &'a mut crate::W<REG> {
57        self.variant(Sermodeselect::Rx)
58    }
59    #[doc = "Receive one PDM data on each serial clock edge"]
60    #[inline(always)]
61    pub fn pdm2(self) -> &'a mut crate::W<REG> {
62        self.variant(Sermodeselect::Pdm2)
63    }
64}
65#[doc = "Clock Unit Selection\n\nValue on reset: 0"]
66#[derive(Clone, Copy, Debug, PartialEq, Eq)]
67pub enum Clkselselect {
68    #[doc = "0: Use Clock Unit 0"]
69    Clk0 = 0,
70    #[doc = "1: Use Clock Unit 1"]
71    Clk1 = 1,
72}
73impl From<Clkselselect> for bool {
74    #[inline(always)]
75    fn from(variant: Clkselselect) -> Self {
76        variant as u8 != 0
77    }
78}
79#[doc = "Field `CLKSEL` reader - Clock Unit Selection"]
80pub type ClkselR = crate::BitReader<Clkselselect>;
81impl ClkselR {
82    #[doc = "Get enumerated values variant"]
83    #[inline(always)]
84    pub const fn variant(&self) -> Clkselselect {
85        match self.bits {
86            false => Clkselselect::Clk0,
87            true => Clkselselect::Clk1,
88        }
89    }
90    #[doc = "Use Clock Unit 0"]
91    #[inline(always)]
92    pub fn is_clk0(&self) -> bool {
93        *self == Clkselselect::Clk0
94    }
95    #[doc = "Use Clock Unit 1"]
96    #[inline(always)]
97    pub fn is_clk1(&self) -> bool {
98        *self == Clkselselect::Clk1
99    }
100}
101#[doc = "Field `CLKSEL` writer - Clock Unit Selection"]
102pub type ClkselW<'a, REG> = crate::BitWriter<'a, REG, Clkselselect>;
103impl<'a, REG> ClkselW<'a, REG>
104where
105    REG: crate::Writable + crate::RegisterSpec,
106{
107    #[doc = "Use Clock Unit 0"]
108    #[inline(always)]
109    pub fn clk0(self) -> &'a mut crate::W<REG> {
110        self.variant(Clkselselect::Clk0)
111    }
112    #[doc = "Use Clock Unit 1"]
113    #[inline(always)]
114    pub fn clk1(self) -> &'a mut crate::W<REG> {
115        self.variant(Clkselselect::Clk1)
116    }
117}
118#[doc = "Data Slot Formatting Adjust\n\nValue on reset: 0"]
119#[derive(Clone, Copy, Debug, PartialEq, Eq)]
120pub enum Slotadjselect {
121    #[doc = "0: Data is right adjusted in slot"]
122    Right = 0,
123    #[doc = "1: Data is left adjusted in slot"]
124    Left = 1,
125}
126impl From<Slotadjselect> for bool {
127    #[inline(always)]
128    fn from(variant: Slotadjselect) -> Self {
129        variant as u8 != 0
130    }
131}
132#[doc = "Field `SLOTADJ` reader - Data Slot Formatting Adjust"]
133pub type SlotadjR = crate::BitReader<Slotadjselect>;
134impl SlotadjR {
135    #[doc = "Get enumerated values variant"]
136    #[inline(always)]
137    pub const fn variant(&self) -> Slotadjselect {
138        match self.bits {
139            false => Slotadjselect::Right,
140            true => Slotadjselect::Left,
141        }
142    }
143    #[doc = "Data is right adjusted in slot"]
144    #[inline(always)]
145    pub fn is_right(&self) -> bool {
146        *self == Slotadjselect::Right
147    }
148    #[doc = "Data is left adjusted in slot"]
149    #[inline(always)]
150    pub fn is_left(&self) -> bool {
151        *self == Slotadjselect::Left
152    }
153}
154#[doc = "Field `SLOTADJ` writer - Data Slot Formatting Adjust"]
155pub type SlotadjW<'a, REG> = crate::BitWriter<'a, REG, Slotadjselect>;
156impl<'a, REG> SlotadjW<'a, REG>
157where
158    REG: crate::Writable + crate::RegisterSpec,
159{
160    #[doc = "Data is right adjusted in slot"]
161    #[inline(always)]
162    pub fn right(self) -> &'a mut crate::W<REG> {
163        self.variant(Slotadjselect::Right)
164    }
165    #[doc = "Data is left adjusted in slot"]
166    #[inline(always)]
167    pub fn left(self) -> &'a mut crate::W<REG> {
168        self.variant(Slotadjselect::Left)
169    }
170}
171#[doc = "Data Word Size\n\nValue on reset: 0"]
172#[derive(Clone, Copy, Debug, PartialEq, Eq)]
173#[repr(u8)]
174pub enum Datasizeselect {
175    #[doc = "0: 32 bits"]
176    _32 = 0,
177    #[doc = "1: 24 bits"]
178    _24 = 1,
179    #[doc = "2: 20 bits"]
180    _20 = 2,
181    #[doc = "3: 18 bits"]
182    _18 = 3,
183    #[doc = "4: 16 bits"]
184    _16 = 4,
185    #[doc = "5: 16 bits compact stereo"]
186    _16c = 5,
187    #[doc = "6: 8 bits"]
188    _8 = 6,
189    #[doc = "7: 8 bits compact stereo"]
190    _8c = 7,
191}
192impl From<Datasizeselect> for u8 {
193    #[inline(always)]
194    fn from(variant: Datasizeselect) -> Self {
195        variant as _
196    }
197}
198impl crate::FieldSpec for Datasizeselect {
199    type Ux = u8;
200}
201impl crate::IsEnum for Datasizeselect {}
202#[doc = "Field `DATASIZE` reader - Data Word Size"]
203pub type DatasizeR = crate::FieldReader<Datasizeselect>;
204impl DatasizeR {
205    #[doc = "Get enumerated values variant"]
206    #[inline(always)]
207    pub const fn variant(&self) -> Datasizeselect {
208        match self.bits {
209            0 => Datasizeselect::_32,
210            1 => Datasizeselect::_24,
211            2 => Datasizeselect::_20,
212            3 => Datasizeselect::_18,
213            4 => Datasizeselect::_16,
214            5 => Datasizeselect::_16c,
215            6 => Datasizeselect::_8,
216            7 => Datasizeselect::_8c,
217            _ => unreachable!(),
218        }
219    }
220    #[doc = "32 bits"]
221    #[inline(always)]
222    pub fn is_32(&self) -> bool {
223        *self == Datasizeselect::_32
224    }
225    #[doc = "24 bits"]
226    #[inline(always)]
227    pub fn is_24(&self) -> bool {
228        *self == Datasizeselect::_24
229    }
230    #[doc = "20 bits"]
231    #[inline(always)]
232    pub fn is_20(&self) -> bool {
233        *self == Datasizeselect::_20
234    }
235    #[doc = "18 bits"]
236    #[inline(always)]
237    pub fn is_18(&self) -> bool {
238        *self == Datasizeselect::_18
239    }
240    #[doc = "16 bits"]
241    #[inline(always)]
242    pub fn is_16(&self) -> bool {
243        *self == Datasizeselect::_16
244    }
245    #[doc = "16 bits compact stereo"]
246    #[inline(always)]
247    pub fn is_16c(&self) -> bool {
248        *self == Datasizeselect::_16c
249    }
250    #[doc = "8 bits"]
251    #[inline(always)]
252    pub fn is_8(&self) -> bool {
253        *self == Datasizeselect::_8
254    }
255    #[doc = "8 bits compact stereo"]
256    #[inline(always)]
257    pub fn is_8c(&self) -> bool {
258        *self == Datasizeselect::_8c
259    }
260}
261#[doc = "Field `DATASIZE` writer - Data Word Size"]
262pub type DatasizeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Datasizeselect, crate::Safe>;
263impl<'a, REG> DatasizeW<'a, REG>
264where
265    REG: crate::Writable + crate::RegisterSpec,
266    REG::Ux: From<u8>,
267{
268    #[doc = "32 bits"]
269    #[inline(always)]
270    pub fn _32(self) -> &'a mut crate::W<REG> {
271        self.variant(Datasizeselect::_32)
272    }
273    #[doc = "24 bits"]
274    #[inline(always)]
275    pub fn _24(self) -> &'a mut crate::W<REG> {
276        self.variant(Datasizeselect::_24)
277    }
278    #[doc = "20 bits"]
279    #[inline(always)]
280    pub fn _20(self) -> &'a mut crate::W<REG> {
281        self.variant(Datasizeselect::_20)
282    }
283    #[doc = "18 bits"]
284    #[inline(always)]
285    pub fn _18(self) -> &'a mut crate::W<REG> {
286        self.variant(Datasizeselect::_18)
287    }
288    #[doc = "16 bits"]
289    #[inline(always)]
290    pub fn _16(self) -> &'a mut crate::W<REG> {
291        self.variant(Datasizeselect::_16)
292    }
293    #[doc = "16 bits compact stereo"]
294    #[inline(always)]
295    pub fn _16c(self) -> &'a mut crate::W<REG> {
296        self.variant(Datasizeselect::_16c)
297    }
298    #[doc = "8 bits"]
299    #[inline(always)]
300    pub fn _8(self) -> &'a mut crate::W<REG> {
301        self.variant(Datasizeselect::_8)
302    }
303    #[doc = "8 bits compact stereo"]
304    #[inline(always)]
305    pub fn _8c(self) -> &'a mut crate::W<REG> {
306        self.variant(Datasizeselect::_8c)
307    }
308}
309#[doc = "Data Word Formatting Adjust\n\nValue on reset: 0"]
310#[derive(Clone, Copy, Debug, PartialEq, Eq)]
311pub enum Wordadjselect {
312    #[doc = "0: Data is right adjusted in word"]
313    Right = 0,
314    #[doc = "1: Data is left adjusted in word"]
315    Left = 1,
316}
317impl From<Wordadjselect> for bool {
318    #[inline(always)]
319    fn from(variant: Wordadjselect) -> Self {
320        variant as u8 != 0
321    }
322}
323#[doc = "Field `WORDADJ` reader - Data Word Formatting Adjust"]
324pub type WordadjR = crate::BitReader<Wordadjselect>;
325impl WordadjR {
326    #[doc = "Get enumerated values variant"]
327    #[inline(always)]
328    pub const fn variant(&self) -> Wordadjselect {
329        match self.bits {
330            false => Wordadjselect::Right,
331            true => Wordadjselect::Left,
332        }
333    }
334    #[doc = "Data is right adjusted in word"]
335    #[inline(always)]
336    pub fn is_right(&self) -> bool {
337        *self == Wordadjselect::Right
338    }
339    #[doc = "Data is left adjusted in word"]
340    #[inline(always)]
341    pub fn is_left(&self) -> bool {
342        *self == Wordadjselect::Left
343    }
344}
345#[doc = "Field `WORDADJ` writer - Data Word Formatting Adjust"]
346pub type WordadjW<'a, REG> = crate::BitWriter<'a, REG, Wordadjselect>;
347impl<'a, REG> WordadjW<'a, REG>
348where
349    REG: crate::Writable + crate::RegisterSpec,
350{
351    #[doc = "Data is right adjusted in word"]
352    #[inline(always)]
353    pub fn right(self) -> &'a mut crate::W<REG> {
354        self.variant(Wordadjselect::Right)
355    }
356    #[doc = "Data is left adjusted in word"]
357    #[inline(always)]
358    pub fn left(self) -> &'a mut crate::W<REG> {
359        self.variant(Wordadjselect::Left)
360    }
361}
362#[doc = "Data Formatting Bit Extension\n\nValue on reset: 0"]
363#[derive(Clone, Copy, Debug, PartialEq, Eq)]
364#[repr(u8)]
365pub enum Extendselect {
366    #[doc = "0: Extend with zeroes"]
367    Zero = 0,
368    #[doc = "1: Extend with ones"]
369    One = 1,
370    #[doc = "2: Extend with Most Significant Bit"]
371    Msbit = 2,
372    #[doc = "3: Extend with Least Significant Bit"]
373    Lsbit = 3,
374}
375impl From<Extendselect> for u8 {
376    #[inline(always)]
377    fn from(variant: Extendselect) -> Self {
378        variant as _
379    }
380}
381impl crate::FieldSpec for Extendselect {
382    type Ux = u8;
383}
384impl crate::IsEnum for Extendselect {}
385#[doc = "Field `EXTEND` reader - Data Formatting Bit Extension"]
386pub type ExtendR = crate::FieldReader<Extendselect>;
387impl ExtendR {
388    #[doc = "Get enumerated values variant"]
389    #[inline(always)]
390    pub const fn variant(&self) -> Extendselect {
391        match self.bits {
392            0 => Extendselect::Zero,
393            1 => Extendselect::One,
394            2 => Extendselect::Msbit,
395            3 => Extendselect::Lsbit,
396            _ => unreachable!(),
397        }
398    }
399    #[doc = "Extend with zeroes"]
400    #[inline(always)]
401    pub fn is_zero(&self) -> bool {
402        *self == Extendselect::Zero
403    }
404    #[doc = "Extend with ones"]
405    #[inline(always)]
406    pub fn is_one(&self) -> bool {
407        *self == Extendselect::One
408    }
409    #[doc = "Extend with Most Significant Bit"]
410    #[inline(always)]
411    pub fn is_msbit(&self) -> bool {
412        *self == Extendselect::Msbit
413    }
414    #[doc = "Extend with Least Significant Bit"]
415    #[inline(always)]
416    pub fn is_lsbit(&self) -> bool {
417        *self == Extendselect::Lsbit
418    }
419}
420#[doc = "Field `EXTEND` writer - Data Formatting Bit Extension"]
421pub type ExtendW<'a, REG> = crate::FieldWriter<'a, REG, 2, Extendselect, crate::Safe>;
422impl<'a, REG> ExtendW<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425    REG::Ux: From<u8>,
426{
427    #[doc = "Extend with zeroes"]
428    #[inline(always)]
429    pub fn zero(self) -> &'a mut crate::W<REG> {
430        self.variant(Extendselect::Zero)
431    }
432    #[doc = "Extend with ones"]
433    #[inline(always)]
434    pub fn one(self) -> &'a mut crate::W<REG> {
435        self.variant(Extendselect::One)
436    }
437    #[doc = "Extend with Most Significant Bit"]
438    #[inline(always)]
439    pub fn msbit(self) -> &'a mut crate::W<REG> {
440        self.variant(Extendselect::Msbit)
441    }
442    #[doc = "Extend with Least Significant Bit"]
443    #[inline(always)]
444    pub fn lsbit(self) -> &'a mut crate::W<REG> {
445        self.variant(Extendselect::Lsbit)
446    }
447}
448#[doc = "Data Formatting Bit Reverse\n\nValue on reset: 0"]
449#[derive(Clone, Copy, Debug, PartialEq, Eq)]
450pub enum Bitrevselect {
451    #[doc = "0: Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
452    Msbit = 0,
453    #[doc = "1: Transfer Data Least Significant Bit (LSB) first"]
454    Lsbit = 1,
455}
456impl From<Bitrevselect> for bool {
457    #[inline(always)]
458    fn from(variant: Bitrevselect) -> Self {
459        variant as u8 != 0
460    }
461}
462#[doc = "Field `BITREV` reader - Data Formatting Bit Reverse"]
463pub type BitrevR = crate::BitReader<Bitrevselect>;
464impl BitrevR {
465    #[doc = "Get enumerated values variant"]
466    #[inline(always)]
467    pub const fn variant(&self) -> Bitrevselect {
468        match self.bits {
469            false => Bitrevselect::Msbit,
470            true => Bitrevselect::Lsbit,
471        }
472    }
473    #[doc = "Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
474    #[inline(always)]
475    pub fn is_msbit(&self) -> bool {
476        *self == Bitrevselect::Msbit
477    }
478    #[doc = "Transfer Data Least Significant Bit (LSB) first"]
479    #[inline(always)]
480    pub fn is_lsbit(&self) -> bool {
481        *self == Bitrevselect::Lsbit
482    }
483}
484#[doc = "Field `BITREV` writer - Data Formatting Bit Reverse"]
485pub type BitrevW<'a, REG> = crate::BitWriter<'a, REG, Bitrevselect>;
486impl<'a, REG> BitrevW<'a, REG>
487where
488    REG: crate::Writable + crate::RegisterSpec,
489{
490    #[doc = "Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
491    #[inline(always)]
492    pub fn msbit(self) -> &'a mut crate::W<REG> {
493        self.variant(Bitrevselect::Msbit)
494    }
495    #[doc = "Transfer Data Least Significant Bit (LSB) first"]
496    #[inline(always)]
497    pub fn lsbit(self) -> &'a mut crate::W<REG> {
498        self.variant(Bitrevselect::Lsbit)
499    }
500}
501#[doc = "Field `SLOTDIS0` reader - Slot 0 Disabled for this Serializer"]
502pub type Slotdis0R = crate::BitReader;
503#[doc = "Field `SLOTDIS0` writer - Slot 0 Disabled for this Serializer"]
504pub type Slotdis0W<'a, REG> = crate::BitWriter<'a, REG>;
505#[doc = "Field `SLOTDIS1` reader - Slot 1 Disabled for this Serializer"]
506pub type Slotdis1R = crate::BitReader;
507#[doc = "Field `SLOTDIS1` writer - Slot 1 Disabled for this Serializer"]
508pub type Slotdis1W<'a, REG> = crate::BitWriter<'a, REG>;
509#[doc = "Field `SLOTDIS2` reader - Slot 2 Disabled for this Serializer"]
510pub type Slotdis2R = crate::BitReader;
511#[doc = "Field `SLOTDIS2` writer - Slot 2 Disabled for this Serializer"]
512pub type Slotdis2W<'a, REG> = crate::BitWriter<'a, REG>;
513#[doc = "Field `SLOTDIS3` reader - Slot 3 Disabled for this Serializer"]
514pub type Slotdis3R = crate::BitReader;
515#[doc = "Field `SLOTDIS3` writer - Slot 3 Disabled for this Serializer"]
516pub type Slotdis3W<'a, REG> = crate::BitWriter<'a, REG>;
517#[doc = "Field `SLOTDIS4` reader - Slot 4 Disabled for this Serializer"]
518pub type Slotdis4R = crate::BitReader;
519#[doc = "Field `SLOTDIS4` writer - Slot 4 Disabled for this Serializer"]
520pub type Slotdis4W<'a, REG> = crate::BitWriter<'a, REG>;
521#[doc = "Field `SLOTDIS5` reader - Slot 5 Disabled for this Serializer"]
522pub type Slotdis5R = crate::BitReader;
523#[doc = "Field `SLOTDIS5` writer - Slot 5 Disabled for this Serializer"]
524pub type Slotdis5W<'a, REG> = crate::BitWriter<'a, REG>;
525#[doc = "Field `SLOTDIS6` reader - Slot 6 Disabled for this Serializer"]
526pub type Slotdis6R = crate::BitReader;
527#[doc = "Field `SLOTDIS6` writer - Slot 6 Disabled for this Serializer"]
528pub type Slotdis6W<'a, REG> = crate::BitWriter<'a, REG>;
529#[doc = "Field `SLOTDIS7` reader - Slot 7 Disabled for this Serializer"]
530pub type Slotdis7R = crate::BitReader;
531#[doc = "Field `SLOTDIS7` writer - Slot 7 Disabled for this Serializer"]
532pub type Slotdis7W<'a, REG> = crate::BitWriter<'a, REG>;
533#[doc = "Mono Mode\n\nValue on reset: 0"]
534#[derive(Clone, Copy, Debug, PartialEq, Eq)]
535pub enum Monoselect {
536    #[doc = "0: Normal mode"]
537    Stereo = 0,
538    #[doc = "1: Left channel data is duplicated to right channel"]
539    Mono = 1,
540}
541impl From<Monoselect> for bool {
542    #[inline(always)]
543    fn from(variant: Monoselect) -> Self {
544        variant as u8 != 0
545    }
546}
547#[doc = "Field `MONO` reader - Mono Mode"]
548pub type MonoR = crate::BitReader<Monoselect>;
549impl MonoR {
550    #[doc = "Get enumerated values variant"]
551    #[inline(always)]
552    pub const fn variant(&self) -> Monoselect {
553        match self.bits {
554            false => Monoselect::Stereo,
555            true => Monoselect::Mono,
556        }
557    }
558    #[doc = "Normal mode"]
559    #[inline(always)]
560    pub fn is_stereo(&self) -> bool {
561        *self == Monoselect::Stereo
562    }
563    #[doc = "Left channel data is duplicated to right channel"]
564    #[inline(always)]
565    pub fn is_mono(&self) -> bool {
566        *self == Monoselect::Mono
567    }
568}
569#[doc = "Field `MONO` writer - Mono Mode"]
570pub type MonoW<'a, REG> = crate::BitWriter<'a, REG, Monoselect>;
571impl<'a, REG> MonoW<'a, REG>
572where
573    REG: crate::Writable + crate::RegisterSpec,
574{
575    #[doc = "Normal mode"]
576    #[inline(always)]
577    pub fn stereo(self) -> &'a mut crate::W<REG> {
578        self.variant(Monoselect::Stereo)
579    }
580    #[doc = "Left channel data is duplicated to right channel"]
581    #[inline(always)]
582    pub fn mono(self) -> &'a mut crate::W<REG> {
583        self.variant(Monoselect::Mono)
584    }
585}
586#[doc = "Single or Multiple DMA Channels\n\nValue on reset: 0"]
587#[derive(Clone, Copy, Debug, PartialEq, Eq)]
588pub enum Dmaselect {
589    #[doc = "0: Single DMA channel"]
590    Single = 0,
591    #[doc = "1: One DMA channel per data channel"]
592    Multiple = 1,
593}
594impl From<Dmaselect> for bool {
595    #[inline(always)]
596    fn from(variant: Dmaselect) -> Self {
597        variant as u8 != 0
598    }
599}
600#[doc = "Field `DMA` reader - Single or Multiple DMA Channels"]
601pub type DmaR = crate::BitReader<Dmaselect>;
602impl DmaR {
603    #[doc = "Get enumerated values variant"]
604    #[inline(always)]
605    pub const fn variant(&self) -> Dmaselect {
606        match self.bits {
607            false => Dmaselect::Single,
608            true => Dmaselect::Multiple,
609        }
610    }
611    #[doc = "Single DMA channel"]
612    #[inline(always)]
613    pub fn is_single(&self) -> bool {
614        *self == Dmaselect::Single
615    }
616    #[doc = "One DMA channel per data channel"]
617    #[inline(always)]
618    pub fn is_multiple(&self) -> bool {
619        *self == Dmaselect::Multiple
620    }
621}
622#[doc = "Field `DMA` writer - Single or Multiple DMA Channels"]
623pub type DmaW<'a, REG> = crate::BitWriter<'a, REG, Dmaselect>;
624impl<'a, REG> DmaW<'a, REG>
625where
626    REG: crate::Writable + crate::RegisterSpec,
627{
628    #[doc = "Single DMA channel"]
629    #[inline(always)]
630    pub fn single(self) -> &'a mut crate::W<REG> {
631        self.variant(Dmaselect::Single)
632    }
633    #[doc = "One DMA channel per data channel"]
634    #[inline(always)]
635    pub fn multiple(self) -> &'a mut crate::W<REG> {
636        self.variant(Dmaselect::Multiple)
637    }
638}
639#[doc = "Field `RXLOOP` reader - Loop-back Test Mode"]
640pub type RxloopR = crate::BitReader;
641#[doc = "Field `RXLOOP` writer - Loop-back Test Mode"]
642pub type RxloopW<'a, REG> = crate::BitWriter<'a, REG>;
643impl R {
644    #[doc = "Bits 0:1 - Serializer Mode"]
645    #[inline(always)]
646    pub fn sermode(&self) -> SermodeR {
647        SermodeR::new((self.bits & 3) as u8)
648    }
649    #[doc = "Bit 5 - Clock Unit Selection"]
650    #[inline(always)]
651    pub fn clksel(&self) -> ClkselR {
652        ClkselR::new(((self.bits >> 5) & 1) != 0)
653    }
654    #[doc = "Bit 7 - Data Slot Formatting Adjust"]
655    #[inline(always)]
656    pub fn slotadj(&self) -> SlotadjR {
657        SlotadjR::new(((self.bits >> 7) & 1) != 0)
658    }
659    #[doc = "Bits 8:10 - Data Word Size"]
660    #[inline(always)]
661    pub fn datasize(&self) -> DatasizeR {
662        DatasizeR::new(((self.bits >> 8) & 7) as u8)
663    }
664    #[doc = "Bit 12 - Data Word Formatting Adjust"]
665    #[inline(always)]
666    pub fn wordadj(&self) -> WordadjR {
667        WordadjR::new(((self.bits >> 12) & 1) != 0)
668    }
669    #[doc = "Bits 13:14 - Data Formatting Bit Extension"]
670    #[inline(always)]
671    pub fn extend(&self) -> ExtendR {
672        ExtendR::new(((self.bits >> 13) & 3) as u8)
673    }
674    #[doc = "Bit 15 - Data Formatting Bit Reverse"]
675    #[inline(always)]
676    pub fn bitrev(&self) -> BitrevR {
677        BitrevR::new(((self.bits >> 15) & 1) != 0)
678    }
679    #[doc = "Bit 16 - Slot 0 Disabled for this Serializer"]
680    #[inline(always)]
681    pub fn slotdis0(&self) -> Slotdis0R {
682        Slotdis0R::new(((self.bits >> 16) & 1) != 0)
683    }
684    #[doc = "Bit 17 - Slot 1 Disabled for this Serializer"]
685    #[inline(always)]
686    pub fn slotdis1(&self) -> Slotdis1R {
687        Slotdis1R::new(((self.bits >> 17) & 1) != 0)
688    }
689    #[doc = "Bit 18 - Slot 2 Disabled for this Serializer"]
690    #[inline(always)]
691    pub fn slotdis2(&self) -> Slotdis2R {
692        Slotdis2R::new(((self.bits >> 18) & 1) != 0)
693    }
694    #[doc = "Bit 19 - Slot 3 Disabled for this Serializer"]
695    #[inline(always)]
696    pub fn slotdis3(&self) -> Slotdis3R {
697        Slotdis3R::new(((self.bits >> 19) & 1) != 0)
698    }
699    #[doc = "Bit 20 - Slot 4 Disabled for this Serializer"]
700    #[inline(always)]
701    pub fn slotdis4(&self) -> Slotdis4R {
702        Slotdis4R::new(((self.bits >> 20) & 1) != 0)
703    }
704    #[doc = "Bit 21 - Slot 5 Disabled for this Serializer"]
705    #[inline(always)]
706    pub fn slotdis5(&self) -> Slotdis5R {
707        Slotdis5R::new(((self.bits >> 21) & 1) != 0)
708    }
709    #[doc = "Bit 22 - Slot 6 Disabled for this Serializer"]
710    #[inline(always)]
711    pub fn slotdis6(&self) -> Slotdis6R {
712        Slotdis6R::new(((self.bits >> 22) & 1) != 0)
713    }
714    #[doc = "Bit 23 - Slot 7 Disabled for this Serializer"]
715    #[inline(always)]
716    pub fn slotdis7(&self) -> Slotdis7R {
717        Slotdis7R::new(((self.bits >> 23) & 1) != 0)
718    }
719    #[doc = "Bit 24 - Mono Mode"]
720    #[inline(always)]
721    pub fn mono(&self) -> MonoR {
722        MonoR::new(((self.bits >> 24) & 1) != 0)
723    }
724    #[doc = "Bit 25 - Single or Multiple DMA Channels"]
725    #[inline(always)]
726    pub fn dma(&self) -> DmaR {
727        DmaR::new(((self.bits >> 25) & 1) != 0)
728    }
729    #[doc = "Bit 26 - Loop-back Test Mode"]
730    #[inline(always)]
731    pub fn rxloop(&self) -> RxloopR {
732        RxloopR::new(((self.bits >> 26) & 1) != 0)
733    }
734}
735impl W {
736    #[doc = "Bits 0:1 - Serializer Mode"]
737    #[inline(always)]
738    #[must_use]
739    pub fn sermode(&mut self) -> SermodeW<RxctrlSpec> {
740        SermodeW::new(self, 0)
741    }
742    #[doc = "Bit 5 - Clock Unit Selection"]
743    #[inline(always)]
744    #[must_use]
745    pub fn clksel(&mut self) -> ClkselW<RxctrlSpec> {
746        ClkselW::new(self, 5)
747    }
748    #[doc = "Bit 7 - Data Slot Formatting Adjust"]
749    #[inline(always)]
750    #[must_use]
751    pub fn slotadj(&mut self) -> SlotadjW<RxctrlSpec> {
752        SlotadjW::new(self, 7)
753    }
754    #[doc = "Bits 8:10 - Data Word Size"]
755    #[inline(always)]
756    #[must_use]
757    pub fn datasize(&mut self) -> DatasizeW<RxctrlSpec> {
758        DatasizeW::new(self, 8)
759    }
760    #[doc = "Bit 12 - Data Word Formatting Adjust"]
761    #[inline(always)]
762    #[must_use]
763    pub fn wordadj(&mut self) -> WordadjW<RxctrlSpec> {
764        WordadjW::new(self, 12)
765    }
766    #[doc = "Bits 13:14 - Data Formatting Bit Extension"]
767    #[inline(always)]
768    #[must_use]
769    pub fn extend(&mut self) -> ExtendW<RxctrlSpec> {
770        ExtendW::new(self, 13)
771    }
772    #[doc = "Bit 15 - Data Formatting Bit Reverse"]
773    #[inline(always)]
774    #[must_use]
775    pub fn bitrev(&mut self) -> BitrevW<RxctrlSpec> {
776        BitrevW::new(self, 15)
777    }
778    #[doc = "Bit 16 - Slot 0 Disabled for this Serializer"]
779    #[inline(always)]
780    #[must_use]
781    pub fn slotdis0(&mut self) -> Slotdis0W<RxctrlSpec> {
782        Slotdis0W::new(self, 16)
783    }
784    #[doc = "Bit 17 - Slot 1 Disabled for this Serializer"]
785    #[inline(always)]
786    #[must_use]
787    pub fn slotdis1(&mut self) -> Slotdis1W<RxctrlSpec> {
788        Slotdis1W::new(self, 17)
789    }
790    #[doc = "Bit 18 - Slot 2 Disabled for this Serializer"]
791    #[inline(always)]
792    #[must_use]
793    pub fn slotdis2(&mut self) -> Slotdis2W<RxctrlSpec> {
794        Slotdis2W::new(self, 18)
795    }
796    #[doc = "Bit 19 - Slot 3 Disabled for this Serializer"]
797    #[inline(always)]
798    #[must_use]
799    pub fn slotdis3(&mut self) -> Slotdis3W<RxctrlSpec> {
800        Slotdis3W::new(self, 19)
801    }
802    #[doc = "Bit 20 - Slot 4 Disabled for this Serializer"]
803    #[inline(always)]
804    #[must_use]
805    pub fn slotdis4(&mut self) -> Slotdis4W<RxctrlSpec> {
806        Slotdis4W::new(self, 20)
807    }
808    #[doc = "Bit 21 - Slot 5 Disabled for this Serializer"]
809    #[inline(always)]
810    #[must_use]
811    pub fn slotdis5(&mut self) -> Slotdis5W<RxctrlSpec> {
812        Slotdis5W::new(self, 21)
813    }
814    #[doc = "Bit 22 - Slot 6 Disabled for this Serializer"]
815    #[inline(always)]
816    #[must_use]
817    pub fn slotdis6(&mut self) -> Slotdis6W<RxctrlSpec> {
818        Slotdis6W::new(self, 22)
819    }
820    #[doc = "Bit 23 - Slot 7 Disabled for this Serializer"]
821    #[inline(always)]
822    #[must_use]
823    pub fn slotdis7(&mut self) -> Slotdis7W<RxctrlSpec> {
824        Slotdis7W::new(self, 23)
825    }
826    #[doc = "Bit 24 - Mono Mode"]
827    #[inline(always)]
828    #[must_use]
829    pub fn mono(&mut self) -> MonoW<RxctrlSpec> {
830        MonoW::new(self, 24)
831    }
832    #[doc = "Bit 25 - Single or Multiple DMA Channels"]
833    #[inline(always)]
834    #[must_use]
835    pub fn dma(&mut self) -> DmaW<RxctrlSpec> {
836        DmaW::new(self, 25)
837    }
838    #[doc = "Bit 26 - Loop-back Test Mode"]
839    #[inline(always)]
840    #[must_use]
841    pub fn rxloop(&mut self) -> RxloopW<RxctrlSpec> {
842        RxloopW::new(self, 26)
843    }
844}
845#[doc = "Rx Serializer Control\n\nYou can [`read`](crate::Reg::read) this register and get [`rxctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rxctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
846pub struct RxctrlSpec;
847impl crate::RegisterSpec for RxctrlSpec {
848    type Ux = u32;
849}
850#[doc = "`read()` method returns [`rxctrl::R`](R) reader structure"]
851impl crate::Readable for RxctrlSpec {}
852#[doc = "`write(|w| ..)` method takes [`rxctrl::W`](W) writer structure"]
853impl crate::Writable for RxctrlSpec {
854    type Safety = crate::Unsafe;
855    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
856    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
857}
858#[doc = "`reset()` method sets RXCTRL to value 0"]
859impl crate::Resettable for RxctrlSpec {
860    const RESET_VALUE: u32 = 0;
861}
atsamd51p/i2s/rxctrl.rs

atsamd51p/i2s/
rxctrl.rs
