atsamd51p/sdhc0/
cacr.rs

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1#[doc = "Register `CACR` reader"]
2pub type R = crate::R<CacrSpec>;
3#[doc = "Register `CACR` writer"]
4pub type W = crate::W<CacrSpec>;
5#[doc = "Field `CAPWREN` reader - Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)"]
6pub type CapwrenR = crate::BitReader;
7#[doc = "Field `CAPWREN` writer - Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)"]
8pub type CapwrenW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Key (0x46)\n\nValue on reset: 0"]
10#[derive(Clone, Copy, Debug, PartialEq, Eq)]
11#[repr(u8)]
12pub enum Keyselect {
13    #[doc = "70: Key"]
14    Key = 70,
15}
16impl From<Keyselect> for u8 {
17    #[inline(always)]
18    fn from(variant: Keyselect) -> Self {
19        variant as _
20    }
21}
22impl crate::FieldSpec for Keyselect {
23    type Ux = u8;
24}
25impl crate::IsEnum for Keyselect {}
26#[doc = "Field `KEY` reader - Key (0x46)"]
27pub type KeyR = crate::FieldReader<Keyselect>;
28impl KeyR {
29    #[doc = "Get enumerated values variant"]
30    #[inline(always)]
31    pub const fn variant(&self) -> Option<Keyselect> {
32        match self.bits {
33            70 => Some(Keyselect::Key),
34            _ => None,
35        }
36    }
37    #[doc = "Key"]
38    #[inline(always)]
39    pub fn is_key(&self) -> bool {
40        *self == Keyselect::Key
41    }
42}
43#[doc = "Field `KEY` writer - Key (0x46)"]
44pub type KeyW<'a, REG> = crate::FieldWriter<'a, REG, 8, Keyselect>;
45impl<'a, REG> KeyW<'a, REG>
46where
47    REG: crate::Writable + crate::RegisterSpec,
48    REG::Ux: From<u8>,
49{
50    #[doc = "Key"]
51    #[inline(always)]
52    pub fn key(self) -> &'a mut crate::W<REG> {
53        self.variant(Keyselect::Key)
54    }
55}
56impl R {
57    #[doc = "Bit 0 - Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)"]
58    #[inline(always)]
59    pub fn capwren(&self) -> CapwrenR {
60        CapwrenR::new((self.bits & 1) != 0)
61    }
62    #[doc = "Bits 8:15 - Key (0x46)"]
63    #[inline(always)]
64    pub fn key(&self) -> KeyR {
65        KeyR::new(((self.bits >> 8) & 0xff) as u8)
66    }
67}
68impl W {
69    #[doc = "Bit 0 - Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)"]
70    #[inline(always)]
71    #[must_use]
72    pub fn capwren(&mut self) -> CapwrenW<CacrSpec> {
73        CapwrenW::new(self, 0)
74    }
75    #[doc = "Bits 8:15 - Key (0x46)"]
76    #[inline(always)]
77    #[must_use]
78    pub fn key(&mut self) -> KeyW<CacrSpec> {
79        KeyW::new(self, 8)
80    }
81}
82#[doc = "Capabilities Control\n\nYou can [`read`](crate::Reg::read) this register and get [`cacr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cacr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
83pub struct CacrSpec;
84impl crate::RegisterSpec for CacrSpec {
85    type Ux = u32;
86}
87#[doc = "`read()` method returns [`cacr::R`](R) reader structure"]
88impl crate::Readable for CacrSpec {}
89#[doc = "`write(|w| ..)` method takes [`cacr::W`](W) writer structure"]
90impl crate::Writable for CacrSpec {
91    type Safety = crate::Unsafe;
92    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
93    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
94}
95#[doc = "`reset()` method sets CACR to value 0"]
96impl crate::Resettable for CacrSpec {
97    const RESET_VALUE: u32 = 0;
98}
atsamd51p/sdhc0/cacr.rs

atsamd51p/sdhc0/
cacr.rs
