atsamd51p/rtc/mode1/
intenclr.rs
1#[doc = "Register `INTENCLR` reader"]
2pub type R = crate::R<IntenclrSpec>;
3#[doc = "Register `INTENCLR` writer"]
4pub type W = crate::W<IntenclrSpec>;
5#[doc = "Field `PER0` reader - Periodic Interval 0 Interrupt Enable"]
6pub type Per0R = crate::BitReader;
7#[doc = "Field `PER0` writer - Periodic Interval 0 Interrupt Enable"]
8pub type Per0W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PER1` reader - Periodic Interval 1 Interrupt Enable"]
10pub type Per1R = crate::BitReader;
11#[doc = "Field `PER1` writer - Periodic Interval 1 Interrupt Enable"]
12pub type Per1W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PER2` reader - Periodic Interval 2 Interrupt Enable"]
14pub type Per2R = crate::BitReader;
15#[doc = "Field `PER2` writer - Periodic Interval 2 Interrupt Enable"]
16pub type Per2W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `PER3` reader - Periodic Interval 3 Interrupt Enable"]
18pub type Per3R = crate::BitReader;
19#[doc = "Field `PER3` writer - Periodic Interval 3 Interrupt Enable"]
20pub type Per3W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PER4` reader - Periodic Interval 4 Interrupt Enable"]
22pub type Per4R = crate::BitReader;
23#[doc = "Field `PER4` writer - Periodic Interval 4 Interrupt Enable"]
24pub type Per4W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `PER5` reader - Periodic Interval 5 Interrupt Enable"]
26pub type Per5R = crate::BitReader;
27#[doc = "Field `PER5` writer - Periodic Interval 5 Interrupt Enable"]
28pub type Per5W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `PER6` reader - Periodic Interval 6 Interrupt Enable"]
30pub type Per6R = crate::BitReader;
31#[doc = "Field `PER6` writer - Periodic Interval 6 Interrupt Enable"]
32pub type Per6W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `PER7` reader - Periodic Interval 7 Interrupt Enable"]
34pub type Per7R = crate::BitReader;
35#[doc = "Field `PER7` writer - Periodic Interval 7 Interrupt Enable"]
36pub type Per7W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `CMP0` reader - Compare 0 Interrupt Enable"]
38pub type Cmp0R = crate::BitReader;
39#[doc = "Field `CMP0` writer - Compare 0 Interrupt Enable"]
40pub type Cmp0W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `CMP1` reader - Compare 1 Interrupt Enable"]
42pub type Cmp1R = crate::BitReader;
43#[doc = "Field `CMP1` writer - Compare 1 Interrupt Enable"]
44pub type Cmp1W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `CMP2` reader - Compare 2 Interrupt Enable"]
46pub type Cmp2R = crate::BitReader;
47#[doc = "Field `CMP2` writer - Compare 2 Interrupt Enable"]
48pub type Cmp2W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `CMP3` reader - Compare 3 Interrupt Enable"]
50pub type Cmp3R = crate::BitReader;
51#[doc = "Field `CMP3` writer - Compare 3 Interrupt Enable"]
52pub type Cmp3W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `TAMPER` reader - Tamper Enable"]
54pub type TamperR = crate::BitReader;
55#[doc = "Field `TAMPER` writer - Tamper Enable"]
56pub type TamperW<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `OVF` reader - Overflow Interrupt Enable"]
58pub type OvfR = crate::BitReader;
59#[doc = "Field `OVF` writer - Overflow Interrupt Enable"]
60pub type OvfW<'a, REG> = crate::BitWriter<'a, REG>;
61impl R {
62 #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"]
63 #[inline(always)]
64 pub fn per0(&self) -> Per0R {
65 Per0R::new((self.bits & 1) != 0)
66 }
67 #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"]
68 #[inline(always)]
69 pub fn per1(&self) -> Per1R {
70 Per1R::new(((self.bits >> 1) & 1) != 0)
71 }
72 #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"]
73 #[inline(always)]
74 pub fn per2(&self) -> Per2R {
75 Per2R::new(((self.bits >> 2) & 1) != 0)
76 }
77 #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"]
78 #[inline(always)]
79 pub fn per3(&self) -> Per3R {
80 Per3R::new(((self.bits >> 3) & 1) != 0)
81 }
82 #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"]
83 #[inline(always)]
84 pub fn per4(&self) -> Per4R {
85 Per4R::new(((self.bits >> 4) & 1) != 0)
86 }
87 #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"]
88 #[inline(always)]
89 pub fn per5(&self) -> Per5R {
90 Per5R::new(((self.bits >> 5) & 1) != 0)
91 }
92 #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"]
93 #[inline(always)]
94 pub fn per6(&self) -> Per6R {
95 Per6R::new(((self.bits >> 6) & 1) != 0)
96 }
97 #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"]
98 #[inline(always)]
99 pub fn per7(&self) -> Per7R {
100 Per7R::new(((self.bits >> 7) & 1) != 0)
101 }
102 #[doc = "Bit 8 - Compare 0 Interrupt Enable"]
103 #[inline(always)]
104 pub fn cmp0(&self) -> Cmp0R {
105 Cmp0R::new(((self.bits >> 8) & 1) != 0)
106 }
107 #[doc = "Bit 9 - Compare 1 Interrupt Enable"]
108 #[inline(always)]
109 pub fn cmp1(&self) -> Cmp1R {
110 Cmp1R::new(((self.bits >> 9) & 1) != 0)
111 }
112 #[doc = "Bit 10 - Compare 2 Interrupt Enable"]
113 #[inline(always)]
114 pub fn cmp2(&self) -> Cmp2R {
115 Cmp2R::new(((self.bits >> 10) & 1) != 0)
116 }
117 #[doc = "Bit 11 - Compare 3 Interrupt Enable"]
118 #[inline(always)]
119 pub fn cmp3(&self) -> Cmp3R {
120 Cmp3R::new(((self.bits >> 11) & 1) != 0)
121 }
122 #[doc = "Bit 14 - Tamper Enable"]
123 #[inline(always)]
124 pub fn tamper(&self) -> TamperR {
125 TamperR::new(((self.bits >> 14) & 1) != 0)
126 }
127 #[doc = "Bit 15 - Overflow Interrupt Enable"]
128 #[inline(always)]
129 pub fn ovf(&self) -> OvfR {
130 OvfR::new(((self.bits >> 15) & 1) != 0)
131 }
132}
133impl W {
134 #[doc = "Bit 0 - Periodic Interval 0 Interrupt Enable"]
135 #[inline(always)]
136 #[must_use]
137 pub fn per0(&mut self) -> Per0W<IntenclrSpec> {
138 Per0W::new(self, 0)
139 }
140 #[doc = "Bit 1 - Periodic Interval 1 Interrupt Enable"]
141 #[inline(always)]
142 #[must_use]
143 pub fn per1(&mut self) -> Per1W<IntenclrSpec> {
144 Per1W::new(self, 1)
145 }
146 #[doc = "Bit 2 - Periodic Interval 2 Interrupt Enable"]
147 #[inline(always)]
148 #[must_use]
149 pub fn per2(&mut self) -> Per2W<IntenclrSpec> {
150 Per2W::new(self, 2)
151 }
152 #[doc = "Bit 3 - Periodic Interval 3 Interrupt Enable"]
153 #[inline(always)]
154 #[must_use]
155 pub fn per3(&mut self) -> Per3W<IntenclrSpec> {
156 Per3W::new(self, 3)
157 }
158 #[doc = "Bit 4 - Periodic Interval 4 Interrupt Enable"]
159 #[inline(always)]
160 #[must_use]
161 pub fn per4(&mut self) -> Per4W<IntenclrSpec> {
162 Per4W::new(self, 4)
163 }
164 #[doc = "Bit 5 - Periodic Interval 5 Interrupt Enable"]
165 #[inline(always)]
166 #[must_use]
167 pub fn per5(&mut self) -> Per5W<IntenclrSpec> {
168 Per5W::new(self, 5)
169 }
170 #[doc = "Bit 6 - Periodic Interval 6 Interrupt Enable"]
171 #[inline(always)]
172 #[must_use]
173 pub fn per6(&mut self) -> Per6W<IntenclrSpec> {
174 Per6W::new(self, 6)
175 }
176 #[doc = "Bit 7 - Periodic Interval 7 Interrupt Enable"]
177 #[inline(always)]
178 #[must_use]
179 pub fn per7(&mut self) -> Per7W<IntenclrSpec> {
180 Per7W::new(self, 7)
181 }
182 #[doc = "Bit 8 - Compare 0 Interrupt Enable"]
183 #[inline(always)]
184 #[must_use]
185 pub fn cmp0(&mut self) -> Cmp0W<IntenclrSpec> {
186 Cmp0W::new(self, 8)
187 }
188 #[doc = "Bit 9 - Compare 1 Interrupt Enable"]
189 #[inline(always)]
190 #[must_use]
191 pub fn cmp1(&mut self) -> Cmp1W<IntenclrSpec> {
192 Cmp1W::new(self, 9)
193 }
194 #[doc = "Bit 10 - Compare 2 Interrupt Enable"]
195 #[inline(always)]
196 #[must_use]
197 pub fn cmp2(&mut self) -> Cmp2W<IntenclrSpec> {
198 Cmp2W::new(self, 10)
199 }
200 #[doc = "Bit 11 - Compare 3 Interrupt Enable"]
201 #[inline(always)]
202 #[must_use]
203 pub fn cmp3(&mut self) -> Cmp3W<IntenclrSpec> {
204 Cmp3W::new(self, 11)
205 }
206 #[doc = "Bit 14 - Tamper Enable"]
207 #[inline(always)]
208 #[must_use]
209 pub fn tamper(&mut self) -> TamperW<IntenclrSpec> {
210 TamperW::new(self, 14)
211 }
212 #[doc = "Bit 15 - Overflow Interrupt Enable"]
213 #[inline(always)]
214 #[must_use]
215 pub fn ovf(&mut self) -> OvfW<IntenclrSpec> {
216 OvfW::new(self, 15)
217 }
218}
219#[doc = "MODE1 Interrupt Enable Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intenclr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenclr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
220pub struct IntenclrSpec;
221impl crate::RegisterSpec for IntenclrSpec {
222 type Ux = u16;
223}
224#[doc = "`read()` method returns [`intenclr::R`](R) reader structure"]
225impl crate::Readable for IntenclrSpec {}
226#[doc = "`write(|w| ..)` method takes [`intenclr::W`](W) writer structure"]
227impl crate::Writable for IntenclrSpec {
228 type Safety = crate::Unsafe;
229 const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
230 const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
231}
232#[doc = "`reset()` method sets INTENCLR to value 0"]
233impl crate::Resettable for IntenclrSpec {
234 const RESET_VALUE: u16 = 0;
235}