atsamd11c/tcc0/
wave.rs

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1#[doc = "Register `WAVE` reader"]
2pub type R = crate::R<WaveSpec>;
3#[doc = "Register `WAVE` writer"]
4pub type W = crate::W<WaveSpec>;
5#[doc = "Waveform Generation\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Wavegenselect {
9    #[doc = "0: Normal frequency"]
10    Nfrq = 0,
11    #[doc = "1: Match frequency"]
12    Mfrq = 1,
13    #[doc = "2: Normal PWM"]
14    Npwm = 2,
15    #[doc = "4: Dual-slope critical"]
16    Dscritical = 4,
17    #[doc = "5: Dual-slope with interrupt/event condition when COUNT reaches ZERO"]
18    Dsbottom = 5,
19    #[doc = "6: Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP"]
20    Dsboth = 6,
21    #[doc = "7: Dual-slope with interrupt/event condition when COUNT reaches TOP"]
22    Dstop = 7,
23}
24impl From<Wavegenselect> for u8 {
25    #[inline(always)]
26    fn from(variant: Wavegenselect) -> Self {
27        variant as _
28    }
29}
30impl crate::FieldSpec for Wavegenselect {
31    type Ux = u8;
32}
33impl crate::IsEnum for Wavegenselect {}
34#[doc = "Field `WAVEGEN` reader - Waveform Generation"]
35pub type WavegenR = crate::FieldReader<Wavegenselect>;
36impl WavegenR {
37    #[doc = "Get enumerated values variant"]
38    #[inline(always)]
39    pub const fn variant(&self) -> Option<Wavegenselect> {
40        match self.bits {
41            0 => Some(Wavegenselect::Nfrq),
42            1 => Some(Wavegenselect::Mfrq),
43            2 => Some(Wavegenselect::Npwm),
44            4 => Some(Wavegenselect::Dscritical),
45            5 => Some(Wavegenselect::Dsbottom),
46            6 => Some(Wavegenselect::Dsboth),
47            7 => Some(Wavegenselect::Dstop),
48            _ => None,
49        }
50    }
51    #[doc = "Normal frequency"]
52    #[inline(always)]
53    pub fn is_nfrq(&self) -> bool {
54        *self == Wavegenselect::Nfrq
55    }
56    #[doc = "Match frequency"]
57    #[inline(always)]
58    pub fn is_mfrq(&self) -> bool {
59        *self == Wavegenselect::Mfrq
60    }
61    #[doc = "Normal PWM"]
62    #[inline(always)]
63    pub fn is_npwm(&self) -> bool {
64        *self == Wavegenselect::Npwm
65    }
66    #[doc = "Dual-slope critical"]
67    #[inline(always)]
68    pub fn is_dscritical(&self) -> bool {
69        *self == Wavegenselect::Dscritical
70    }
71    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches ZERO"]
72    #[inline(always)]
73    pub fn is_dsbottom(&self) -> bool {
74        *self == Wavegenselect::Dsbottom
75    }
76    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP"]
77    #[inline(always)]
78    pub fn is_dsboth(&self) -> bool {
79        *self == Wavegenselect::Dsboth
80    }
81    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches TOP"]
82    #[inline(always)]
83    pub fn is_dstop(&self) -> bool {
84        *self == Wavegenselect::Dstop
85    }
86}
87#[doc = "Field `WAVEGEN` writer - Waveform Generation"]
88pub type WavegenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Wavegenselect>;
89impl<'a, REG> WavegenW<'a, REG>
90where
91    REG: crate::Writable + crate::RegisterSpec,
92    REG::Ux: From<u8>,
93{
94    #[doc = "Normal frequency"]
95    #[inline(always)]
96    pub fn nfrq(self) -> &'a mut crate::W<REG> {
97        self.variant(Wavegenselect::Nfrq)
98    }
99    #[doc = "Match frequency"]
100    #[inline(always)]
101    pub fn mfrq(self) -> &'a mut crate::W<REG> {
102        self.variant(Wavegenselect::Mfrq)
103    }
104    #[doc = "Normal PWM"]
105    #[inline(always)]
106    pub fn npwm(self) -> &'a mut crate::W<REG> {
107        self.variant(Wavegenselect::Npwm)
108    }
109    #[doc = "Dual-slope critical"]
110    #[inline(always)]
111    pub fn dscritical(self) -> &'a mut crate::W<REG> {
112        self.variant(Wavegenselect::Dscritical)
113    }
114    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches ZERO"]
115    #[inline(always)]
116    pub fn dsbottom(self) -> &'a mut crate::W<REG> {
117        self.variant(Wavegenselect::Dsbottom)
118    }
119    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches ZERO or TOP"]
120    #[inline(always)]
121    pub fn dsboth(self) -> &'a mut crate::W<REG> {
122        self.variant(Wavegenselect::Dsboth)
123    }
124    #[doc = "Dual-slope with interrupt/event condition when COUNT reaches TOP"]
125    #[inline(always)]
126    pub fn dstop(self) -> &'a mut crate::W<REG> {
127        self.variant(Wavegenselect::Dstop)
128    }
129}
130#[doc = "Ramp Mode\n\nValue on reset: 0"]
131#[derive(Clone, Copy, Debug, PartialEq, Eq)]
132#[repr(u8)]
133pub enum Rampselect {
134    #[doc = "0: RAMP1 operation"]
135    Ramp1 = 0,
136    #[doc = "1: Alternative RAMP2 operation"]
137    Ramp2a = 1,
138    #[doc = "2: RAMP2 operation"]
139    Ramp2 = 2,
140    #[doc = "3: Critical RAMP2 operation"]
141    Ramp2c = 3,
142}
143impl From<Rampselect> for u8 {
144    #[inline(always)]
145    fn from(variant: Rampselect) -> Self {
146        variant as _
147    }
148}
149impl crate::FieldSpec for Rampselect {
150    type Ux = u8;
151}
152impl crate::IsEnum for Rampselect {}
153#[doc = "Field `RAMP` reader - Ramp Mode"]
154pub type RampR = crate::FieldReader<Rampselect>;
155impl RampR {
156    #[doc = "Get enumerated values variant"]
157    #[inline(always)]
158    pub const fn variant(&self) -> Rampselect {
159        match self.bits {
160            0 => Rampselect::Ramp1,
161            1 => Rampselect::Ramp2a,
162            2 => Rampselect::Ramp2,
163            3 => Rampselect::Ramp2c,
164            _ => unreachable!(),
165        }
166    }
167    #[doc = "RAMP1 operation"]
168    #[inline(always)]
169    pub fn is_ramp1(&self) -> bool {
170        *self == Rampselect::Ramp1
171    }
172    #[doc = "Alternative RAMP2 operation"]
173    #[inline(always)]
174    pub fn is_ramp2a(&self) -> bool {
175        *self == Rampselect::Ramp2a
176    }
177    #[doc = "RAMP2 operation"]
178    #[inline(always)]
179    pub fn is_ramp2(&self) -> bool {
180        *self == Rampselect::Ramp2
181    }
182    #[doc = "Critical RAMP2 operation"]
183    #[inline(always)]
184    pub fn is_ramp2c(&self) -> bool {
185        *self == Rampselect::Ramp2c
186    }
187}
188#[doc = "Field `RAMP` writer - Ramp Mode"]
189pub type RampW<'a, REG> = crate::FieldWriter<'a, REG, 2, Rampselect, crate::Safe>;
190impl<'a, REG> RampW<'a, REG>
191where
192    REG: crate::Writable + crate::RegisterSpec,
193    REG::Ux: From<u8>,
194{
195    #[doc = "RAMP1 operation"]
196    #[inline(always)]
197    pub fn ramp1(self) -> &'a mut crate::W<REG> {
198        self.variant(Rampselect::Ramp1)
199    }
200    #[doc = "Alternative RAMP2 operation"]
201    #[inline(always)]
202    pub fn ramp2a(self) -> &'a mut crate::W<REG> {
203        self.variant(Rampselect::Ramp2a)
204    }
205    #[doc = "RAMP2 operation"]
206    #[inline(always)]
207    pub fn ramp2(self) -> &'a mut crate::W<REG> {
208        self.variant(Rampselect::Ramp2)
209    }
210    #[doc = "Critical RAMP2 operation"]
211    #[inline(always)]
212    pub fn ramp2c(self) -> &'a mut crate::W<REG> {
213        self.variant(Rampselect::Ramp2c)
214    }
215}
216#[doc = "Field `CIPEREN` reader - Circular period Enable"]
217pub type CiperenR = crate::BitReader;
218#[doc = "Field `CIPEREN` writer - Circular period Enable"]
219pub type CiperenW<'a, REG> = crate::BitWriter<'a, REG>;
220#[doc = "Field `CICCEN0` reader - Circular Channel 0 Enable"]
221pub type Ciccen0R = crate::BitReader;
222#[doc = "Field `CICCEN0` writer - Circular Channel 0 Enable"]
223pub type Ciccen0W<'a, REG> = crate::BitWriter<'a, REG>;
224#[doc = "Field `CICCEN1` reader - Circular Channel 1 Enable"]
225pub type Ciccen1R = crate::BitReader;
226#[doc = "Field `CICCEN1` writer - Circular Channel 1 Enable"]
227pub type Ciccen1W<'a, REG> = crate::BitWriter<'a, REG>;
228#[doc = "Field `CICCEN2` reader - Circular Channel 2 Enable"]
229pub type Ciccen2R = crate::BitReader;
230#[doc = "Field `CICCEN2` writer - Circular Channel 2 Enable"]
231pub type Ciccen2W<'a, REG> = crate::BitWriter<'a, REG>;
232#[doc = "Field `CICCEN3` reader - Circular Channel 3 Enable"]
233pub type Ciccen3R = crate::BitReader;
234#[doc = "Field `CICCEN3` writer - Circular Channel 3 Enable"]
235pub type Ciccen3W<'a, REG> = crate::BitWriter<'a, REG>;
236#[doc = "Field `POL0` reader - Channel 0 Polarity"]
237pub type Pol0R = crate::BitReader;
238#[doc = "Field `POL0` writer - Channel 0 Polarity"]
239pub type Pol0W<'a, REG> = crate::BitWriter<'a, REG>;
240#[doc = "Field `POL1` reader - Channel 1 Polarity"]
241pub type Pol1R = crate::BitReader;
242#[doc = "Field `POL1` writer - Channel 1 Polarity"]
243pub type Pol1W<'a, REG> = crate::BitWriter<'a, REG>;
244#[doc = "Field `POL2` reader - Channel 2 Polarity"]
245pub type Pol2R = crate::BitReader;
246#[doc = "Field `POL2` writer - Channel 2 Polarity"]
247pub type Pol2W<'a, REG> = crate::BitWriter<'a, REG>;
248#[doc = "Field `POL3` reader - Channel 3 Polarity"]
249pub type Pol3R = crate::BitReader;
250#[doc = "Field `POL3` writer - Channel 3 Polarity"]
251pub type Pol3W<'a, REG> = crate::BitWriter<'a, REG>;
252#[doc = "Field `SWAP0` reader - Swap DTI Output Pair 0"]
253pub type Swap0R = crate::BitReader;
254#[doc = "Field `SWAP0` writer - Swap DTI Output Pair 0"]
255pub type Swap0W<'a, REG> = crate::BitWriter<'a, REG>;
256#[doc = "Field `SWAP1` reader - Swap DTI Output Pair 1"]
257pub type Swap1R = crate::BitReader;
258#[doc = "Field `SWAP1` writer - Swap DTI Output Pair 1"]
259pub type Swap1W<'a, REG> = crate::BitWriter<'a, REG>;
260#[doc = "Field `SWAP2` reader - Swap DTI Output Pair 2"]
261pub type Swap2R = crate::BitReader;
262#[doc = "Field `SWAP2` writer - Swap DTI Output Pair 2"]
263pub type Swap2W<'a, REG> = crate::BitWriter<'a, REG>;
264#[doc = "Field `SWAP3` reader - Swap DTI Output Pair 3"]
265pub type Swap3R = crate::BitReader;
266#[doc = "Field `SWAP3` writer - Swap DTI Output Pair 3"]
267pub type Swap3W<'a, REG> = crate::BitWriter<'a, REG>;
268impl R {
269    #[doc = "Bits 0:2 - Waveform Generation"]
270    #[inline(always)]
271    pub fn wavegen(&self) -> WavegenR {
272        WavegenR::new((self.bits & 7) as u8)
273    }
274    #[doc = "Bits 4:5 - Ramp Mode"]
275    #[inline(always)]
276    pub fn ramp(&self) -> RampR {
277        RampR::new(((self.bits >> 4) & 3) as u8)
278    }
279    #[doc = "Bit 7 - Circular period Enable"]
280    #[inline(always)]
281    pub fn ciperen(&self) -> CiperenR {
282        CiperenR::new(((self.bits >> 7) & 1) != 0)
283    }
284    #[doc = "Bit 8 - Circular Channel 0 Enable"]
285    #[inline(always)]
286    pub fn ciccen0(&self) -> Ciccen0R {
287        Ciccen0R::new(((self.bits >> 8) & 1) != 0)
288    }
289    #[doc = "Bit 9 - Circular Channel 1 Enable"]
290    #[inline(always)]
291    pub fn ciccen1(&self) -> Ciccen1R {
292        Ciccen1R::new(((self.bits >> 9) & 1) != 0)
293    }
294    #[doc = "Bit 10 - Circular Channel 2 Enable"]
295    #[inline(always)]
296    pub fn ciccen2(&self) -> Ciccen2R {
297        Ciccen2R::new(((self.bits >> 10) & 1) != 0)
298    }
299    #[doc = "Bit 11 - Circular Channel 3 Enable"]
300    #[inline(always)]
301    pub fn ciccen3(&self) -> Ciccen3R {
302        Ciccen3R::new(((self.bits >> 11) & 1) != 0)
303    }
304    #[doc = "Bit 16 - Channel 0 Polarity"]
305    #[inline(always)]
306    pub fn pol0(&self) -> Pol0R {
307        Pol0R::new(((self.bits >> 16) & 1) != 0)
308    }
309    #[doc = "Bit 17 - Channel 1 Polarity"]
310    #[inline(always)]
311    pub fn pol1(&self) -> Pol1R {
312        Pol1R::new(((self.bits >> 17) & 1) != 0)
313    }
314    #[doc = "Bit 18 - Channel 2 Polarity"]
315    #[inline(always)]
316    pub fn pol2(&self) -> Pol2R {
317        Pol2R::new(((self.bits >> 18) & 1) != 0)
318    }
319    #[doc = "Bit 19 - Channel 3 Polarity"]
320    #[inline(always)]
321    pub fn pol3(&self) -> Pol3R {
322        Pol3R::new(((self.bits >> 19) & 1) != 0)
323    }
324    #[doc = "Bit 24 - Swap DTI Output Pair 0"]
325    #[inline(always)]
326    pub fn swap0(&self) -> Swap0R {
327        Swap0R::new(((self.bits >> 24) & 1) != 0)
328    }
329    #[doc = "Bit 25 - Swap DTI Output Pair 1"]
330    #[inline(always)]
331    pub fn swap1(&self) -> Swap1R {
332        Swap1R::new(((self.bits >> 25) & 1) != 0)
333    }
334    #[doc = "Bit 26 - Swap DTI Output Pair 2"]
335    #[inline(always)]
336    pub fn swap2(&self) -> Swap2R {
337        Swap2R::new(((self.bits >> 26) & 1) != 0)
338    }
339    #[doc = "Bit 27 - Swap DTI Output Pair 3"]
340    #[inline(always)]
341    pub fn swap3(&self) -> Swap3R {
342        Swap3R::new(((self.bits >> 27) & 1) != 0)
343    }
344}
345impl W {
346    #[doc = "Bits 0:2 - Waveform Generation"]
347    #[inline(always)]
348    #[must_use]
349    pub fn wavegen(&mut self) -> WavegenW<WaveSpec> {
350        WavegenW::new(self, 0)
351    }
352    #[doc = "Bits 4:5 - Ramp Mode"]
353    #[inline(always)]
354    #[must_use]
355    pub fn ramp(&mut self) -> RampW<WaveSpec> {
356        RampW::new(self, 4)
357    }
358    #[doc = "Bit 7 - Circular period Enable"]
359    #[inline(always)]
360    #[must_use]
361    pub fn ciperen(&mut self) -> CiperenW<WaveSpec> {
362        CiperenW::new(self, 7)
363    }
364    #[doc = "Bit 8 - Circular Channel 0 Enable"]
365    #[inline(always)]
366    #[must_use]
367    pub fn ciccen0(&mut self) -> Ciccen0W<WaveSpec> {
368        Ciccen0W::new(self, 8)
369    }
370    #[doc = "Bit 9 - Circular Channel 1 Enable"]
371    #[inline(always)]
372    #[must_use]
373    pub fn ciccen1(&mut self) -> Ciccen1W<WaveSpec> {
374        Ciccen1W::new(self, 9)
375    }
376    #[doc = "Bit 10 - Circular Channel 2 Enable"]
377    #[inline(always)]
378    #[must_use]
379    pub fn ciccen2(&mut self) -> Ciccen2W<WaveSpec> {
380        Ciccen2W::new(self, 10)
381    }
382    #[doc = "Bit 11 - Circular Channel 3 Enable"]
383    #[inline(always)]
384    #[must_use]
385    pub fn ciccen3(&mut self) -> Ciccen3W<WaveSpec> {
386        Ciccen3W::new(self, 11)
387    }
388    #[doc = "Bit 16 - Channel 0 Polarity"]
389    #[inline(always)]
390    #[must_use]
391    pub fn pol0(&mut self) -> Pol0W<WaveSpec> {
392        Pol0W::new(self, 16)
393    }
394    #[doc = "Bit 17 - Channel 1 Polarity"]
395    #[inline(always)]
396    #[must_use]
397    pub fn pol1(&mut self) -> Pol1W<WaveSpec> {
398        Pol1W::new(self, 17)
399    }
400    #[doc = "Bit 18 - Channel 2 Polarity"]
401    #[inline(always)]
402    #[must_use]
403    pub fn pol2(&mut self) -> Pol2W<WaveSpec> {
404        Pol2W::new(self, 18)
405    }
406    #[doc = "Bit 19 - Channel 3 Polarity"]
407    #[inline(always)]
408    #[must_use]
409    pub fn pol3(&mut self) -> Pol3W<WaveSpec> {
410        Pol3W::new(self, 19)
411    }
412    #[doc = "Bit 24 - Swap DTI Output Pair 0"]
413    #[inline(always)]
414    #[must_use]
415    pub fn swap0(&mut self) -> Swap0W<WaveSpec> {
416        Swap0W::new(self, 24)
417    }
418    #[doc = "Bit 25 - Swap DTI Output Pair 1"]
419    #[inline(always)]
420    #[must_use]
421    pub fn swap1(&mut self) -> Swap1W<WaveSpec> {
422        Swap1W::new(self, 25)
423    }
424    #[doc = "Bit 26 - Swap DTI Output Pair 2"]
425    #[inline(always)]
426    #[must_use]
427    pub fn swap2(&mut self) -> Swap2W<WaveSpec> {
428        Swap2W::new(self, 26)
429    }
430    #[doc = "Bit 27 - Swap DTI Output Pair 3"]
431    #[inline(always)]
432    #[must_use]
433    pub fn swap3(&mut self) -> Swap3W<WaveSpec> {
434        Swap3W::new(self, 27)
435    }
436}
437#[doc = "Waveform Control\n\nYou can [`read`](crate::Reg::read) this register and get [`wave::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wave::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
438pub struct WaveSpec;
439impl crate::RegisterSpec for WaveSpec {
440    type Ux = u32;
441}
442#[doc = "`read()` method returns [`wave::R`](R) reader structure"]
443impl crate::Readable for WaveSpec {}
444#[doc = "`write(|w| ..)` method takes [`wave::W`](W) writer structure"]
445impl crate::Writable for WaveSpec {
446    type Safety = crate::Unsafe;
447    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
448    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
449}
450#[doc = "`reset()` method sets WAVE to value 0"]
451impl crate::Resettable for WaveSpec {
452    const RESET_VALUE: u32 = 0;
453}
atsamd11c/tcc0/wave.rs

atsamd11c/tcc0/
wave.rs
