atsamd11c/eic/
intenclr.rs

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1#[doc = "Register `INTENCLR` reader"]
2pub type R = crate::R<IntenclrSpec>;
3#[doc = "Register `INTENCLR` writer"]
4pub type W = crate::W<IntenclrSpec>;
5#[doc = "Field `EXTINT0` reader - External Interrupt 0 Enable"]
6pub type Extint0R = crate::BitReader;
7#[doc = "Field `EXTINT0` writer - External Interrupt 0 Enable"]
8pub type Extint0W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `EXTINT1` reader - External Interrupt 1 Enable"]
10pub type Extint1R = crate::BitReader;
11#[doc = "Field `EXTINT1` writer - External Interrupt 1 Enable"]
12pub type Extint1W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `EXTINT2` reader - External Interrupt 2 Enable"]
14pub type Extint2R = crate::BitReader;
15#[doc = "Field `EXTINT2` writer - External Interrupt 2 Enable"]
16pub type Extint2W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `EXTINT3` reader - External Interrupt 3 Enable"]
18pub type Extint3R = crate::BitReader;
19#[doc = "Field `EXTINT3` writer - External Interrupt 3 Enable"]
20pub type Extint3W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `EXTINT4` reader - External Interrupt 4 Enable"]
22pub type Extint4R = crate::BitReader;
23#[doc = "Field `EXTINT4` writer - External Interrupt 4 Enable"]
24pub type Extint4W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `EXTINT5` reader - External Interrupt 5 Enable"]
26pub type Extint5R = crate::BitReader;
27#[doc = "Field `EXTINT5` writer - External Interrupt 5 Enable"]
28pub type Extint5W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `EXTINT6` reader - External Interrupt 6 Enable"]
30pub type Extint6R = crate::BitReader;
31#[doc = "Field `EXTINT6` writer - External Interrupt 6 Enable"]
32pub type Extint6W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `EXTINT7` reader - External Interrupt 7 Enable"]
34pub type Extint7R = crate::BitReader;
35#[doc = "Field `EXTINT7` writer - External Interrupt 7 Enable"]
36pub type Extint7W<'a, REG> = crate::BitWriter<'a, REG>;
37impl R {
38    #[doc = "Bit 0 - External Interrupt 0 Enable"]
39    #[inline(always)]
40    pub fn extint0(&self) -> Extint0R {
41        Extint0R::new((self.bits & 1) != 0)
42    }
43    #[doc = "Bit 1 - External Interrupt 1 Enable"]
44    #[inline(always)]
45    pub fn extint1(&self) -> Extint1R {
46        Extint1R::new(((self.bits >> 1) & 1) != 0)
47    }
48    #[doc = "Bit 2 - External Interrupt 2 Enable"]
49    #[inline(always)]
50    pub fn extint2(&self) -> Extint2R {
51        Extint2R::new(((self.bits >> 2) & 1) != 0)
52    }
53    #[doc = "Bit 3 - External Interrupt 3 Enable"]
54    #[inline(always)]
55    pub fn extint3(&self) -> Extint3R {
56        Extint3R::new(((self.bits >> 3) & 1) != 0)
57    }
58    #[doc = "Bit 4 - External Interrupt 4 Enable"]
59    #[inline(always)]
60    pub fn extint4(&self) -> Extint4R {
61        Extint4R::new(((self.bits >> 4) & 1) != 0)
62    }
63    #[doc = "Bit 5 - External Interrupt 5 Enable"]
64    #[inline(always)]
65    pub fn extint5(&self) -> Extint5R {
66        Extint5R::new(((self.bits >> 5) & 1) != 0)
67    }
68    #[doc = "Bit 6 - External Interrupt 6 Enable"]
69    #[inline(always)]
70    pub fn extint6(&self) -> Extint6R {
71        Extint6R::new(((self.bits >> 6) & 1) != 0)
72    }
73    #[doc = "Bit 7 - External Interrupt 7 Enable"]
74    #[inline(always)]
75    pub fn extint7(&self) -> Extint7R {
76        Extint7R::new(((self.bits >> 7) & 1) != 0)
77    }
78}
79impl W {
80    #[doc = "Bit 0 - External Interrupt 0 Enable"]
81    #[inline(always)]
82    #[must_use]
83    pub fn extint0(&mut self) -> Extint0W<IntenclrSpec> {
84        Extint0W::new(self, 0)
85    }
86    #[doc = "Bit 1 - External Interrupt 1 Enable"]
87    #[inline(always)]
88    #[must_use]
89    pub fn extint1(&mut self) -> Extint1W<IntenclrSpec> {
90        Extint1W::new(self, 1)
91    }
92    #[doc = "Bit 2 - External Interrupt 2 Enable"]
93    #[inline(always)]
94    #[must_use]
95    pub fn extint2(&mut self) -> Extint2W<IntenclrSpec> {
96        Extint2W::new(self, 2)
97    }
98    #[doc = "Bit 3 - External Interrupt 3 Enable"]
99    #[inline(always)]
100    #[must_use]
101    pub fn extint3(&mut self) -> Extint3W<IntenclrSpec> {
102        Extint3W::new(self, 3)
103    }
104    #[doc = "Bit 4 - External Interrupt 4 Enable"]
105    #[inline(always)]
106    #[must_use]
107    pub fn extint4(&mut self) -> Extint4W<IntenclrSpec> {
108        Extint4W::new(self, 4)
109    }
110    #[doc = "Bit 5 - External Interrupt 5 Enable"]
111    #[inline(always)]
112    #[must_use]
113    pub fn extint5(&mut self) -> Extint5W<IntenclrSpec> {
114        Extint5W::new(self, 5)
115    }
116    #[doc = "Bit 6 - External Interrupt 6 Enable"]
117    #[inline(always)]
118    #[must_use]
119    pub fn extint6(&mut self) -> Extint6W<IntenclrSpec> {
120        Extint6W::new(self, 6)
121    }
122    #[doc = "Bit 7 - External Interrupt 7 Enable"]
123    #[inline(always)]
124    #[must_use]
125    pub fn extint7(&mut self) -> Extint7W<IntenclrSpec> {
126        Extint7W::new(self, 7)
127    }
128}
129#[doc = "Interrupt Enable Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intenclr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenclr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
130pub struct IntenclrSpec;
131impl crate::RegisterSpec for IntenclrSpec {
132    type Ux = u32;
133}
134#[doc = "`read()` method returns [`intenclr::R`](R) reader structure"]
135impl crate::Readable for IntenclrSpec {}
136#[doc = "`write(|w| ..)` method takes [`intenclr::W`](W) writer structure"]
137impl crate::Writable for IntenclrSpec {
138    type Safety = crate::Unsafe;
139    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
140    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
141}
142#[doc = "`reset()` method sets INTENCLR to value 0"]
143impl crate::Resettable for IntenclrSpec {
144    const RESET_VALUE: u32 = 0;
145}
atsamd11c/eic/intenclr.rs

atsamd11c/eic/
intenclr.rs
