1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 ctrl: Ctrl,
5 crcctrl: Crcctrl,
6 crcdatain: Crcdatain,
7 crcchksum: Crcchksum,
8 crcstatus: Crcstatus,
9 dbgctrl: Dbgctrl,
10 qosctrl: Qosctrl,
11 _reserved7: [u8; 0x01],
12 swtrigctrl: Swtrigctrl,
13 prictrl0: Prictrl0,
14 _reserved9: [u8; 0x08],
15 intpend: Intpend,
16 _reserved10: [u8; 0x02],
17 intstatus: Intstatus,
18 busych: Busych,
19 pendch: Pendch,
20 active: Active,
21 baseaddr: Baseaddr,
22 wrbaddr: Wrbaddr,
23 _reserved16: [u8; 0x03],
24 chid: Chid,
25 chctrla: Chctrla,
26 _reserved18: [u8; 0x03],
27 chctrlb: Chctrlb,
28 _reserved19: [u8; 0x04],
29 chintenclr: Chintenclr,
30 chintenset: Chintenset,
31 chintflag: Chintflag,
32 chstatus: Chstatus,
33}
34impl RegisterBlock {
35#[doc = "0x00 - Control"]
36 #[inline(always)]
37pub const fn ctrl(&self) -> &Ctrl {
38&self.ctrl
39 }
40#[doc = "0x02 - CRC Control"]
41 #[inline(always)]
42pub const fn crcctrl(&self) -> &Crcctrl {
43&self.crcctrl
44 }
45#[doc = "0x04 - CRC Data Input"]
46 #[inline(always)]
47pub const fn crcdatain(&self) -> &Crcdatain {
48&self.crcdatain
49 }
50#[doc = "0x08 - CRC Checksum"]
51 #[inline(always)]
52pub const fn crcchksum(&self) -> &Crcchksum {
53&self.crcchksum
54 }
55#[doc = "0x0c - CRC Status"]
56 #[inline(always)]
57pub const fn crcstatus(&self) -> &Crcstatus {
58&self.crcstatus
59 }
60#[doc = "0x0d - Debug Control"]
61 #[inline(always)]
62pub const fn dbgctrl(&self) -> &Dbgctrl {
63&self.dbgctrl
64 }
65#[doc = "0x0e - QOS Control"]
66 #[inline(always)]
67pub const fn qosctrl(&self) -> &Qosctrl {
68&self.qosctrl
69 }
70#[doc = "0x10 - Software Trigger Control"]
71 #[inline(always)]
72pub const fn swtrigctrl(&self) -> &Swtrigctrl {
73&self.swtrigctrl
74 }
75#[doc = "0x14 - Priority Control 0"]
76 #[inline(always)]
77pub const fn prictrl0(&self) -> &Prictrl0 {
78&self.prictrl0
79 }
80#[doc = "0x20 - Interrupt Pending"]
81 #[inline(always)]
82pub const fn intpend(&self) -> &Intpend {
83&self.intpend
84 }
85#[doc = "0x24 - Interrupt Status"]
86 #[inline(always)]
87pub const fn intstatus(&self) -> &Intstatus {
88&self.intstatus
89 }
90#[doc = "0x28 - Busy Channels"]
91 #[inline(always)]
92pub const fn busych(&self) -> &Busych {
93&self.busych
94 }
95#[doc = "0x2c - Pending Channels"]
96 #[inline(always)]
97pub const fn pendch(&self) -> &Pendch {
98&self.pendch
99 }
100#[doc = "0x30 - Active Channel and Levels"]
101 #[inline(always)]
102pub const fn active(&self) -> &Active {
103&self.active
104 }
105#[doc = "0x34 - Descriptor Memory Section Base Address"]
106 #[inline(always)]
107pub const fn baseaddr(&self) -> &Baseaddr {
108&self.baseaddr
109 }
110#[doc = "0x38 - Write-Back Memory Section Base Address"]
111 #[inline(always)]
112pub const fn wrbaddr(&self) -> &Wrbaddr {
113&self.wrbaddr
114 }
115#[doc = "0x3f - Channel ID"]
116 #[inline(always)]
117pub const fn chid(&self) -> &Chid {
118&self.chid
119 }
120#[doc = "0x40 - Channel Control A"]
121 #[inline(always)]
122pub const fn chctrla(&self) -> &Chctrla {
123&self.chctrla
124 }
125#[doc = "0x44 - Channel Control B"]
126 #[inline(always)]
127pub const fn chctrlb(&self) -> &Chctrlb {
128&self.chctrlb
129 }
130#[doc = "0x4c - Channel Interrupt Enable Clear"]
131 #[inline(always)]
132pub const fn chintenclr(&self) -> &Chintenclr {
133&self.chintenclr
134 }
135#[doc = "0x4d - Channel Interrupt Enable Set"]
136 #[inline(always)]
137pub const fn chintenset(&self) -> &Chintenset {
138&self.chintenset
139 }
140#[doc = "0x4e - Channel Interrupt Flag Status and Clear"]
141 #[inline(always)]
142pub const fn chintflag(&self) -> &Chintflag {
143&self.chintflag
144 }
145#[doc = "0x4f - Channel Status"]
146 #[inline(always)]
147pub const fn chstatus(&self) -> &Chstatus {
148&self.chstatus
149 }
150}
151#[doc = "CTRL (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
152module"]
153#[doc(alias = "CTRL")]
154pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
155#[doc = "Control"]
156pub mod ctrl;
157#[doc = "CRCCTRL (rw) register accessor: CRC Control\n\nYou can [`read`](crate::Reg::read) this register and get [`crcctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crcctrl`]
158module"]
159#[doc(alias = "CRCCTRL")]
160pub type Crcctrl = crate::Reg<crcctrl::CrcctrlSpec>;
161#[doc = "CRC Control"]
162pub mod crcctrl;
163#[doc = "CRCDATAIN (rw) register accessor: CRC Data Input\n\nYou can [`read`](crate::Reg::read) this register and get [`crcdatain::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcdatain::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crcdatain`]
164module"]
165#[doc(alias = "CRCDATAIN")]
166pub type Crcdatain = crate::Reg<crcdatain::CrcdatainSpec>;
167#[doc = "CRC Data Input"]
168pub mod crcdatain;
169#[doc = "CRCCHKSUM (rw) register accessor: CRC Checksum\n\nYou can [`read`](crate::Reg::read) this register and get [`crcchksum::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcchksum::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crcchksum`]
170module"]
171#[doc(alias = "CRCCHKSUM")]
172pub type Crcchksum = crate::Reg<crcchksum::CrcchksumSpec>;
173#[doc = "CRC Checksum"]
174pub mod crcchksum;
175#[doc = "CRCSTATUS (rw) register accessor: CRC Status\n\nYou can [`read`](crate::Reg::read) this register and get [`crcstatus::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcstatus::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crcstatus`]
176module"]
177#[doc(alias = "CRCSTATUS")]
178pub type Crcstatus = crate::Reg<crcstatus::CrcstatusSpec>;
179#[doc = "CRC Status"]
180pub mod crcstatus;
181#[doc = "DBGCTRL (rw) register accessor: Debug Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbgctrl`]
182module"]
183#[doc(alias = "DBGCTRL")]
184pub type Dbgctrl = crate::Reg<dbgctrl::DbgctrlSpec>;
185#[doc = "Debug Control"]
186pub mod dbgctrl;
187#[doc = "QOSCTRL (rw) register accessor: QOS Control\n\nYou can [`read`](crate::Reg::read) this register and get [`qosctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`qosctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qosctrl`]
188module"]
189#[doc(alias = "QOSCTRL")]
190pub type Qosctrl = crate::Reg<qosctrl::QosctrlSpec>;
191#[doc = "QOS Control"]
192pub mod qosctrl;
193#[doc = "SWTRIGCTRL (rw) register accessor: Software Trigger Control\n\nYou can [`read`](crate::Reg::read) this register and get [`swtrigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swtrigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swtrigctrl`]
194module"]
195#[doc(alias = "SWTRIGCTRL")]
196pub type Swtrigctrl = crate::Reg<swtrigctrl::SwtrigctrlSpec>;
197#[doc = "Software Trigger Control"]
198pub mod swtrigctrl;
199#[doc = "PRICTRL0 (rw) register accessor: Priority Control 0\n\nYou can [`read`](crate::Reg::read) this register and get [`prictrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prictrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prictrl0`]
200module"]
201#[doc(alias = "PRICTRL0")]
202pub type Prictrl0 = crate::Reg<prictrl0::Prictrl0Spec>;
203#[doc = "Priority Control 0"]
204pub mod prictrl0;
205#[doc = "INTPEND (rw) register accessor: Interrupt Pending\n\nYou can [`read`](crate::Reg::read) this register and get [`intpend::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intpend::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intpend`]
206module"]
207#[doc(alias = "INTPEND")]
208pub type Intpend = crate::Reg<intpend::IntpendSpec>;
209#[doc = "Interrupt Pending"]
210pub mod intpend;
211#[doc = "INTSTATUS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`intstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intstatus`]
212module"]
213#[doc(alias = "INTSTATUS")]
214pub type Intstatus = crate::Reg<intstatus::IntstatusSpec>;
215#[doc = "Interrupt Status"]
216pub mod intstatus;
217#[doc = "BUSYCH (r) register accessor: Busy Channels\n\nYou can [`read`](crate::Reg::read) this register and get [`busych::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busych`]
218module"]
219#[doc(alias = "BUSYCH")]
220pub type Busych = crate::Reg<busych::BusychSpec>;
221#[doc = "Busy Channels"]
222pub mod busych;
223#[doc = "PENDCH (r) register accessor: Pending Channels\n\nYou can [`read`](crate::Reg::read) this register and get [`pendch::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pendch`]
224module"]
225#[doc(alias = "PENDCH")]
226pub type Pendch = crate::Reg<pendch::PendchSpec>;
227#[doc = "Pending Channels"]
228pub mod pendch;
229#[doc = "ACTIVE (r) register accessor: Active Channel and Levels\n\nYou can [`read`](crate::Reg::read) this register and get [`active::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@active`]
230module"]
231#[doc(alias = "ACTIVE")]
232pub type Active = crate::Reg<active::ActiveSpec>;
233#[doc = "Active Channel and Levels"]
234pub mod active;
235#[doc = "BASEADDR (rw) register accessor: Descriptor Memory Section Base Address\n\nYou can [`read`](crate::Reg::read) this register and get [`baseaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`baseaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@baseaddr`]
236module"]
237#[doc(alias = "BASEADDR")]
238pub type Baseaddr = crate::Reg<baseaddr::BaseaddrSpec>;
239#[doc = "Descriptor Memory Section Base Address"]
240pub mod baseaddr;
241#[doc = "WRBADDR (rw) register accessor: Write-Back Memory Section Base Address\n\nYou can [`read`](crate::Reg::read) this register and get [`wrbaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wrbaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wrbaddr`]
242module"]
243#[doc(alias = "WRBADDR")]
244pub type Wrbaddr = crate::Reg<wrbaddr::WrbaddrSpec>;
245#[doc = "Write-Back Memory Section Base Address"]
246pub mod wrbaddr;
247#[doc = "CHID (rw) register accessor: Channel ID\n\nYou can [`read`](crate::Reg::read) this register and get [`chid::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chid::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chid`]
248module"]
249#[doc(alias = "CHID")]
250pub type Chid = crate::Reg<chid::ChidSpec>;
251#[doc = "Channel ID"]
252pub mod chid;
253#[doc = "CHCTRLA (rw) register accessor: Channel Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`chctrla::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chctrla::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chctrla`]
254module"]
255#[doc(alias = "CHCTRLA")]
256pub type Chctrla = crate::Reg<chctrla::ChctrlaSpec>;
257#[doc = "Channel Control A"]
258pub mod chctrla;
259#[doc = "CHCTRLB (rw) register accessor: Channel Control B\n\nYou can [`read`](crate::Reg::read) this register and get [`chctrlb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chctrlb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chctrlb`]
260module"]
261#[doc(alias = "CHCTRLB")]
262pub type Chctrlb = crate::Reg<chctrlb::ChctrlbSpec>;
263#[doc = "Channel Control B"]
264pub mod chctrlb;
265#[doc = "CHINTENCLR (rw) register accessor: Channel Interrupt Enable Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chintenclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chintenclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chintenclr`]
266module"]
267#[doc(alias = "CHINTENCLR")]
268pub type Chintenclr = crate::Reg<chintenclr::ChintenclrSpec>;
269#[doc = "Channel Interrupt Enable Clear"]
270pub mod chintenclr;
271#[doc = "CHINTENSET (rw) register accessor: Channel Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`chintenset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chintenset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chintenset`]
272module"]
273#[doc(alias = "CHINTENSET")]
274pub type Chintenset = crate::Reg<chintenset::ChintensetSpec>;
275#[doc = "Channel Interrupt Enable Set"]
276pub mod chintenset;
277#[doc = "CHINTFLAG (rw) register accessor: Channel Interrupt Flag Status and Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`chintflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chintflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chintflag`]
278module"]
279#[doc(alias = "CHINTFLAG")]
280pub type Chintflag = crate::Reg<chintflag::ChintflagSpec>;
281#[doc = "Channel Interrupt Flag Status and Clear"]
282pub mod chintflag;
283#[doc = "CHSTATUS (r) register accessor: Channel Status\n\nYou can [`read`](crate::Reg::read) this register and get [`chstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chstatus`]
284module"]
285#[doc(alias = "CHSTATUS")]
286pub type Chstatus = crate::Reg<chstatus::ChstatusSpec>;
287#[doc = "Channel Status"]
288pub mod chstatus;