atsamd11c/dmac/
busych.rs
1#[doc = "Register `BUSYCH` reader"]
2pub type R = crate::R<BusychSpec>;
3#[doc = "Field `BUSYCH0` reader - Busy Channel 0"]
4pub type Busych0R = crate::BitReader;
5#[doc = "Field `BUSYCH1` reader - Busy Channel 1"]
6pub type Busych1R = crate::BitReader;
7#[doc = "Field `BUSYCH2` reader - Busy Channel 2"]
8pub type Busych2R = crate::BitReader;
9#[doc = "Field `BUSYCH3` reader - Busy Channel 3"]
10pub type Busych3R = crate::BitReader;
11#[doc = "Field `BUSYCH4` reader - Busy Channel 4"]
12pub type Busych4R = crate::BitReader;
13#[doc = "Field `BUSYCH5` reader - Busy Channel 5"]
14pub type Busych5R = crate::BitReader;
15impl R {
16 #[doc = "Bit 0 - Busy Channel 0"]
17 #[inline(always)]
18 pub fn busych0(&self) -> Busych0R {
19 Busych0R::new((self.bits & 1) != 0)
20 }
21 #[doc = "Bit 1 - Busy Channel 1"]
22 #[inline(always)]
23 pub fn busych1(&self) -> Busych1R {
24 Busych1R::new(((self.bits >> 1) & 1) != 0)
25 }
26 #[doc = "Bit 2 - Busy Channel 2"]
27 #[inline(always)]
28 pub fn busych2(&self) -> Busych2R {
29 Busych2R::new(((self.bits >> 2) & 1) != 0)
30 }
31 #[doc = "Bit 3 - Busy Channel 3"]
32 #[inline(always)]
33 pub fn busych3(&self) -> Busych3R {
34 Busych3R::new(((self.bits >> 3) & 1) != 0)
35 }
36 #[doc = "Bit 4 - Busy Channel 4"]
37 #[inline(always)]
38 pub fn busych4(&self) -> Busych4R {
39 Busych4R::new(((self.bits >> 4) & 1) != 0)
40 }
41 #[doc = "Bit 5 - Busy Channel 5"]
42 #[inline(always)]
43 pub fn busych5(&self) -> Busych5R {
44 Busych5R::new(((self.bits >> 5) & 1) != 0)
45 }
46}
47#[doc = "Busy Channels\n\nYou can [`read`](crate::Reg::read) this register and get [`busych::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
48pub struct BusychSpec;
49impl crate::RegisterSpec for BusychSpec {
50 type Ux = u32;
51}
52#[doc = "`read()` method returns [`busych::R`](R) reader structure"]
53impl crate::Readable for BusychSpec {}
54#[doc = "`reset()` method sets BUSYCH to value 0"]
55impl crate::Resettable for BusychSpec {
56 const RESET_VALUE: u32 = 0;
57}