atsamd11c/hmatrix/
pras.rs
1#[doc = "Register `PRAS%s` reader"]
2pub type R = crate::R<PrasSpec>;
3#[doc = "Register `PRAS%s` writer"]
4pub type W = crate::W<PrasSpec>;
5#[doc = "Field `M0PR` reader - Master 0 Priority"]
6pub type M0prR = crate::FieldReader;
7#[doc = "Field `M0PR` writer - Master 0 Priority"]
8pub type M0prW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
9#[doc = "Field `M1PR` reader - Master 1 Priority"]
10pub type M1prR = crate::FieldReader;
11#[doc = "Field `M1PR` writer - Master 1 Priority"]
12pub type M1prW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `M2PR` reader - Master 2 Priority"]
14pub type M2prR = crate::FieldReader;
15#[doc = "Field `M2PR` writer - Master 2 Priority"]
16pub type M2prW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
17#[doc = "Field `M3PR` reader - Master 3 Priority"]
18pub type M3prR = crate::FieldReader;
19#[doc = "Field `M3PR` writer - Master 3 Priority"]
20pub type M3prW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
21#[doc = "Field `M4PR` reader - Master 4 Priority"]
22pub type M4prR = crate::FieldReader;
23#[doc = "Field `M4PR` writer - Master 4 Priority"]
24pub type M4prW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
25#[doc = "Field `M5PR` reader - Master 5 Priority"]
26pub type M5prR = crate::FieldReader;
27#[doc = "Field `M5PR` writer - Master 5 Priority"]
28pub type M5prW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
29#[doc = "Field `M6PR` reader - Master 6 Priority"]
30pub type M6prR = crate::FieldReader;
31#[doc = "Field `M6PR` writer - Master 6 Priority"]
32pub type M6prW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
33#[doc = "Field `M7PR` reader - Master 7 Priority"]
34pub type M7prR = crate::FieldReader;
35#[doc = "Field `M7PR` writer - Master 7 Priority"]
36pub type M7prW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
37impl R {
38 #[doc = "Bits 0:3 - Master 0 Priority"]
39 #[inline(always)]
40 pub fn m0pr(&self) -> M0prR {
41 M0prR::new((self.bits & 0x0f) as u8)
42 }
43 #[doc = "Bits 4:7 - Master 1 Priority"]
44 #[inline(always)]
45 pub fn m1pr(&self) -> M1prR {
46 M1prR::new(((self.bits >> 4) & 0x0f) as u8)
47 }
48 #[doc = "Bits 8:11 - Master 2 Priority"]
49 #[inline(always)]
50 pub fn m2pr(&self) -> M2prR {
51 M2prR::new(((self.bits >> 8) & 0x0f) as u8)
52 }
53 #[doc = "Bits 12:15 - Master 3 Priority"]
54 #[inline(always)]
55 pub fn m3pr(&self) -> M3prR {
56 M3prR::new(((self.bits >> 12) & 0x0f) as u8)
57 }
58 #[doc = "Bits 16:19 - Master 4 Priority"]
59 #[inline(always)]
60 pub fn m4pr(&self) -> M4prR {
61 M4prR::new(((self.bits >> 16) & 0x0f) as u8)
62 }
63 #[doc = "Bits 20:23 - Master 5 Priority"]
64 #[inline(always)]
65 pub fn m5pr(&self) -> M5prR {
66 M5prR::new(((self.bits >> 20) & 0x0f) as u8)
67 }
68 #[doc = "Bits 24:27 - Master 6 Priority"]
69 #[inline(always)]
70 pub fn m6pr(&self) -> M6prR {
71 M6prR::new(((self.bits >> 24) & 0x0f) as u8)
72 }
73 #[doc = "Bits 28:31 - Master 7 Priority"]
74 #[inline(always)]
75 pub fn m7pr(&self) -> M7prR {
76 M7prR::new(((self.bits >> 28) & 0x0f) as u8)
77 }
78}
79impl W {
80 #[doc = "Bits 0:3 - Master 0 Priority"]
81 #[inline(always)]
82 #[must_use]
83 pub fn m0pr(&mut self) -> M0prW<PrasSpec> {
84 M0prW::new(self, 0)
85 }
86 #[doc = "Bits 4:7 - Master 1 Priority"]
87 #[inline(always)]
88 #[must_use]
89 pub fn m1pr(&mut self) -> M1prW<PrasSpec> {
90 M1prW::new(self, 4)
91 }
92 #[doc = "Bits 8:11 - Master 2 Priority"]
93 #[inline(always)]
94 #[must_use]
95 pub fn m2pr(&mut self) -> M2prW<PrasSpec> {
96 M2prW::new(self, 8)
97 }
98 #[doc = "Bits 12:15 - Master 3 Priority"]
99 #[inline(always)]
100 #[must_use]
101 pub fn m3pr(&mut self) -> M3prW<PrasSpec> {
102 M3prW::new(self, 12)
103 }
104 #[doc = "Bits 16:19 - Master 4 Priority"]
105 #[inline(always)]
106 #[must_use]
107 pub fn m4pr(&mut self) -> M4prW<PrasSpec> {
108 M4prW::new(self, 16)
109 }
110 #[doc = "Bits 20:23 - Master 5 Priority"]
111 #[inline(always)]
112 #[must_use]
113 pub fn m5pr(&mut self) -> M5prW<PrasSpec> {
114 M5prW::new(self, 20)
115 }
116 #[doc = "Bits 24:27 - Master 6 Priority"]
117 #[inline(always)]
118 #[must_use]
119 pub fn m6pr(&mut self) -> M6prW<PrasSpec> {
120 M6prW::new(self, 24)
121 }
122 #[doc = "Bits 28:31 - Master 7 Priority"]
123 #[inline(always)]
124 #[must_use]
125 pub fn m7pr(&mut self) -> M7prW<PrasSpec> {
126 M7prW::new(self, 28)
127 }
128}
129#[doc = "Priority A for Slave\n\nYou can [`read`](crate::Reg::read) this register and get [`pras::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pras::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
130pub struct PrasSpec;
131impl crate::RegisterSpec for PrasSpec {
132 type Ux = u32;
133}
134#[doc = "`read()` method returns [`pras::R`](R) reader structure"]
135impl crate::Readable for PrasSpec {}
136#[doc = "`write(|w| ..)` method takes [`pras::W`](W) writer structure"]
137impl crate::Writable for PrasSpec {
138 type Safety = crate::Unsafe;
139 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
140 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
141}
142#[doc = "`reset()` method sets PRAS%s to value 0"]
143impl crate::Resettable for PrasSpec {
144 const RESET_VALUE: u32 = 0;
145}