atsamd11c/sercom0/
spi.rs

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1#[repr(C)]
2#[doc = "SPI Mode"]
3#[doc(alias = "SPI")]
4pub struct Spi {
5    ctrla: Ctrla,
6    ctrlb: Ctrlb,
7    _reserved2: [u8; 0x04],
8    baud: Baud,
9    _reserved3: [u8; 0x07],
10    intenclr: Intenclr,
11    _reserved4: [u8; 0x01],
12    intenset: Intenset,
13    _reserved5: [u8; 0x01],
14    intflag: Intflag,
15    _reserved6: [u8; 0x01],
16    status: Status,
17    syncbusy: Syncbusy,
18    _reserved8: [u8; 0x04],
19    addr: Addr,
20    data: Data,
21    _reserved10: [u8; 0x04],
22    dbgctrl: Dbgctrl,
23}
24impl Spi {
25    #[doc = "0x00 - SPI Control A"]
26    #[inline(always)]
27    pub const fn ctrla(&self) -> &Ctrla {
28        &self.ctrla
29    }
30    #[doc = "0x04 - SPI Control B"]
31    #[inline(always)]
32    pub const fn ctrlb(&self) -> &Ctrlb {
33        &self.ctrlb
34    }
35    #[doc = "0x0c - SPI Baud Rate"]
36    #[inline(always)]
37    pub const fn baud(&self) -> &Baud {
38        &self.baud
39    }
40    #[doc = "0x14 - SPI Interrupt Enable Clear"]
41    #[inline(always)]
42    pub const fn intenclr(&self) -> &Intenclr {
43        &self.intenclr
44    }
45    #[doc = "0x16 - SPI Interrupt Enable Set"]
46    #[inline(always)]
47    pub const fn intenset(&self) -> &Intenset {
48        &self.intenset
49    }
50    #[doc = "0x18 - SPI Interrupt Flag Status and Clear"]
51    #[inline(always)]
52    pub const fn intflag(&self) -> &Intflag {
53        &self.intflag
54    }
55    #[doc = "0x1a - SPI Status"]
56    #[inline(always)]
57    pub const fn status(&self) -> &Status {
58        &self.status
59    }
60    #[doc = "0x1c - SPI Syncbusy"]
61    #[inline(always)]
62    pub const fn syncbusy(&self) -> &Syncbusy {
63        &self.syncbusy
64    }
65    #[doc = "0x24 - SPI Address"]
66    #[inline(always)]
67    pub const fn addr(&self) -> &Addr {
68        &self.addr
69    }
70    #[doc = "0x28 - SPI Data"]
71    #[inline(always)]
72    pub const fn data(&self) -> &Data {
73        &self.data
74    }
75    #[doc = "0x30 - SPI Debug Control"]
76    #[inline(always)]
77    pub const fn dbgctrl(&self) -> &Dbgctrl {
78        &self.dbgctrl
79    }
80}
81#[doc = "CTRLA (rw) register accessor: SPI Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrla::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrla::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrla`]
82module"]
83#[doc(alias = "CTRLA")]
84pub type Ctrla = crate::Reg<ctrla::CtrlaSpec>;
85#[doc = "SPI Control A"]
86pub mod ctrla;
87#[doc = "CTRLB (rw) register accessor: SPI Control B\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlb::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlb::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrlb`]
88module"]
89#[doc(alias = "CTRLB")]
90pub type Ctrlb = crate::Reg<ctrlb::CtrlbSpec>;
91#[doc = "SPI Control B"]
92pub mod ctrlb;
93#[doc = "BAUD (rw) register accessor: SPI Baud Rate\n\nYou can [`read`](crate::Reg::read) this register and get [`baud::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`baud::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@baud`]
94module"]
95#[doc(alias = "BAUD")]
96pub type Baud = crate::Reg<baud::BaudSpec>;
97#[doc = "SPI Baud Rate"]
98pub mod baud;
99#[doc = "INTENCLR (rw) register accessor: SPI Interrupt Enable Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intenclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenclr`]
100module"]
101#[doc(alias = "INTENCLR")]
102pub type Intenclr = crate::Reg<intenclr::IntenclrSpec>;
103#[doc = "SPI Interrupt Enable Clear"]
104pub mod intenclr;
105#[doc = "INTENSET (rw) register accessor: SPI Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`intenset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intenset`]
106module"]
107#[doc(alias = "INTENSET")]
108pub type Intenset = crate::Reg<intenset::IntensetSpec>;
109#[doc = "SPI Interrupt Enable Set"]
110pub mod intenset;
111#[doc = "INTFLAG (rw) register accessor: SPI Interrupt Flag Status and Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intflag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intflag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intflag`]
112module"]
113#[doc(alias = "INTFLAG")]
114pub type Intflag = crate::Reg<intflag::IntflagSpec>;
115#[doc = "SPI Interrupt Flag Status and Clear"]
116pub mod intflag;
117#[doc = "STATUS (rw) register accessor: SPI Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`]
118module"]
119#[doc(alias = "STATUS")]
120pub type Status = crate::Reg<status::StatusSpec>;
121#[doc = "SPI Status"]
122pub mod status;
123#[doc = "SYNCBUSY (r) register accessor: SPI Syncbusy\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncbusy`]
124module"]
125#[doc(alias = "SYNCBUSY")]
126pub type Syncbusy = crate::Reg<syncbusy::SyncbusySpec>;
127#[doc = "SPI Syncbusy"]
128pub mod syncbusy;
129#[doc = "ADDR (rw) register accessor: SPI Address\n\nYou can [`read`](crate::Reg::read) this register and get [`addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`]
130module"]
131#[doc(alias = "ADDR")]
132pub type Addr = crate::Reg<addr::AddrSpec>;
133#[doc = "SPI Address"]
134pub mod addr;
135#[doc = "DATA (rw) register accessor: SPI Data\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
136module"]
137#[doc(alias = "DATA")]
138pub type Data = crate::Reg<data::DataSpec>;
139#[doc = "SPI Data"]
140pub mod data;
141#[doc = "DBGCTRL (rw) register accessor: SPI Debug Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbgctrl`]
142module"]
143#[doc(alias = "DBGCTRL")]
144pub type Dbgctrl = crate::Reg<dbgctrl::DbgctrlSpec>;
145#[doc = "SPI Debug Control"]
146pub mod dbgctrl;
atsamd11c/sercom0/spi.rs

atsamd11c/sercom0/
spi.rs
