atsamd11c/evsys/
intflag.rs
1#[doc = "Register `INTFLAG` reader"]
2pub type R = crate::R<IntflagSpec>;
3#[doc = "Register `INTFLAG` writer"]
4pub type W = crate::W<IntflagSpec>;
5#[doc = "Field `OVR0` reader - Channel 0 Overrun"]
6pub type Ovr0R = crate::BitReader;
7#[doc = "Field `OVR0` writer - Channel 0 Overrun"]
8pub type Ovr0W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `OVR1` reader - Channel 1 Overrun"]
10pub type Ovr1R = crate::BitReader;
11#[doc = "Field `OVR1` writer - Channel 1 Overrun"]
12pub type Ovr1W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `OVR2` reader - Channel 2 Overrun"]
14pub type Ovr2R = crate::BitReader;
15#[doc = "Field `OVR2` writer - Channel 2 Overrun"]
16pub type Ovr2W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `OVR3` reader - Channel 3 Overrun"]
18pub type Ovr3R = crate::BitReader;
19#[doc = "Field `OVR3` writer - Channel 3 Overrun"]
20pub type Ovr3W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `OVR4` reader - Channel 4 Overrun"]
22pub type Ovr4R = crate::BitReader;
23#[doc = "Field `OVR4` writer - Channel 4 Overrun"]
24pub type Ovr4W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `OVR5` reader - Channel 5 Overrun"]
26pub type Ovr5R = crate::BitReader;
27#[doc = "Field `OVR5` writer - Channel 5 Overrun"]
28pub type Ovr5W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `EVD0` reader - Channel 0 Event Detection"]
30pub type Evd0R = crate::BitReader;
31#[doc = "Field `EVD0` writer - Channel 0 Event Detection"]
32pub type Evd0W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `EVD1` reader - Channel 1 Event Detection"]
34pub type Evd1R = crate::BitReader;
35#[doc = "Field `EVD1` writer - Channel 1 Event Detection"]
36pub type Evd1W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `EVD2` reader - Channel 2 Event Detection"]
38pub type Evd2R = crate::BitReader;
39#[doc = "Field `EVD2` writer - Channel 2 Event Detection"]
40pub type Evd2W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `EVD3` reader - Channel 3 Event Detection"]
42pub type Evd3R = crate::BitReader;
43#[doc = "Field `EVD3` writer - Channel 3 Event Detection"]
44pub type Evd3W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `EVD4` reader - Channel 4 Event Detection"]
46pub type Evd4R = crate::BitReader;
47#[doc = "Field `EVD4` writer - Channel 4 Event Detection"]
48pub type Evd4W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `EVD5` reader - Channel 5 Event Detection"]
50pub type Evd5R = crate::BitReader;
51#[doc = "Field `EVD5` writer - Channel 5 Event Detection"]
52pub type Evd5W<'a, REG> = crate::BitWriter<'a, REG>;
53impl R {
54 #[doc = "Bit 0 - Channel 0 Overrun"]
55 #[inline(always)]
56 pub fn ovr0(&self) -> Ovr0R {
57 Ovr0R::new((self.bits & 1) != 0)
58 }
59 #[doc = "Bit 1 - Channel 1 Overrun"]
60 #[inline(always)]
61 pub fn ovr1(&self) -> Ovr1R {
62 Ovr1R::new(((self.bits >> 1) & 1) != 0)
63 }
64 #[doc = "Bit 2 - Channel 2 Overrun"]
65 #[inline(always)]
66 pub fn ovr2(&self) -> Ovr2R {
67 Ovr2R::new(((self.bits >> 2) & 1) != 0)
68 }
69 #[doc = "Bit 3 - Channel 3 Overrun"]
70 #[inline(always)]
71 pub fn ovr3(&self) -> Ovr3R {
72 Ovr3R::new(((self.bits >> 3) & 1) != 0)
73 }
74 #[doc = "Bit 4 - Channel 4 Overrun"]
75 #[inline(always)]
76 pub fn ovr4(&self) -> Ovr4R {
77 Ovr4R::new(((self.bits >> 4) & 1) != 0)
78 }
79 #[doc = "Bit 5 - Channel 5 Overrun"]
80 #[inline(always)]
81 pub fn ovr5(&self) -> Ovr5R {
82 Ovr5R::new(((self.bits >> 5) & 1) != 0)
83 }
84 #[doc = "Bit 8 - Channel 0 Event Detection"]
85 #[inline(always)]
86 pub fn evd0(&self) -> Evd0R {
87 Evd0R::new(((self.bits >> 8) & 1) != 0)
88 }
89 #[doc = "Bit 9 - Channel 1 Event Detection"]
90 #[inline(always)]
91 pub fn evd1(&self) -> Evd1R {
92 Evd1R::new(((self.bits >> 9) & 1) != 0)
93 }
94 #[doc = "Bit 10 - Channel 2 Event Detection"]
95 #[inline(always)]
96 pub fn evd2(&self) -> Evd2R {
97 Evd2R::new(((self.bits >> 10) & 1) != 0)
98 }
99 #[doc = "Bit 11 - Channel 3 Event Detection"]
100 #[inline(always)]
101 pub fn evd3(&self) -> Evd3R {
102 Evd3R::new(((self.bits >> 11) & 1) != 0)
103 }
104 #[doc = "Bit 12 - Channel 4 Event Detection"]
105 #[inline(always)]
106 pub fn evd4(&self) -> Evd4R {
107 Evd4R::new(((self.bits >> 12) & 1) != 0)
108 }
109 #[doc = "Bit 13 - Channel 5 Event Detection"]
110 #[inline(always)]
111 pub fn evd5(&self) -> Evd5R {
112 Evd5R::new(((self.bits >> 13) & 1) != 0)
113 }
114}
115impl W {
116 #[doc = "Bit 0 - Channel 0 Overrun"]
117 #[inline(always)]
118 #[must_use]
119 pub fn ovr0(&mut self) -> Ovr0W<IntflagSpec> {
120 Ovr0W::new(self, 0)
121 }
122 #[doc = "Bit 1 - Channel 1 Overrun"]
123 #[inline(always)]
124 #[must_use]
125 pub fn ovr1(&mut self) -> Ovr1W<IntflagSpec> {
126 Ovr1W::new(self, 1)
127 }
128 #[doc = "Bit 2 - Channel 2 Overrun"]
129 #[inline(always)]
130 #[must_use]
131 pub fn ovr2(&mut self) -> Ovr2W<IntflagSpec> {
132 Ovr2W::new(self, 2)
133 }
134 #[doc = "Bit 3 - Channel 3 Overrun"]
135 #[inline(always)]
136 #[must_use]
137 pub fn ovr3(&mut self) -> Ovr3W<IntflagSpec> {
138 Ovr3W::new(self, 3)
139 }
140 #[doc = "Bit 4 - Channel 4 Overrun"]
141 #[inline(always)]
142 #[must_use]
143 pub fn ovr4(&mut self) -> Ovr4W<IntflagSpec> {
144 Ovr4W::new(self, 4)
145 }
146 #[doc = "Bit 5 - Channel 5 Overrun"]
147 #[inline(always)]
148 #[must_use]
149 pub fn ovr5(&mut self) -> Ovr5W<IntflagSpec> {
150 Ovr5W::new(self, 5)
151 }
152 #[doc = "Bit 8 - Channel 0 Event Detection"]
153 #[inline(always)]
154 #[must_use]
155 pub fn evd0(&mut self) -> Evd0W<IntflagSpec> {
156 Evd0W::new(self, 8)
157 }
158 #[doc = "Bit 9 - Channel 1 Event Detection"]
159 #[inline(always)]
160 #[must_use]
161 pub fn evd1(&mut self) -> Evd1W<IntflagSpec> {
162 Evd1W::new(self, 9)
163 }
164 #[doc = "Bit 10 - Channel 2 Event Detection"]
165 #[inline(always)]
166 #[must_use]
167 pub fn evd2(&mut self) -> Evd2W<IntflagSpec> {
168 Evd2W::new(self, 10)
169 }
170 #[doc = "Bit 11 - Channel 3 Event Detection"]
171 #[inline(always)]
172 #[must_use]
173 pub fn evd3(&mut self) -> Evd3W<IntflagSpec> {
174 Evd3W::new(self, 11)
175 }
176 #[doc = "Bit 12 - Channel 4 Event Detection"]
177 #[inline(always)]
178 #[must_use]
179 pub fn evd4(&mut self) -> Evd4W<IntflagSpec> {
180 Evd4W::new(self, 12)
181 }
182 #[doc = "Bit 13 - Channel 5 Event Detection"]
183 #[inline(always)]
184 #[must_use]
185 pub fn evd5(&mut self) -> Evd5W<IntflagSpec> {
186 Evd5W::new(self, 13)
187 }
188}
189#[doc = "Interrupt Flag Status and Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`intflag::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intflag::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
190pub struct IntflagSpec;
191impl crate::RegisterSpec for IntflagSpec {
192 type Ux = u32;
193}
194#[doc = "`read()` method returns [`intflag::R`](R) reader structure"]
195impl crate::Readable for IntflagSpec {}
196#[doc = "`write(|w| ..)` method takes [`intflag::W`](W) writer structure"]
197impl crate::Writable for IntflagSpec {
198 type Safety = crate::Unsafe;
199 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
200 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
201}
202#[doc = "`reset()` method sets INTFLAG to value 0"]
203impl crate::Resettable for IntflagSpec {
204 const RESET_VALUE: u32 = 0;
205}