atsamd11c/tcc0/
syncbusy.rs

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1#[doc = "Register `SYNCBUSY` reader"]
2pub type R = crate::R<SyncbusySpec>;
3#[doc = "Field `SWRST` reader - Swrst Busy"]
4pub type SwrstR = crate::BitReader;
5#[doc = "Field `ENABLE` reader - Enable Busy"]
6pub type EnableR = crate::BitReader;
7#[doc = "Field `CTRLB` reader - Ctrlb Busy"]
8pub type CtrlbR = crate::BitReader;
9#[doc = "Field `STATUS` reader - Status Busy"]
10pub type StatusR = crate::BitReader;
11#[doc = "Field `COUNT` reader - Count Busy"]
12pub type CountR = crate::BitReader;
13#[doc = "Field `PATT` reader - Pattern Busy"]
14pub type PattR = crate::BitReader;
15#[doc = "Field `WAVE` reader - Wave Busy"]
16pub type WaveR = crate::BitReader;
17#[doc = "Field `PER` reader - Period busy"]
18pub type PerR = crate::BitReader;
19#[doc = "Field `CC0` reader - Compare Channel 0 Busy"]
20pub type Cc0R = crate::BitReader;
21#[doc = "Field `CC1` reader - Compare Channel 1 Busy"]
22pub type Cc1R = crate::BitReader;
23#[doc = "Field `CC2` reader - Compare Channel 2 Busy"]
24pub type Cc2R = crate::BitReader;
25#[doc = "Field `CC3` reader - Compare Channel 3 Busy"]
26pub type Cc3R = crate::BitReader;
27#[doc = "Field `PATTB` reader - Pattern Buffer Busy"]
28pub type PattbR = crate::BitReader;
29#[doc = "Field `WAVEB` reader - Wave Buffer Busy"]
30pub type WavebR = crate::BitReader;
31#[doc = "Field `PERB` reader - Period Buffer Busy"]
32pub type PerbR = crate::BitReader;
33#[doc = "Field `CCB0` reader - Compare Channel Buffer 0 Busy"]
34pub type Ccb0R = crate::BitReader;
35#[doc = "Field `CCB1` reader - Compare Channel Buffer 1 Busy"]
36pub type Ccb1R = crate::BitReader;
37#[doc = "Field `CCB2` reader - Compare Channel Buffer 2 Busy"]
38pub type Ccb2R = crate::BitReader;
39#[doc = "Field `CCB3` reader - Compare Channel Buffer 3 Busy"]
40pub type Ccb3R = crate::BitReader;
41impl R {
42    #[doc = "Bit 0 - Swrst Busy"]
43    #[inline(always)]
44    pub fn swrst(&self) -> SwrstR {
45        SwrstR::new((self.bits & 1) != 0)
46    }
47    #[doc = "Bit 1 - Enable Busy"]
48    #[inline(always)]
49    pub fn enable(&self) -> EnableR {
50        EnableR::new(((self.bits >> 1) & 1) != 0)
51    }
52    #[doc = "Bit 2 - Ctrlb Busy"]
53    #[inline(always)]
54    pub fn ctrlb(&self) -> CtrlbR {
55        CtrlbR::new(((self.bits >> 2) & 1) != 0)
56    }
57    #[doc = "Bit 3 - Status Busy"]
58    #[inline(always)]
59    pub fn status(&self) -> StatusR {
60        StatusR::new(((self.bits >> 3) & 1) != 0)
61    }
62    #[doc = "Bit 4 - Count Busy"]
63    #[inline(always)]
64    pub fn count(&self) -> CountR {
65        CountR::new(((self.bits >> 4) & 1) != 0)
66    }
67    #[doc = "Bit 5 - Pattern Busy"]
68    #[inline(always)]
69    pub fn patt(&self) -> PattR {
70        PattR::new(((self.bits >> 5) & 1) != 0)
71    }
72    #[doc = "Bit 6 - Wave Busy"]
73    #[inline(always)]
74    pub fn wave(&self) -> WaveR {
75        WaveR::new(((self.bits >> 6) & 1) != 0)
76    }
77    #[doc = "Bit 7 - Period busy"]
78    #[inline(always)]
79    pub fn per(&self) -> PerR {
80        PerR::new(((self.bits >> 7) & 1) != 0)
81    }
82    #[doc = "Bit 8 - Compare Channel 0 Busy"]
83    #[inline(always)]
84    pub fn cc0(&self) -> Cc0R {
85        Cc0R::new(((self.bits >> 8) & 1) != 0)
86    }
87    #[doc = "Bit 9 - Compare Channel 1 Busy"]
88    #[inline(always)]
89    pub fn cc1(&self) -> Cc1R {
90        Cc1R::new(((self.bits >> 9) & 1) != 0)
91    }
92    #[doc = "Bit 10 - Compare Channel 2 Busy"]
93    #[inline(always)]
94    pub fn cc2(&self) -> Cc2R {
95        Cc2R::new(((self.bits >> 10) & 1) != 0)
96    }
97    #[doc = "Bit 11 - Compare Channel 3 Busy"]
98    #[inline(always)]
99    pub fn cc3(&self) -> Cc3R {
100        Cc3R::new(((self.bits >> 11) & 1) != 0)
101    }
102    #[doc = "Bit 16 - Pattern Buffer Busy"]
103    #[inline(always)]
104    pub fn pattb(&self) -> PattbR {
105        PattbR::new(((self.bits >> 16) & 1) != 0)
106    }
107    #[doc = "Bit 17 - Wave Buffer Busy"]
108    #[inline(always)]
109    pub fn waveb(&self) -> WavebR {
110        WavebR::new(((self.bits >> 17) & 1) != 0)
111    }
112    #[doc = "Bit 18 - Period Buffer Busy"]
113    #[inline(always)]
114    pub fn perb(&self) -> PerbR {
115        PerbR::new(((self.bits >> 18) & 1) != 0)
116    }
117    #[doc = "Bit 19 - Compare Channel Buffer 0 Busy"]
118    #[inline(always)]
119    pub fn ccb0(&self) -> Ccb0R {
120        Ccb0R::new(((self.bits >> 19) & 1) != 0)
121    }
122    #[doc = "Bit 20 - Compare Channel Buffer 1 Busy"]
123    #[inline(always)]
124    pub fn ccb1(&self) -> Ccb1R {
125        Ccb1R::new(((self.bits >> 20) & 1) != 0)
126    }
127    #[doc = "Bit 21 - Compare Channel Buffer 2 Busy"]
128    #[inline(always)]
129    pub fn ccb2(&self) -> Ccb2R {
130        Ccb2R::new(((self.bits >> 21) & 1) != 0)
131    }
132    #[doc = "Bit 22 - Compare Channel Buffer 3 Busy"]
133    #[inline(always)]
134    pub fn ccb3(&self) -> Ccb3R {
135        Ccb3R::new(((self.bits >> 22) & 1) != 0)
136    }
137}
138#[doc = "Synchronization Busy\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
139pub struct SyncbusySpec;
140impl crate::RegisterSpec for SyncbusySpec {
141    type Ux = u32;
142}
143#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"]
144impl crate::Readable for SyncbusySpec {}
145#[doc = "`reset()` method sets SYNCBUSY to value 0"]
146impl crate::Resettable for SyncbusySpec {
147    const RESET_VALUE: u32 = 0;
148}
atsamd11c/tcc0/syncbusy.rs

atsamd11c/tcc0/
syncbusy.rs
