atsamd11c/dmac/
chintenset.rs

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1#[doc = "Register `CHINTENSET` reader"]
2pub type R = crate::R<ChintensetSpec>;
3#[doc = "Register `CHINTENSET` writer"]
4pub type W = crate::W<ChintensetSpec>;
5#[doc = "Field `TERR` reader - Channel Transfer Error Interrupt Enable"]
6pub type TerrR = crate::BitReader;
7#[doc = "Field `TERR` writer - Channel Transfer Error Interrupt Enable"]
8pub type TerrW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `TCMPL` reader - Channel Transfer Complete Interrupt Enable"]
10pub type TcmplR = crate::BitReader;
11#[doc = "Field `TCMPL` writer - Channel Transfer Complete Interrupt Enable"]
12pub type TcmplW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SUSP` reader - Channel Suspend Interrupt Enable"]
14pub type SuspR = crate::BitReader;
15#[doc = "Field `SUSP` writer - Channel Suspend Interrupt Enable"]
16pub type SuspW<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - Channel Transfer Error Interrupt Enable"]
19    #[inline(always)]
20    pub fn terr(&self) -> TerrR {
21        TerrR::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - Channel Transfer Complete Interrupt Enable"]
24    #[inline(always)]
25    pub fn tcmpl(&self) -> TcmplR {
26        TcmplR::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bit 2 - Channel Suspend Interrupt Enable"]
29    #[inline(always)]
30    pub fn susp(&self) -> SuspR {
31        SuspR::new(((self.bits >> 2) & 1) != 0)
32    }
33}
34impl W {
35    #[doc = "Bit 0 - Channel Transfer Error Interrupt Enable"]
36    #[inline(always)]
37    #[must_use]
38    pub fn terr(&mut self) -> TerrW<ChintensetSpec> {
39        TerrW::new(self, 0)
40    }
41    #[doc = "Bit 1 - Channel Transfer Complete Interrupt Enable"]
42    #[inline(always)]
43    #[must_use]
44    pub fn tcmpl(&mut self) -> TcmplW<ChintensetSpec> {
45        TcmplW::new(self, 1)
46    }
47    #[doc = "Bit 2 - Channel Suspend Interrupt Enable"]
48    #[inline(always)]
49    #[must_use]
50    pub fn susp(&mut self) -> SuspW<ChintensetSpec> {
51        SuspW::new(self, 2)
52    }
53}
54#[doc = "Channel Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`chintenset::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chintenset::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct ChintensetSpec;
56impl crate::RegisterSpec for ChintensetSpec {
57    type Ux = u8;
58}
59#[doc = "`read()` method returns [`chintenset::R`](R) reader structure"]
60impl crate::Readable for ChintensetSpec {}
61#[doc = "`write(|w| ..)` method takes [`chintenset::W`](W) writer structure"]
62impl crate::Writable for ChintensetSpec {
63    type Safety = crate::Unsafe;
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
65    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
66}
67#[doc = "`reset()` method sets CHINTENSET to value 0"]
68impl crate::Resettable for ChintensetSpec {
69    const RESET_VALUE: u8 = 0;
70}
atsamd11c/dmac/chintenset.rs

atsamd11c/dmac/
chintenset.rs
