1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 ctrl: Ctrl,
5 statusa: Statusa,
6 statusb: Statusb,
7 _reserved3: [u8; 0x01],
8 addr: Addr,
9 length: Length,
10 data: Data,
11 dcc: [Dcc; 2],
12 did: Did,
13 _reserved8: [u8; 0xd4],
14 dcfg: [Dcfg; 2],
15 _reserved9: [u8; 0x0f08],
16 entry0: Entry0,
17 entry1: Entry1,
18 end: End,
19 _reserved12: [u8; 0x0fc0],
20 memtype: Memtype,
21 pid4: Pid4,
22 pid5: Pid5,
23 pid6: Pid6,
24 pid7: Pid7,
25 pid0: Pid0,
26 pid1: Pid1,
27 pid2: Pid2,
28 pid3: Pid3,
29 cid0: Cid0,
30 cid1: Cid1,
31 cid2: Cid2,
32 cid3: Cid3,
33}
34impl RegisterBlock {
35 #[doc = "0x00 - Control"]
36 #[inline(always)]
37 pub const fn ctrl(&self) -> &Ctrl {
38 &self.ctrl
39 }
40 #[doc = "0x01 - Status A"]
41 #[inline(always)]
42 pub const fn statusa(&self) -> &Statusa {
43 &self.statusa
44 }
45 #[doc = "0x02 - Status B"]
46 #[inline(always)]
47 pub const fn statusb(&self) -> &Statusb {
48 &self.statusb
49 }
50 #[doc = "0x04 - Address"]
51 #[inline(always)]
52 pub const fn addr(&self) -> &Addr {
53 &self.addr
54 }
55 #[doc = "0x08 - Length"]
56 #[inline(always)]
57 pub const fn length(&self) -> &Length {
58 &self.length
59 }
60 #[doc = "0x0c - Data"]
61 #[inline(always)]
62 pub const fn data(&self) -> &Data {
63 &self.data
64 }
65 #[doc = "0x10..0x18 - Debug Communication Channel n"]
66 #[inline(always)]
67 pub const fn dcc(&self, n: usize) -> &Dcc {
68 &self.dcc[n]
69 }
70 #[doc = "Iterator for array of:"]
71 #[doc = "0x10..0x18 - Debug Communication Channel n"]
72 #[inline(always)]
73 pub fn dcc_iter(&self) -> impl Iterator<Item = &Dcc> {
74 self.dcc.iter()
75 }
76 #[doc = "0x18 - Device Identification"]
77 #[inline(always)]
78 pub const fn did(&self) -> &Did {
79 &self.did
80 }
81 #[doc = "0xf0..0xf8 - Device Configuration"]
82 #[inline(always)]
83 pub const fn dcfg(&self, n: usize) -> &Dcfg {
84 &self.dcfg[n]
85 }
86 #[doc = "Iterator for array of:"]
87 #[doc = "0xf0..0xf8 - Device Configuration"]
88 #[inline(always)]
89 pub fn dcfg_iter(&self) -> impl Iterator<Item = &Dcfg> {
90 self.dcfg.iter()
91 }
92 #[doc = "0x1000 - CoreSight ROM Table Entry 0"]
93 #[inline(always)]
94 pub const fn entry0(&self) -> &Entry0 {
95 &self.entry0
96 }
97 #[doc = "0x1004 - CoreSight ROM Table Entry 1"]
98 #[inline(always)]
99 pub const fn entry1(&self) -> &Entry1 {
100 &self.entry1
101 }
102 #[doc = "0x1008 - CoreSight ROM Table End"]
103 #[inline(always)]
104 pub const fn end(&self) -> &End {
105 &self.end
106 }
107 #[doc = "0x1fcc - CoreSight ROM Table Memory Type"]
108 #[inline(always)]
109 pub const fn memtype(&self) -> &Memtype {
110 &self.memtype
111 }
112 #[doc = "0x1fd0 - Peripheral Identification 4"]
113 #[inline(always)]
114 pub const fn pid4(&self) -> &Pid4 {
115 &self.pid4
116 }
117 #[doc = "0x1fd4 - Peripheral Identification 5"]
118 #[inline(always)]
119 pub const fn pid5(&self) -> &Pid5 {
120 &self.pid5
121 }
122 #[doc = "0x1fd8 - Peripheral Identification 6"]
123 #[inline(always)]
124 pub const fn pid6(&self) -> &Pid6 {
125 &self.pid6
126 }
127 #[doc = "0x1fdc - Peripheral Identification 7"]
128 #[inline(always)]
129 pub const fn pid7(&self) -> &Pid7 {
130 &self.pid7
131 }
132 #[doc = "0x1fe0 - Peripheral Identification 0"]
133 #[inline(always)]
134 pub const fn pid0(&self) -> &Pid0 {
135 &self.pid0
136 }
137 #[doc = "0x1fe4 - Peripheral Identification 1"]
138 #[inline(always)]
139 pub const fn pid1(&self) -> &Pid1 {
140 &self.pid1
141 }
142 #[doc = "0x1fe8 - Peripheral Identification 2"]
143 #[inline(always)]
144 pub const fn pid2(&self) -> &Pid2 {
145 &self.pid2
146 }
147 #[doc = "0x1fec - Peripheral Identification 3"]
148 #[inline(always)]
149 pub const fn pid3(&self) -> &Pid3 {
150 &self.pid3
151 }
152 #[doc = "0x1ff0 - Component Identification 0"]
153 #[inline(always)]
154 pub const fn cid0(&self) -> &Cid0 {
155 &self.cid0
156 }
157 #[doc = "0x1ff4 - Component Identification 1"]
158 #[inline(always)]
159 pub const fn cid1(&self) -> &Cid1 {
160 &self.cid1
161 }
162 #[doc = "0x1ff8 - Component Identification 2"]
163 #[inline(always)]
164 pub const fn cid2(&self) -> &Cid2 {
165 &self.cid2
166 }
167 #[doc = "0x1ffc - Component Identification 3"]
168 #[inline(always)]
169 pub const fn cid3(&self) -> &Cid3 {
170 &self.cid3
171 }
172}
173#[doc = "CTRL (w) register accessor: Control\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
174module"]
175#[doc(alias = "CTRL")]
176pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
177#[doc = "Control"]
178pub mod ctrl;
179#[doc = "STATUSA (rw) register accessor: Status A\n\nYou can [`read`](crate::Reg::read) this register and get [`statusa::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`statusa::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusa`]
180module"]
181#[doc(alias = "STATUSA")]
182pub type Statusa = crate::Reg<statusa::StatusaSpec>;
183#[doc = "Status A"]
184pub mod statusa;
185#[doc = "STATUSB (r) register accessor: Status B\n\nYou can [`read`](crate::Reg::read) this register and get [`statusb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusb`]
186module"]
187#[doc(alias = "STATUSB")]
188pub type Statusb = crate::Reg<statusb::StatusbSpec>;
189#[doc = "Status B"]
190pub mod statusb;
191#[doc = "ADDR (rw) register accessor: Address\n\nYou can [`read`](crate::Reg::read) this register and get [`addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`]
192module"]
193#[doc(alias = "ADDR")]
194pub type Addr = crate::Reg<addr::AddrSpec>;
195#[doc = "Address"]
196pub mod addr;
197#[doc = "LENGTH (rw) register accessor: Length\n\nYou can [`read`](crate::Reg::read) this register and get [`length::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`length::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@length`]
198module"]
199#[doc(alias = "LENGTH")]
200pub type Length = crate::Reg<length::LengthSpec>;
201#[doc = "Length"]
202pub mod length;
203#[doc = "DATA (rw) register accessor: Data\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
204module"]
205#[doc(alias = "DATA")]
206pub type Data = crate::Reg<data::DataSpec>;
207#[doc = "Data"]
208pub mod data;
209#[doc = "DCC (rw) register accessor: Debug Communication Channel n\n\nYou can [`read`](crate::Reg::read) this register and get [`dcc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcc`]
210module"]
211#[doc(alias = "DCC")]
212pub type Dcc = crate::Reg<dcc::DccSpec>;
213#[doc = "Debug Communication Channel n"]
214pub mod dcc;
215#[doc = "DID (r) register accessor: Device Identification\n\nYou can [`read`](crate::Reg::read) this register and get [`did::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@did`]
216module"]
217#[doc(alias = "DID")]
218pub type Did = crate::Reg<did::DidSpec>;
219#[doc = "Device Identification"]
220pub mod did;
221#[doc = "DCFG (rw) register accessor: Device Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`]
222module"]
223#[doc(alias = "DCFG")]
224pub type Dcfg = crate::Reg<dcfg::DcfgSpec>;
225#[doc = "Device Configuration"]
226pub mod dcfg;
227#[doc = "ENTRY0 (r) register accessor: CoreSight ROM Table Entry 0\n\nYou can [`read`](crate::Reg::read) this register and get [`entry0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@entry0`]
228module"]
229#[doc(alias = "ENTRY0")]
230pub type Entry0 = crate::Reg<entry0::Entry0Spec>;
231#[doc = "CoreSight ROM Table Entry 0"]
232pub mod entry0;
233#[doc = "ENTRY1 (r) register accessor: CoreSight ROM Table Entry 1\n\nYou can [`read`](crate::Reg::read) this register and get [`entry1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@entry1`]
234module"]
235#[doc(alias = "ENTRY1")]
236pub type Entry1 = crate::Reg<entry1::Entry1Spec>;
237#[doc = "CoreSight ROM Table Entry 1"]
238pub mod entry1;
239#[doc = "END (r) register accessor: CoreSight ROM Table End\n\nYou can [`read`](crate::Reg::read) this register and get [`end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@end`]
240module"]
241#[doc(alias = "END")]
242pub type End = crate::Reg<end::EndSpec>;
243#[doc = "CoreSight ROM Table End"]
244pub mod end;
245#[doc = "MEMTYPE (r) register accessor: CoreSight ROM Table Memory Type\n\nYou can [`read`](crate::Reg::read) this register and get [`memtype::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@memtype`]
246module"]
247#[doc(alias = "MEMTYPE")]
248pub type Memtype = crate::Reg<memtype::MemtypeSpec>;
249#[doc = "CoreSight ROM Table Memory Type"]
250pub mod memtype;
251#[doc = "PID4 (r) register accessor: Peripheral Identification 4\n\nYou can [`read`](crate::Reg::read) this register and get [`pid4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid4`]
252module"]
253#[doc(alias = "PID4")]
254pub type Pid4 = crate::Reg<pid4::Pid4Spec>;
255#[doc = "Peripheral Identification 4"]
256pub mod pid4;
257#[doc = "PID5 (r) register accessor: Peripheral Identification 5\n\nYou can [`read`](crate::Reg::read) this register and get [`pid5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid5`]
258module"]
259#[doc(alias = "PID5")]
260pub type Pid5 = crate::Reg<pid5::Pid5Spec>;
261#[doc = "Peripheral Identification 5"]
262pub mod pid5;
263#[doc = "PID6 (r) register accessor: Peripheral Identification 6\n\nYou can [`read`](crate::Reg::read) this register and get [`pid6::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid6`]
264module"]
265#[doc(alias = "PID6")]
266pub type Pid6 = crate::Reg<pid6::Pid6Spec>;
267#[doc = "Peripheral Identification 6"]
268pub mod pid6;
269#[doc = "PID7 (r) register accessor: Peripheral Identification 7\n\nYou can [`read`](crate::Reg::read) this register and get [`pid7::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid7`]
270module"]
271#[doc(alias = "PID7")]
272pub type Pid7 = crate::Reg<pid7::Pid7Spec>;
273#[doc = "Peripheral Identification 7"]
274pub mod pid7;
275#[doc = "PID0 (r) register accessor: Peripheral Identification 0\n\nYou can [`read`](crate::Reg::read) this register and get [`pid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid0`]
276module"]
277#[doc(alias = "PID0")]
278pub type Pid0 = crate::Reg<pid0::Pid0Spec>;
279#[doc = "Peripheral Identification 0"]
280pub mod pid0;
281#[doc = "PID1 (r) register accessor: Peripheral Identification 1\n\nYou can [`read`](crate::Reg::read) this register and get [`pid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid1`]
282module"]
283#[doc(alias = "PID1")]
284pub type Pid1 = crate::Reg<pid1::Pid1Spec>;
285#[doc = "Peripheral Identification 1"]
286pub mod pid1;
287#[doc = "PID2 (r) register accessor: Peripheral Identification 2\n\nYou can [`read`](crate::Reg::read) this register and get [`pid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid2`]
288module"]
289#[doc(alias = "PID2")]
290pub type Pid2 = crate::Reg<pid2::Pid2Spec>;
291#[doc = "Peripheral Identification 2"]
292pub mod pid2;
293#[doc = "PID3 (r) register accessor: Peripheral Identification 3\n\nYou can [`read`](crate::Reg::read) this register and get [`pid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid3`]
294module"]
295#[doc(alias = "PID3")]
296pub type Pid3 = crate::Reg<pid3::Pid3Spec>;
297#[doc = "Peripheral Identification 3"]
298pub mod pid3;
299#[doc = "CID0 (r) register accessor: Component Identification 0\n\nYou can [`read`](crate::Reg::read) this register and get [`cid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid0`]
300module"]
301#[doc(alias = "CID0")]
302pub type Cid0 = crate::Reg<cid0::Cid0Spec>;
303#[doc = "Component Identification 0"]
304pub mod cid0;
305#[doc = "CID1 (r) register accessor: Component Identification 1\n\nYou can [`read`](crate::Reg::read) this register and get [`cid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid1`]
306module"]
307#[doc(alias = "CID1")]
308pub type Cid1 = crate::Reg<cid1::Cid1Spec>;
309#[doc = "Component Identification 1"]
310pub mod cid1;
311#[doc = "CID2 (r) register accessor: Component Identification 2\n\nYou can [`read`](crate::Reg::read) this register and get [`cid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid2`]
312module"]
313#[doc(alias = "CID2")]
314pub type Cid2 = crate::Reg<cid2::Cid2Spec>;
315#[doc = "Component Identification 2"]
316pub mod cid2;
317#[doc = "CID3 (r) register accessor: Component Identification 3\n\nYou can [`read`](crate::Reg::read) this register and get [`cid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid3`]
318module"]
319#[doc(alias = "CID3")]
320pub type Cid3 = crate::Reg<cid3::Cid3Spec>;
321#[doc = "Component Identification 3"]
322pub mod cid3;