atsamd11c/sercom0/i2cs/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub type R = crate::R<StatusSpec>;
3#[doc = "Register `STATUS` writer"]
4pub type W = crate::W<StatusSpec>;
5#[doc = "Field `BUSERR` reader - Bus Error"]
6pub type BuserrR = crate::BitReader;
7#[doc = "Field `BUSERR` writer - Bus Error"]
8pub type BuserrW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `COLL` reader - Transmit Collision"]
10pub type CollR = crate::BitReader;
11#[doc = "Field `COLL` writer - Transmit Collision"]
12pub type CollW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `RXNACK` reader - Received Not Acknowledge"]
14pub type RxnackR = crate::BitReader;
15#[doc = "Field `DIR` reader - Read/Write Direction"]
16pub type DirR = crate::BitReader;
17#[doc = "Field `SR` reader - Repeated Start"]
18pub type SrR = crate::BitReader;
19#[doc = "Field `LOWTOUT` reader - SCL Low Timeout"]
20pub type LowtoutR = crate::BitReader;
21#[doc = "Field `LOWTOUT` writer - SCL Low Timeout"]
22pub type LowtoutW<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `CLKHOLD` reader - Clock Hold"]
24pub type ClkholdR = crate::BitReader;
25#[doc = "Field `SEXTTOUT` reader - Slave SCL Low Extend Timeout"]
26pub type SexttoutR = crate::BitReader;
27#[doc = "Field `SEXTTOUT` writer - Slave SCL Low Extend Timeout"]
28pub type SexttoutW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `HS` reader - High Speed"]
30pub type HsR = crate::BitReader;
31#[doc = "Field `HS` writer - High Speed"]
32pub type HsW<'a, REG> = crate::BitWriter<'a, REG>;
33impl R {
34    #[doc = "Bit 0 - Bus Error"]
35    #[inline(always)]
36    pub fn buserr(&self) -> BuserrR {
37        BuserrR::new((self.bits & 1) != 0)
38    }
39    #[doc = "Bit 1 - Transmit Collision"]
40    #[inline(always)]
41    pub fn coll(&self) -> CollR {
42        CollR::new(((self.bits >> 1) & 1) != 0)
43    }
44    #[doc = "Bit 2 - Received Not Acknowledge"]
45    #[inline(always)]
46    pub fn rxnack(&self) -> RxnackR {
47        RxnackR::new(((self.bits >> 2) & 1) != 0)
48    }
49    #[doc = "Bit 3 - Read/Write Direction"]
50    #[inline(always)]
51    pub fn dir(&self) -> DirR {
52        DirR::new(((self.bits >> 3) & 1) != 0)
53    }
54    #[doc = "Bit 4 - Repeated Start"]
55    #[inline(always)]
56    pub fn sr(&self) -> SrR {
57        SrR::new(((self.bits >> 4) & 1) != 0)
58    }
59    #[doc = "Bit 6 - SCL Low Timeout"]
60    #[inline(always)]
61    pub fn lowtout(&self) -> LowtoutR {
62        LowtoutR::new(((self.bits >> 6) & 1) != 0)
63    }
64    #[doc = "Bit 7 - Clock Hold"]
65    #[inline(always)]
66    pub fn clkhold(&self) -> ClkholdR {
67        ClkholdR::new(((self.bits >> 7) & 1) != 0)
68    }
69    #[doc = "Bit 9 - Slave SCL Low Extend Timeout"]
70    #[inline(always)]
71    pub fn sexttout(&self) -> SexttoutR {
72        SexttoutR::new(((self.bits >> 9) & 1) != 0)
73    }
74    #[doc = "Bit 10 - High Speed"]
75    #[inline(always)]
76    pub fn hs(&self) -> HsR {
77        HsR::new(((self.bits >> 10) & 1) != 0)
78    }
79}
80impl W {
81    #[doc = "Bit 0 - Bus Error"]
82    #[inline(always)]
83    #[must_use]
84    pub fn buserr(&mut self) -> BuserrW<StatusSpec> {
85        BuserrW::new(self, 0)
86    }
87    #[doc = "Bit 1 - Transmit Collision"]
88    #[inline(always)]
89    #[must_use]
90    pub fn coll(&mut self) -> CollW<StatusSpec> {
91        CollW::new(self, 1)
92    }
93    #[doc = "Bit 6 - SCL Low Timeout"]
94    #[inline(always)]
95    #[must_use]
96    pub fn lowtout(&mut self) -> LowtoutW<StatusSpec> {
97        LowtoutW::new(self, 6)
98    }
99    #[doc = "Bit 9 - Slave SCL Low Extend Timeout"]
100    #[inline(always)]
101    #[must_use]
102    pub fn sexttout(&mut self) -> SexttoutW<StatusSpec> {
103        SexttoutW::new(self, 9)
104    }
105    #[doc = "Bit 10 - High Speed"]
106    #[inline(always)]
107    #[must_use]
108    pub fn hs(&mut self) -> HsW<StatusSpec> {
109        HsW::new(self, 10)
110    }
111}
112#[doc = "I2CS Status\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`status::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
113pub struct StatusSpec;
114impl crate::RegisterSpec for StatusSpec {
115    type Ux = u16;
116}
117#[doc = "`read()` method returns [`status::R`](R) reader structure"]
118impl crate::Readable for StatusSpec {}
119#[doc = "`write(|w| ..)` method takes [`status::W`](W) writer structure"]
120impl crate::Writable for StatusSpec {
121    type Safety = crate::Unsafe;
122    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
123    const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
124}
125#[doc = "`reset()` method sets STATUS to value 0"]
126impl crate::Resettable for StatusSpec {
127    const RESET_VALUE: u16 = 0;
128}
atsamd11c/sercom0/i2cs/status.rs

atsamd11c/sercom0/i2cs/
status.rs
