atsamd11c/nvmctrl/
ctrlb.rs

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1#[doc = "Register `CTRLB` reader"]
2pub type R = crate::R<CtrlbSpec>;
3#[doc = "Register `CTRLB` writer"]
4pub type W = crate::W<CtrlbSpec>;
5#[doc = "NVM Read Wait States\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Rwsselect {
9    #[doc = "0: Single Auto Wait State"]
10    Single = 0,
11    #[doc = "1: Half Auto Wait State"]
12    Half = 1,
13    #[doc = "2: Dual Auto Wait State"]
14    Dual = 2,
15}
16impl From<Rwsselect> for u8 {
17    #[inline(always)]
18    fn from(variant: Rwsselect) -> Self {
19        variant as _
20    }
21}
22impl crate::FieldSpec for Rwsselect {
23    type Ux = u8;
24}
25impl crate::IsEnum for Rwsselect {}
26#[doc = "Field `RWS` reader - NVM Read Wait States"]
27pub type RwsR = crate::FieldReader<Rwsselect>;
28impl RwsR {
29    #[doc = "Get enumerated values variant"]
30    #[inline(always)]
31    pub const fn variant(&self) -> Option<Rwsselect> {
32        match self.bits {
33            0 => Some(Rwsselect::Single),
34            1 => Some(Rwsselect::Half),
35            2 => Some(Rwsselect::Dual),
36            _ => None,
37        }
38    }
39    #[doc = "Single Auto Wait State"]
40    #[inline(always)]
41    pub fn is_single(&self) -> bool {
42        *self == Rwsselect::Single
43    }
44    #[doc = "Half Auto Wait State"]
45    #[inline(always)]
46    pub fn is_half(&self) -> bool {
47        *self == Rwsselect::Half
48    }
49    #[doc = "Dual Auto Wait State"]
50    #[inline(always)]
51    pub fn is_dual(&self) -> bool {
52        *self == Rwsselect::Dual
53    }
54}
55#[doc = "Field `RWS` writer - NVM Read Wait States"]
56pub type RwsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rwsselect>;
57impl<'a, REG> RwsW<'a, REG>
58where
59    REG: crate::Writable + crate::RegisterSpec,
60    REG::Ux: From<u8>,
61{
62    #[doc = "Single Auto Wait State"]
63    #[inline(always)]
64    pub fn single(self) -> &'a mut crate::W<REG> {
65        self.variant(Rwsselect::Single)
66    }
67    #[doc = "Half Auto Wait State"]
68    #[inline(always)]
69    pub fn half(self) -> &'a mut crate::W<REG> {
70        self.variant(Rwsselect::Half)
71    }
72    #[doc = "Dual Auto Wait State"]
73    #[inline(always)]
74    pub fn dual(self) -> &'a mut crate::W<REG> {
75        self.variant(Rwsselect::Dual)
76    }
77}
78#[doc = "Field `MANW` reader - Manual Write"]
79pub type ManwR = crate::BitReader;
80#[doc = "Field `MANW` writer - Manual Write"]
81pub type ManwW<'a, REG> = crate::BitWriter<'a, REG>;
82#[doc = "Power Reduction Mode during Sleep\n\nValue on reset: 0"]
83#[derive(Clone, Copy, Debug, PartialEq, Eq)]
84#[repr(u8)]
85pub enum Sleepprmselect {
86    #[doc = "0: NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access."]
87    Wakeonaccess = 0,
88    #[doc = "1: NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep."]
89    Wakeupinstant = 1,
90    #[doc = "3: Auto power reduction disabled."]
91    Disabled = 3,
92}
93impl From<Sleepprmselect> for u8 {
94    #[inline(always)]
95    fn from(variant: Sleepprmselect) -> Self {
96        variant as _
97    }
98}
99impl crate::FieldSpec for Sleepprmselect {
100    type Ux = u8;
101}
102impl crate::IsEnum for Sleepprmselect {}
103#[doc = "Field `SLEEPPRM` reader - Power Reduction Mode during Sleep"]
104pub type SleepprmR = crate::FieldReader<Sleepprmselect>;
105impl SleepprmR {
106    #[doc = "Get enumerated values variant"]
107    #[inline(always)]
108    pub const fn variant(&self) -> Option<Sleepprmselect> {
109        match self.bits {
110            0 => Some(Sleepprmselect::Wakeonaccess),
111            1 => Some(Sleepprmselect::Wakeupinstant),
112            3 => Some(Sleepprmselect::Disabled),
113            _ => None,
114        }
115    }
116    #[doc = "NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access."]
117    #[inline(always)]
118    pub fn is_wakeonaccess(&self) -> bool {
119        *self == Sleepprmselect::Wakeonaccess
120    }
121    #[doc = "NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep."]
122    #[inline(always)]
123    pub fn is_wakeupinstant(&self) -> bool {
124        *self == Sleepprmselect::Wakeupinstant
125    }
126    #[doc = "Auto power reduction disabled."]
127    #[inline(always)]
128    pub fn is_disabled(&self) -> bool {
129        *self == Sleepprmselect::Disabled
130    }
131}
132#[doc = "Field `SLEEPPRM` writer - Power Reduction Mode during Sleep"]
133pub type SleepprmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sleepprmselect>;
134impl<'a, REG> SleepprmW<'a, REG>
135where
136    REG: crate::Writable + crate::RegisterSpec,
137    REG::Ux: From<u8>,
138{
139    #[doc = "NVM block enters low-power mode when entering sleep.NVM block exits low-power mode upon first access."]
140    #[inline(always)]
141    pub fn wakeonaccess(self) -> &'a mut crate::W<REG> {
142        self.variant(Sleepprmselect::Wakeonaccess)
143    }
144    #[doc = "NVM block enters low-power mode when entering sleep.NVM block exits low-power mode when exiting sleep."]
145    #[inline(always)]
146    pub fn wakeupinstant(self) -> &'a mut crate::W<REG> {
147        self.variant(Sleepprmselect::Wakeupinstant)
148    }
149    #[doc = "Auto power reduction disabled."]
150    #[inline(always)]
151    pub fn disabled(self) -> &'a mut crate::W<REG> {
152        self.variant(Sleepprmselect::Disabled)
153    }
154}
155#[doc = "NVMCTRL Read Mode\n\nValue on reset: 0"]
156#[derive(Clone, Copy, Debug, PartialEq, Eq)]
157#[repr(u8)]
158pub enum Readmodeselect {
159    #[doc = "0: The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance."]
160    NoMissPenalty = 0,
161    #[doc = "1: Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time."]
162    LowPower = 1,
163    #[doc = "2: The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings."]
164    Deterministic = 2,
165}
166impl From<Readmodeselect> for u8 {
167    #[inline(always)]
168    fn from(variant: Readmodeselect) -> Self {
169        variant as _
170    }
171}
172impl crate::FieldSpec for Readmodeselect {
173    type Ux = u8;
174}
175impl crate::IsEnum for Readmodeselect {}
176#[doc = "Field `READMODE` reader - NVMCTRL Read Mode"]
177pub type ReadmodeR = crate::FieldReader<Readmodeselect>;
178impl ReadmodeR {
179    #[doc = "Get enumerated values variant"]
180    #[inline(always)]
181    pub const fn variant(&self) -> Option<Readmodeselect> {
182        match self.bits {
183            0 => Some(Readmodeselect::NoMissPenalty),
184            1 => Some(Readmodeselect::LowPower),
185            2 => Some(Readmodeselect::Deterministic),
186            _ => None,
187        }
188    }
189    #[doc = "The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance."]
190    #[inline(always)]
191    pub fn is_no_miss_penalty(&self) -> bool {
192        *self == Readmodeselect::NoMissPenalty
193    }
194    #[doc = "Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time."]
195    #[inline(always)]
196    pub fn is_low_power(&self) -> bool {
197        *self == Readmodeselect::LowPower
198    }
199    #[doc = "The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings."]
200    #[inline(always)]
201    pub fn is_deterministic(&self) -> bool {
202        *self == Readmodeselect::Deterministic
203    }
204}
205#[doc = "Field `READMODE` writer - NVMCTRL Read Mode"]
206pub type ReadmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Readmodeselect>;
207impl<'a, REG> ReadmodeW<'a, REG>
208where
209    REG: crate::Writable + crate::RegisterSpec,
210    REG::Ux: From<u8>,
211{
212    #[doc = "The NVM Controller (cache system) does not insert wait states on a cache miss. Gives the best system performance."]
213    #[inline(always)]
214    pub fn no_miss_penalty(self) -> &'a mut crate::W<REG> {
215        self.variant(Readmodeselect::NoMissPenalty)
216    }
217    #[doc = "Reduces power consumption of the cache system, but inserts a wait state each time there is a cache miss. This mode may not be relevant if CPU performance is required, as the application will be stalled and may lead to increase run time."]
218    #[inline(always)]
219    pub fn low_power(self) -> &'a mut crate::W<REG> {
220        self.variant(Readmodeselect::LowPower)
221    }
222    #[doc = "The cache system ensures that a cache hit or miss takes the same amount of time, determined by the number of programmed flash wait states. This mode can be used for real-time applications that require deterministic execution timings."]
223    #[inline(always)]
224    pub fn deterministic(self) -> &'a mut crate::W<REG> {
225        self.variant(Readmodeselect::Deterministic)
226    }
227}
228#[doc = "Field `CACHEDIS` reader - Cache Disable"]
229pub type CachedisR = crate::BitReader;
230#[doc = "Field `CACHEDIS` writer - Cache Disable"]
231pub type CachedisW<'a, REG> = crate::BitWriter<'a, REG>;
232impl R {
233    #[doc = "Bits 1:4 - NVM Read Wait States"]
234    #[inline(always)]
235    pub fn rws(&self) -> RwsR {
236        RwsR::new(((self.bits >> 1) & 0x0f) as u8)
237    }
238    #[doc = "Bit 7 - Manual Write"]
239    #[inline(always)]
240    pub fn manw(&self) -> ManwR {
241        ManwR::new(((self.bits >> 7) & 1) != 0)
242    }
243    #[doc = "Bits 8:9 - Power Reduction Mode during Sleep"]
244    #[inline(always)]
245    pub fn sleepprm(&self) -> SleepprmR {
246        SleepprmR::new(((self.bits >> 8) & 3) as u8)
247    }
248    #[doc = "Bits 16:17 - NVMCTRL Read Mode"]
249    #[inline(always)]
250    pub fn readmode(&self) -> ReadmodeR {
251        ReadmodeR::new(((self.bits >> 16) & 3) as u8)
252    }
253    #[doc = "Bit 18 - Cache Disable"]
254    #[inline(always)]
255    pub fn cachedis(&self) -> CachedisR {
256        CachedisR::new(((self.bits >> 18) & 1) != 0)
257    }
258}
259impl W {
260    #[doc = "Bits 1:4 - NVM Read Wait States"]
261    #[inline(always)]
262    #[must_use]
263    pub fn rws(&mut self) -> RwsW<CtrlbSpec> {
264        RwsW::new(self, 1)
265    }
266    #[doc = "Bit 7 - Manual Write"]
267    #[inline(always)]
268    #[must_use]
269    pub fn manw(&mut self) -> ManwW<CtrlbSpec> {
270        ManwW::new(self, 7)
271    }
272    #[doc = "Bits 8:9 - Power Reduction Mode during Sleep"]
273    #[inline(always)]
274    #[must_use]
275    pub fn sleepprm(&mut self) -> SleepprmW<CtrlbSpec> {
276        SleepprmW::new(self, 8)
277    }
278    #[doc = "Bits 16:17 - NVMCTRL Read Mode"]
279    #[inline(always)]
280    #[must_use]
281    pub fn readmode(&mut self) -> ReadmodeW<CtrlbSpec> {
282        ReadmodeW::new(self, 16)
283    }
284    #[doc = "Bit 18 - Cache Disable"]
285    #[inline(always)]
286    #[must_use]
287    pub fn cachedis(&mut self) -> CachedisW<CtrlbSpec> {
288        CachedisW::new(self, 18)
289    }
290}
291#[doc = "Control B\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
292pub struct CtrlbSpec;
293impl crate::RegisterSpec for CtrlbSpec {
294    type Ux = u32;
295}
296#[doc = "`read()` method returns [`ctrlb::R`](R) reader structure"]
297impl crate::Readable for CtrlbSpec {}
298#[doc = "`write(|w| ..)` method takes [`ctrlb::W`](W) writer structure"]
299impl crate::Writable for CtrlbSpec {
300    type Safety = crate::Unsafe;
301    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
302    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
303}
304#[doc = "`reset()` method sets CTRLB to value 0"]
305impl crate::Resettable for CtrlbSpec {
306    const RESET_VALUE: u32 = 0;
307}
atsamd11c/nvmctrl/ctrlb.rs

atsamd11c/nvmctrl/
ctrlb.rs
