atsamd11c/evsys/
channel.rs

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1#[doc = "Register `CHANNEL` reader"]
2pub type R = crate::R<ChannelSpec>;
3#[doc = "Register `CHANNEL` writer"]
4pub type W = crate::W<ChannelSpec>;
5#[doc = "Field `CHANNEL` reader - Channel Selection"]
6pub type ChannelR = crate::FieldReader;
7#[doc = "Field `CHANNEL` writer - Channel Selection"]
8pub type ChannelW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `SWEVT` reader - Software Event"]
10pub type SwevtR = crate::BitReader;
11#[doc = "Field `SWEVT` writer - Software Event"]
12pub type SwevtW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `EVGEN` reader - Event Generator Selection"]
14pub type EvgenR = crate::FieldReader;
15#[doc = "Field `EVGEN` writer - Event Generator Selection"]
16pub type EvgenW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
17#[doc = "Path Selection\n\nValue on reset: 0"]
18#[derive(Clone, Copy, Debug, PartialEq, Eq)]
19#[repr(u8)]
20pub enum Pathselect {
21    #[doc = "0: Synchronous path"]
22    Synchronous = 0,
23    #[doc = "1: Resynchronized path"]
24    Resynchronized = 1,
25    #[doc = "2: Asynchronous path"]
26    Asynchronous = 2,
27}
28impl From<Pathselect> for u8 {
29    #[inline(always)]
30    fn from(variant: Pathselect) -> Self {
31        variant as _
32    }
33}
34impl crate::FieldSpec for Pathselect {
35    type Ux = u8;
36}
37impl crate::IsEnum for Pathselect {}
38#[doc = "Field `PATH` reader - Path Selection"]
39pub type PathR = crate::FieldReader<Pathselect>;
40impl PathR {
41    #[doc = "Get enumerated values variant"]
42    #[inline(always)]
43    pub const fn variant(&self) -> Option<Pathselect> {
44        match self.bits {
45            0 => Some(Pathselect::Synchronous),
46            1 => Some(Pathselect::Resynchronized),
47            2 => Some(Pathselect::Asynchronous),
48            _ => None,
49        }
50    }
51    #[doc = "Synchronous path"]
52    #[inline(always)]
53    pub fn is_synchronous(&self) -> bool {
54        *self == Pathselect::Synchronous
55    }
56    #[doc = "Resynchronized path"]
57    #[inline(always)]
58    pub fn is_resynchronized(&self) -> bool {
59        *self == Pathselect::Resynchronized
60    }
61    #[doc = "Asynchronous path"]
62    #[inline(always)]
63    pub fn is_asynchronous(&self) -> bool {
64        *self == Pathselect::Asynchronous
65    }
66}
67#[doc = "Field `PATH` writer - Path Selection"]
68pub type PathW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pathselect>;
69impl<'a, REG> PathW<'a, REG>
70where
71    REG: crate::Writable + crate::RegisterSpec,
72    REG::Ux: From<u8>,
73{
74    #[doc = "Synchronous path"]
75    #[inline(always)]
76    pub fn synchronous(self) -> &'a mut crate::W<REG> {
77        self.variant(Pathselect::Synchronous)
78    }
79    #[doc = "Resynchronized path"]
80    #[inline(always)]
81    pub fn resynchronized(self) -> &'a mut crate::W<REG> {
82        self.variant(Pathselect::Resynchronized)
83    }
84    #[doc = "Asynchronous path"]
85    #[inline(always)]
86    pub fn asynchronous(self) -> &'a mut crate::W<REG> {
87        self.variant(Pathselect::Asynchronous)
88    }
89}
90#[doc = "Edge Detection Selection\n\nValue on reset: 0"]
91#[derive(Clone, Copy, Debug, PartialEq, Eq)]
92#[repr(u8)]
93pub enum Edgselselect {
94    #[doc = "0: No event output when using the resynchronized or synchronous path"]
95    NoEvtOutput = 0,
96    #[doc = "1: Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path"]
97    RisingEdge = 1,
98    #[doc = "2: Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path"]
99    FallingEdge = 2,
100    #[doc = "3: Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path"]
101    BothEdges = 3,
102}
103impl From<Edgselselect> for u8 {
104    #[inline(always)]
105    fn from(variant: Edgselselect) -> Self {
106        variant as _
107    }
108}
109impl crate::FieldSpec for Edgselselect {
110    type Ux = u8;
111}
112impl crate::IsEnum for Edgselselect {}
113#[doc = "Field `EDGSEL` reader - Edge Detection Selection"]
114pub type EdgselR = crate::FieldReader<Edgselselect>;
115impl EdgselR {
116    #[doc = "Get enumerated values variant"]
117    #[inline(always)]
118    pub const fn variant(&self) -> Edgselselect {
119        match self.bits {
120            0 => Edgselselect::NoEvtOutput,
121            1 => Edgselselect::RisingEdge,
122            2 => Edgselselect::FallingEdge,
123            3 => Edgselselect::BothEdges,
124            _ => unreachable!(),
125        }
126    }
127    #[doc = "No event output when using the resynchronized or synchronous path"]
128    #[inline(always)]
129    pub fn is_no_evt_output(&self) -> bool {
130        *self == Edgselselect::NoEvtOutput
131    }
132    #[doc = "Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path"]
133    #[inline(always)]
134    pub fn is_rising_edge(&self) -> bool {
135        *self == Edgselselect::RisingEdge
136    }
137    #[doc = "Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path"]
138    #[inline(always)]
139    pub fn is_falling_edge(&self) -> bool {
140        *self == Edgselselect::FallingEdge
141    }
142    #[doc = "Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path"]
143    #[inline(always)]
144    pub fn is_both_edges(&self) -> bool {
145        *self == Edgselselect::BothEdges
146    }
147}
148#[doc = "Field `EDGSEL` writer - Edge Detection Selection"]
149pub type EdgselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Edgselselect, crate::Safe>;
150impl<'a, REG> EdgselW<'a, REG>
151where
152    REG: crate::Writable + crate::RegisterSpec,
153    REG::Ux: From<u8>,
154{
155    #[doc = "No event output when using the resynchronized or synchronous path"]
156    #[inline(always)]
157    pub fn no_evt_output(self) -> &'a mut crate::W<REG> {
158        self.variant(Edgselselect::NoEvtOutput)
159    }
160    #[doc = "Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path"]
161    #[inline(always)]
162    pub fn rising_edge(self) -> &'a mut crate::W<REG> {
163        self.variant(Edgselselect::RisingEdge)
164    }
165    #[doc = "Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path"]
166    #[inline(always)]
167    pub fn falling_edge(self) -> &'a mut crate::W<REG> {
168        self.variant(Edgselselect::FallingEdge)
169    }
170    #[doc = "Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path"]
171    #[inline(always)]
172    pub fn both_edges(self) -> &'a mut crate::W<REG> {
173        self.variant(Edgselselect::BothEdges)
174    }
175}
176impl R {
177    #[doc = "Bits 0:2 - Channel Selection"]
178    #[inline(always)]
179    pub fn channel(&self) -> ChannelR {
180        ChannelR::new((self.bits & 7) as u8)
181    }
182    #[doc = "Bit 8 - Software Event"]
183    #[inline(always)]
184    pub fn swevt(&self) -> SwevtR {
185        SwevtR::new(((self.bits >> 8) & 1) != 0)
186    }
187    #[doc = "Bits 16:21 - Event Generator Selection"]
188    #[inline(always)]
189    pub fn evgen(&self) -> EvgenR {
190        EvgenR::new(((self.bits >> 16) & 0x3f) as u8)
191    }
192    #[doc = "Bits 24:25 - Path Selection"]
193    #[inline(always)]
194    pub fn path(&self) -> PathR {
195        PathR::new(((self.bits >> 24) & 3) as u8)
196    }
197    #[doc = "Bits 26:27 - Edge Detection Selection"]
198    #[inline(always)]
199    pub fn edgsel(&self) -> EdgselR {
200        EdgselR::new(((self.bits >> 26) & 3) as u8)
201    }
202}
203impl W {
204    #[doc = "Bits 0:2 - Channel Selection"]
205    #[inline(always)]
206    #[must_use]
207    pub fn channel(&mut self) -> ChannelW<ChannelSpec> {
208        ChannelW::new(self, 0)
209    }
210    #[doc = "Bit 8 - Software Event"]
211    #[inline(always)]
212    #[must_use]
213    pub fn swevt(&mut self) -> SwevtW<ChannelSpec> {
214        SwevtW::new(self, 8)
215    }
216    #[doc = "Bits 16:21 - Event Generator Selection"]
217    #[inline(always)]
218    #[must_use]
219    pub fn evgen(&mut self) -> EvgenW<ChannelSpec> {
220        EvgenW::new(self, 16)
221    }
222    #[doc = "Bits 24:25 - Path Selection"]
223    #[inline(always)]
224    #[must_use]
225    pub fn path(&mut self) -> PathW<ChannelSpec> {
226        PathW::new(self, 24)
227    }
228    #[doc = "Bits 26:27 - Edge Detection Selection"]
229    #[inline(always)]
230    #[must_use]
231    pub fn edgsel(&mut self) -> EdgselW<ChannelSpec> {
232        EdgselW::new(self, 26)
233    }
234}
235#[doc = "Channel\n\nYou can [`read`](crate::Reg::read) this register and get [`channel::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`channel::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
236pub struct ChannelSpec;
237impl crate::RegisterSpec for ChannelSpec {
238    type Ux = u32;
239}
240#[doc = "`read()` method returns [`channel::R`](R) reader structure"]
241impl crate::Readable for ChannelSpec {}
242#[doc = "`write(|w| ..)` method takes [`channel::W`](W) writer structure"]
243impl crate::Writable for ChannelSpec {
244    type Safety = crate::Unsafe;
245    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
246    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
247}
248#[doc = "`reset()` method sets CHANNEL to value 0"]
249impl crate::Resettable for ChannelSpec {
250    const RESET_VALUE: u32 = 0;
251}
atsamd11c/evsys/channel.rs

atsamd11c/evsys/
channel.rs
