atsamd11c/dmac/
prictrl0.rs

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1#[doc = "Register `PRICTRL0` reader"]
2pub type R = crate::R<Prictrl0Spec>;
3#[doc = "Register `PRICTRL0` writer"]
4pub type W = crate::W<Prictrl0Spec>;
5#[doc = "Field `LVLPRI0` reader - Level 0 Channel Priority Number"]
6pub type Lvlpri0R = crate::FieldReader;
7#[doc = "Field `LVLPRI0` writer - Level 0 Channel Priority Number"]
8pub type Lvlpri0W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `RRLVLEN0` reader - Level 0 Round-Robin Scheduling Enable"]
10pub type Rrlvlen0R = crate::BitReader;
11#[doc = "Field `RRLVLEN0` writer - Level 0 Round-Robin Scheduling Enable"]
12pub type Rrlvlen0W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `LVLPRI1` reader - Level 1 Channel Priority Number"]
14pub type Lvlpri1R = crate::FieldReader;
15#[doc = "Field `LVLPRI1` writer - Level 1 Channel Priority Number"]
16pub type Lvlpri1W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
17#[doc = "Field `RRLVLEN1` reader - Level 1 Round-Robin Scheduling Enable"]
18pub type Rrlvlen1R = crate::BitReader;
19#[doc = "Field `RRLVLEN1` writer - Level 1 Round-Robin Scheduling Enable"]
20pub type Rrlvlen1W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `LVLPRI2` reader - Level 2 Channel Priority Number"]
22pub type Lvlpri2R = crate::FieldReader;
23#[doc = "Field `LVLPRI2` writer - Level 2 Channel Priority Number"]
24pub type Lvlpri2W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
25#[doc = "Field `RRLVLEN2` reader - Level 2 Round-Robin Scheduling Enable"]
26pub type Rrlvlen2R = crate::BitReader;
27#[doc = "Field `RRLVLEN2` writer - Level 2 Round-Robin Scheduling Enable"]
28pub type Rrlvlen2W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `LVLPRI3` reader - Level 3 Channel Priority Number"]
30pub type Lvlpri3R = crate::FieldReader;
31#[doc = "Field `LVLPRI3` writer - Level 3 Channel Priority Number"]
32pub type Lvlpri3W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
33#[doc = "Field `RRLVLEN3` reader - Level 3 Round-Robin Scheduling Enable"]
34pub type Rrlvlen3R = crate::BitReader;
35#[doc = "Field `RRLVLEN3` writer - Level 3 Round-Robin Scheduling Enable"]
36pub type Rrlvlen3W<'a, REG> = crate::BitWriter<'a, REG>;
37impl R {
38    #[doc = "Bits 0:2 - Level 0 Channel Priority Number"]
39    #[inline(always)]
40    pub fn lvlpri0(&self) -> Lvlpri0R {
41        Lvlpri0R::new((self.bits & 7) as u8)
42    }
43    #[doc = "Bit 7 - Level 0 Round-Robin Scheduling Enable"]
44    #[inline(always)]
45    pub fn rrlvlen0(&self) -> Rrlvlen0R {
46        Rrlvlen0R::new(((self.bits >> 7) & 1) != 0)
47    }
48    #[doc = "Bits 8:10 - Level 1 Channel Priority Number"]
49    #[inline(always)]
50    pub fn lvlpri1(&self) -> Lvlpri1R {
51        Lvlpri1R::new(((self.bits >> 8) & 7) as u8)
52    }
53    #[doc = "Bit 15 - Level 1 Round-Robin Scheduling Enable"]
54    #[inline(always)]
55    pub fn rrlvlen1(&self) -> Rrlvlen1R {
56        Rrlvlen1R::new(((self.bits >> 15) & 1) != 0)
57    }
58    #[doc = "Bits 16:18 - Level 2 Channel Priority Number"]
59    #[inline(always)]
60    pub fn lvlpri2(&self) -> Lvlpri2R {
61        Lvlpri2R::new(((self.bits >> 16) & 7) as u8)
62    }
63    #[doc = "Bit 23 - Level 2 Round-Robin Scheduling Enable"]
64    #[inline(always)]
65    pub fn rrlvlen2(&self) -> Rrlvlen2R {
66        Rrlvlen2R::new(((self.bits >> 23) & 1) != 0)
67    }
68    #[doc = "Bits 24:26 - Level 3 Channel Priority Number"]
69    #[inline(always)]
70    pub fn lvlpri3(&self) -> Lvlpri3R {
71        Lvlpri3R::new(((self.bits >> 24) & 7) as u8)
72    }
73    #[doc = "Bit 31 - Level 3 Round-Robin Scheduling Enable"]
74    #[inline(always)]
75    pub fn rrlvlen3(&self) -> Rrlvlen3R {
76        Rrlvlen3R::new(((self.bits >> 31) & 1) != 0)
77    }
78}
79impl W {
80    #[doc = "Bits 0:2 - Level 0 Channel Priority Number"]
81    #[inline(always)]
82    #[must_use]
83    pub fn lvlpri0(&mut self) -> Lvlpri0W<Prictrl0Spec> {
84        Lvlpri0W::new(self, 0)
85    }
86    #[doc = "Bit 7 - Level 0 Round-Robin Scheduling Enable"]
87    #[inline(always)]
88    #[must_use]
89    pub fn rrlvlen0(&mut self) -> Rrlvlen0W<Prictrl0Spec> {
90        Rrlvlen0W::new(self, 7)
91    }
92    #[doc = "Bits 8:10 - Level 1 Channel Priority Number"]
93    #[inline(always)]
94    #[must_use]
95    pub fn lvlpri1(&mut self) -> Lvlpri1W<Prictrl0Spec> {
96        Lvlpri1W::new(self, 8)
97    }
98    #[doc = "Bit 15 - Level 1 Round-Robin Scheduling Enable"]
99    #[inline(always)]
100    #[must_use]
101    pub fn rrlvlen1(&mut self) -> Rrlvlen1W<Prictrl0Spec> {
102        Rrlvlen1W::new(self, 15)
103    }
104    #[doc = "Bits 16:18 - Level 2 Channel Priority Number"]
105    #[inline(always)]
106    #[must_use]
107    pub fn lvlpri2(&mut self) -> Lvlpri2W<Prictrl0Spec> {
108        Lvlpri2W::new(self, 16)
109    }
110    #[doc = "Bit 23 - Level 2 Round-Robin Scheduling Enable"]
111    #[inline(always)]
112    #[must_use]
113    pub fn rrlvlen2(&mut self) -> Rrlvlen2W<Prictrl0Spec> {
114        Rrlvlen2W::new(self, 23)
115    }
116    #[doc = "Bits 24:26 - Level 3 Channel Priority Number"]
117    #[inline(always)]
118    #[must_use]
119    pub fn lvlpri3(&mut self) -> Lvlpri3W<Prictrl0Spec> {
120        Lvlpri3W::new(self, 24)
121    }
122    #[doc = "Bit 31 - Level 3 Round-Robin Scheduling Enable"]
123    #[inline(always)]
124    #[must_use]
125    pub fn rrlvlen3(&mut self) -> Rrlvlen3W<Prictrl0Spec> {
126        Rrlvlen3W::new(self, 31)
127    }
128}
129#[doc = "Priority Control 0\n\nYou can [`read`](crate::Reg::read) this register and get [`prictrl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prictrl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
130pub struct Prictrl0Spec;
131impl crate::RegisterSpec for Prictrl0Spec {
132    type Ux = u32;
133}
134#[doc = "`read()` method returns [`prictrl0::R`](R) reader structure"]
135impl crate::Readable for Prictrl0Spec {}
136#[doc = "`write(|w| ..)` method takes [`prictrl0::W`](W) writer structure"]
137impl crate::Writable for Prictrl0Spec {
138    type Safety = crate::Unsafe;
139    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
140    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
141}
142#[doc = "`reset()` method sets PRICTRL0 to value 0"]
143impl crate::Resettable for Prictrl0Spec {
144    const RESET_VALUE: u32 = 0;
145}
atsamd11c/dmac/prictrl0.rs

atsamd11c/dmac/
prictrl0.rs
