atsamd51n/gclk/
pchctrl.rs1#[doc = "Register `PCHCTRL[%s]` reader"]
2pub type R = crate::R<PchctrlSpec>;
3#[doc = "Register `PCHCTRL[%s]` writer"]
4pub type W = crate::W<PchctrlSpec>;
5#[doc = "Generic Clock Generator\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Genselect {
9 #[doc = "0: Generic clock generator 0"]
10 Gclk0 = 0,
11 #[doc = "1: Generic clock generator 1"]
12 Gclk1 = 1,
13 #[doc = "2: Generic clock generator 2"]
14 Gclk2 = 2,
15 #[doc = "3: Generic clock generator 3"]
16 Gclk3 = 3,
17 #[doc = "4: Generic clock generator 4"]
18 Gclk4 = 4,
19 #[doc = "5: Generic clock generator 5"]
20 Gclk5 = 5,
21 #[doc = "6: Generic clock generator 6"]
22 Gclk6 = 6,
23 #[doc = "7: Generic clock generator 7"]
24 Gclk7 = 7,
25 #[doc = "8: Generic clock generator 8"]
26 Gclk8 = 8,
27 #[doc = "9: Generic clock generator 9"]
28 Gclk9 = 9,
29 #[doc = "10: Generic clock generator 10"]
30 Gclk10 = 10,
31 #[doc = "11: Generic clock generator 11"]
32 Gclk11 = 11,
33}
34impl From<Genselect> for u8 {
35 #[inline(always)]
36 fn from(variant: Genselect) -> Self {
37 variant as _
38 }
39}
40impl crate::FieldSpec for Genselect {
41 type Ux = u8;
42}
43impl crate::IsEnum for Genselect {}
44#[doc = "Field `GEN` reader - Generic Clock Generator"]
45pub type GenR = crate::FieldReader<Genselect>;
46impl GenR {
47 #[doc = "Get enumerated values variant"]
48 #[inline(always)]
49 pub const fn variant(&self) -> Option<Genselect> {
50 match self.bits {
51 0 => Some(Genselect::Gclk0),
52 1 => Some(Genselect::Gclk1),
53 2 => Some(Genselect::Gclk2),
54 3 => Some(Genselect::Gclk3),
55 4 => Some(Genselect::Gclk4),
56 5 => Some(Genselect::Gclk5),
57 6 => Some(Genselect::Gclk6),
58 7 => Some(Genselect::Gclk7),
59 8 => Some(Genselect::Gclk8),
60 9 => Some(Genselect::Gclk9),
61 10 => Some(Genselect::Gclk10),
62 11 => Some(Genselect::Gclk11),
63 _ => None,
64 }
65 }
66 #[doc = "Generic clock generator 0"]
67 #[inline(always)]
68 pub fn is_gclk0(&self) -> bool {
69 *self == Genselect::Gclk0
70 }
71 #[doc = "Generic clock generator 1"]
72 #[inline(always)]
73 pub fn is_gclk1(&self) -> bool {
74 *self == Genselect::Gclk1
75 }
76 #[doc = "Generic clock generator 2"]
77 #[inline(always)]
78 pub fn is_gclk2(&self) -> bool {
79 *self == Genselect::Gclk2
80 }
81 #[doc = "Generic clock generator 3"]
82 #[inline(always)]
83 pub fn is_gclk3(&self) -> bool {
84 *self == Genselect::Gclk3
85 }
86 #[doc = "Generic clock generator 4"]
87 #[inline(always)]
88 pub fn is_gclk4(&self) -> bool {
89 *self == Genselect::Gclk4
90 }
91 #[doc = "Generic clock generator 5"]
92 #[inline(always)]
93 pub fn is_gclk5(&self) -> bool {
94 *self == Genselect::Gclk5
95 }
96 #[doc = "Generic clock generator 6"]
97 #[inline(always)]
98 pub fn is_gclk6(&self) -> bool {
99 *self == Genselect::Gclk6
100 }
101 #[doc = "Generic clock generator 7"]
102 #[inline(always)]
103 pub fn is_gclk7(&self) -> bool {
104 *self == Genselect::Gclk7
105 }
106 #[doc = "Generic clock generator 8"]
107 #[inline(always)]
108 pub fn is_gclk8(&self) -> bool {
109 *self == Genselect::Gclk8
110 }
111 #[doc = "Generic clock generator 9"]
112 #[inline(always)]
113 pub fn is_gclk9(&self) -> bool {
114 *self == Genselect::Gclk9
115 }
116 #[doc = "Generic clock generator 10"]
117 #[inline(always)]
118 pub fn is_gclk10(&self) -> bool {
119 *self == Genselect::Gclk10
120 }
121 #[doc = "Generic clock generator 11"]
122 #[inline(always)]
123 pub fn is_gclk11(&self) -> bool {
124 *self == Genselect::Gclk11
125 }
126}
127#[doc = "Field `GEN` writer - Generic Clock Generator"]
128pub type GenW<'a, REG> = crate::FieldWriter<'a, REG, 4, Genselect>;
129impl<'a, REG> GenW<'a, REG>
130where
131 REG: crate::Writable + crate::RegisterSpec,
132 REG::Ux: From<u8>,
133{
134 #[doc = "Generic clock generator 0"]
135 #[inline(always)]
136 pub fn gclk0(self) -> &'a mut crate::W<REG> {
137 self.variant(Genselect::Gclk0)
138 }
139 #[doc = "Generic clock generator 1"]
140 #[inline(always)]
141 pub fn gclk1(self) -> &'a mut crate::W<REG> {
142 self.variant(Genselect::Gclk1)
143 }
144 #[doc = "Generic clock generator 2"]
145 #[inline(always)]
146 pub fn gclk2(self) -> &'a mut crate::W<REG> {
147 self.variant(Genselect::Gclk2)
148 }
149 #[doc = "Generic clock generator 3"]
150 #[inline(always)]
151 pub fn gclk3(self) -> &'a mut crate::W<REG> {
152 self.variant(Genselect::Gclk3)
153 }
154 #[doc = "Generic clock generator 4"]
155 #[inline(always)]
156 pub fn gclk4(self) -> &'a mut crate::W<REG> {
157 self.variant(Genselect::Gclk4)
158 }
159 #[doc = "Generic clock generator 5"]
160 #[inline(always)]
161 pub fn gclk5(self) -> &'a mut crate::W<REG> {
162 self.variant(Genselect::Gclk5)
163 }
164 #[doc = "Generic clock generator 6"]
165 #[inline(always)]
166 pub fn gclk6(self) -> &'a mut crate::W<REG> {
167 self.variant(Genselect::Gclk6)
168 }
169 #[doc = "Generic clock generator 7"]
170 #[inline(always)]
171 pub fn gclk7(self) -> &'a mut crate::W<REG> {
172 self.variant(Genselect::Gclk7)
173 }
174 #[doc = "Generic clock generator 8"]
175 #[inline(always)]
176 pub fn gclk8(self) -> &'a mut crate::W<REG> {
177 self.variant(Genselect::Gclk8)
178 }
179 #[doc = "Generic clock generator 9"]
180 #[inline(always)]
181 pub fn gclk9(self) -> &'a mut crate::W<REG> {
182 self.variant(Genselect::Gclk9)
183 }
184 #[doc = "Generic clock generator 10"]
185 #[inline(always)]
186 pub fn gclk10(self) -> &'a mut crate::W<REG> {
187 self.variant(Genselect::Gclk10)
188 }
189 #[doc = "Generic clock generator 11"]
190 #[inline(always)]
191 pub fn gclk11(self) -> &'a mut crate::W<REG> {
192 self.variant(Genselect::Gclk11)
193 }
194}
195#[doc = "Field `CHEN` reader - Channel Enable"]
196pub type ChenR = crate::BitReader;
197#[doc = "Field `CHEN` writer - Channel Enable"]
198pub type ChenW<'a, REG> = crate::BitWriter<'a, REG>;
199#[doc = "Field `WRTLOCK` reader - Write Lock"]
200pub type WrtlockR = crate::BitReader;
201#[doc = "Field `WRTLOCK` writer - Write Lock"]
202pub type WrtlockW<'a, REG> = crate::BitWriter<'a, REG>;
203impl R {
204 #[doc = "Bits 0:3 - Generic Clock Generator"]
205 #[inline(always)]
206 pub fn gen(&self) -> GenR {
207 GenR::new((self.bits & 0x0f) as u8)
208 }
209 #[doc = "Bit 6 - Channel Enable"]
210 #[inline(always)]
211 pub fn chen(&self) -> ChenR {
212 ChenR::new(((self.bits >> 6) & 1) != 0)
213 }
214 #[doc = "Bit 7 - Write Lock"]
215 #[inline(always)]
216 pub fn wrtlock(&self) -> WrtlockR {
217 WrtlockR::new(((self.bits >> 7) & 1) != 0)
218 }
219}
220impl W {
221 #[doc = "Bits 0:3 - Generic Clock Generator"]
222 #[inline(always)]
223 #[must_use]
224 pub fn gen(&mut self) -> GenW<PchctrlSpec> {
225 GenW::new(self, 0)
226 }
227 #[doc = "Bit 6 - Channel Enable"]
228 #[inline(always)]
229 #[must_use]
230 pub fn chen(&mut self) -> ChenW<PchctrlSpec> {
231 ChenW::new(self, 6)
232 }
233 #[doc = "Bit 7 - Write Lock"]
234 #[inline(always)]
235 #[must_use]
236 pub fn wrtlock(&mut self) -> WrtlockW<PchctrlSpec> {
237 WrtlockW::new(self, 7)
238 }
239}
240#[doc = "Peripheral Clock Control\n\nYou can [`read`](crate::Reg::read) this register and get [`pchctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pchctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
241pub struct PchctrlSpec;
242impl crate::RegisterSpec for PchctrlSpec {
243 type Ux = u32;
244}
245#[doc = "`read()` method returns [`pchctrl::R`](R) reader structure"]
246impl crate::Readable for PchctrlSpec {}
247#[doc = "`write(|w| ..)` method takes [`pchctrl::W`](W) writer structure"]
248impl crate::Writable for PchctrlSpec {
249 type Safety = crate::Unsafe;
250 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
251 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
252}
253#[doc = "`reset()` method sets PCHCTRL[%s]
254to value 0"]
255impl crate::Resettable for PchctrlSpec {
256 const RESET_VALUE: u32 = 0;
257}