1#[doc = "Register `PRESC` reader"]
2pub type R = crate::R<PrescSpec>;
3#[doc = "Register `PRESC` writer"]
4pub type W = crate::W<PrescSpec>;
5#[doc = "Prescaler Value\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Prescselect {
9 #[doc = "0: No division"]
10 Div1 = 0,
11 #[doc = "1: Divide by 2"]
12 Div2 = 1,
13 #[doc = "2: Divide by 4"]
14 Div4 = 2,
15 #[doc = "3: Divide by 8"]
16 Div8 = 3,
17 #[doc = "4: Divide by 16"]
18 Div16 = 4,
19 #[doc = "5: Divide by 32"]
20 Div32 = 5,
21 #[doc = "6: Divide by 64"]
22 Div64 = 6,
23 #[doc = "7: Divide by 128"]
24 Div128 = 7,
25 #[doc = "8: Divide by 256"]
26 Div256 = 8,
27 #[doc = "9: Divide by 512"]
28 Div512 = 9,
29 #[doc = "10: Divide by 1024"]
30 Div1024 = 10,
31}
32impl From<Prescselect> for u8 {
33 #[inline(always)]
34 fn from(variant: Prescselect) -> Self {
35 variant as _
36 }
37}
38impl crate::FieldSpec for Prescselect {
39 type Ux = u8;
40}
41impl crate::IsEnum for Prescselect {}
42#[doc = "Field `PRESC` reader - Prescaler Value"]
43pub type PrescR = crate::FieldReader<Prescselect>;
44impl PrescR {
45 #[doc = "Get enumerated values variant"]
46 #[inline(always)]
47 pub const fn variant(&self) -> Option<Prescselect> {
48 match self.bits {
49 0 => Some(Prescselect::Div1),
50 1 => Some(Prescselect::Div2),
51 2 => Some(Prescselect::Div4),
52 3 => Some(Prescselect::Div8),
53 4 => Some(Prescselect::Div16),
54 5 => Some(Prescselect::Div32),
55 6 => Some(Prescselect::Div64),
56 7 => Some(Prescselect::Div128),
57 8 => Some(Prescselect::Div256),
58 9 => Some(Prescselect::Div512),
59 10 => Some(Prescselect::Div1024),
60 _ => None,
61 }
62 }
63 #[doc = "No division"]
64 #[inline(always)]
65 pub fn is_div1(&self) -> bool {
66 *self == Prescselect::Div1
67 }
68 #[doc = "Divide by 2"]
69 #[inline(always)]
70 pub fn is_div2(&self) -> bool {
71 *self == Prescselect::Div2
72 }
73 #[doc = "Divide by 4"]
74 #[inline(always)]
75 pub fn is_div4(&self) -> bool {
76 *self == Prescselect::Div4
77 }
78 #[doc = "Divide by 8"]
79 #[inline(always)]
80 pub fn is_div8(&self) -> bool {
81 *self == Prescselect::Div8
82 }
83 #[doc = "Divide by 16"]
84 #[inline(always)]
85 pub fn is_div16(&self) -> bool {
86 *self == Prescselect::Div16
87 }
88 #[doc = "Divide by 32"]
89 #[inline(always)]
90 pub fn is_div32(&self) -> bool {
91 *self == Prescselect::Div32
92 }
93 #[doc = "Divide by 64"]
94 #[inline(always)]
95 pub fn is_div64(&self) -> bool {
96 *self == Prescselect::Div64
97 }
98 #[doc = "Divide by 128"]
99 #[inline(always)]
100 pub fn is_div128(&self) -> bool {
101 *self == Prescselect::Div128
102 }
103 #[doc = "Divide by 256"]
104 #[inline(always)]
105 pub fn is_div256(&self) -> bool {
106 *self == Prescselect::Div256
107 }
108 #[doc = "Divide by 512"]
109 #[inline(always)]
110 pub fn is_div512(&self) -> bool {
111 *self == Prescselect::Div512
112 }
113 #[doc = "Divide by 1024"]
114 #[inline(always)]
115 pub fn is_div1024(&self) -> bool {
116 *self == Prescselect::Div1024
117 }
118}
119#[doc = "Field `PRESC` writer - Prescaler Value"]
120pub type PrescW<'a, REG> = crate::FieldWriter<'a, REG, 4, Prescselect>;
121impl<'a, REG> PrescW<'a, REG>
122where
123 REG: crate::Writable + crate::RegisterSpec,
124 REG::Ux: From<u8>,
125{
126 #[doc = "No division"]
127 #[inline(always)]
128 pub fn div1(self) -> &'a mut crate::W<REG> {
129 self.variant(Prescselect::Div1)
130 }
131 #[doc = "Divide by 2"]
132 #[inline(always)]
133 pub fn div2(self) -> &'a mut crate::W<REG> {
134 self.variant(Prescselect::Div2)
135 }
136 #[doc = "Divide by 4"]
137 #[inline(always)]
138 pub fn div4(self) -> &'a mut crate::W<REG> {
139 self.variant(Prescselect::Div4)
140 }
141 #[doc = "Divide by 8"]
142 #[inline(always)]
143 pub fn div8(self) -> &'a mut crate::W<REG> {
144 self.variant(Prescselect::Div8)
145 }
146 #[doc = "Divide by 16"]
147 #[inline(always)]
148 pub fn div16(self) -> &'a mut crate::W<REG> {
149 self.variant(Prescselect::Div16)
150 }
151 #[doc = "Divide by 32"]
152 #[inline(always)]
153 pub fn div32(self) -> &'a mut crate::W<REG> {
154 self.variant(Prescselect::Div32)
155 }
156 #[doc = "Divide by 64"]
157 #[inline(always)]
158 pub fn div64(self) -> &'a mut crate::W<REG> {
159 self.variant(Prescselect::Div64)
160 }
161 #[doc = "Divide by 128"]
162 #[inline(always)]
163 pub fn div128(self) -> &'a mut crate::W<REG> {
164 self.variant(Prescselect::Div128)
165 }
166 #[doc = "Divide by 256"]
167 #[inline(always)]
168 pub fn div256(self) -> &'a mut crate::W<REG> {
169 self.variant(Prescselect::Div256)
170 }
171 #[doc = "Divide by 512"]
172 #[inline(always)]
173 pub fn div512(self) -> &'a mut crate::W<REG> {
174 self.variant(Prescselect::Div512)
175 }
176 #[doc = "Divide by 1024"]
177 #[inline(always)]
178 pub fn div1024(self) -> &'a mut crate::W<REG> {
179 self.variant(Prescselect::Div1024)
180 }
181}
182impl R {
183 #[doc = "Bits 0:3 - Prescaler Value"]
184 #[inline(always)]
185 pub fn presc(&self) -> PrescR {
186 PrescR::new(self.bits & 0x0f)
187 }
188}
189impl W {
190 #[doc = "Bits 0:3 - Prescaler Value"]
191 #[inline(always)]
192 #[must_use]
193 pub fn presc(&mut self) -> PrescW<PrescSpec> {
194 PrescW::new(self, 0)
195 }
196}
197#[doc = "Prescaler Value\n\nYou can [`read`](crate::Reg::read) this register and get [`presc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`presc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
198pub struct PrescSpec;
199impl crate::RegisterSpec for PrescSpec {
200 type Ux = u8;
201}
202#[doc = "`read()` method returns [`presc::R`](R) reader structure"]
203impl crate::Readable for PrescSpec {}
204#[doc = "`write(|w| ..)` method takes [`presc::W`](W) writer structure"]
205impl crate::Writable for PrescSpec {
206 type Safety = crate::Unsafe;
207 const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
208 const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
209}
210#[doc = "`reset()` method sets PRESC to value 0"]
211impl crate::Resettable for PrescSpec {
212 const RESET_VALUE: u8 = 0;
213}