atsamd51n/cmcc/
mctrl.rs

1#[doc = "Register `MCTRL` writer"]
2pub type W = crate::W<MctrlSpec>;
3#[doc = "Field `SWRST` writer - Cache Controller Software Reset"]
4pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>;
5impl W {
6    #[doc = "Bit 0 - Cache Controller Software Reset"]
7    #[inline(always)]
8    #[must_use]
9    pub fn swrst(&mut self) -> SwrstW<MctrlSpec> {
10        SwrstW::new(self, 0)
11    }
12}
13#[doc = "Cache Monitor Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mctrl::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
14pub struct MctrlSpec;
15impl crate::RegisterSpec for MctrlSpec {
16    type Ux = u32;
17}
18#[doc = "`write(|w| ..)` method takes [`mctrl::W`](W) writer structure"]
19impl crate::Writable for MctrlSpec {
20    type Safety = crate::Unsafe;
21    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
22    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
23}
24#[doc = "`reset()` method sets MCTRL to value 0"]
25impl crate::Resettable for MctrlSpec {
26    const RESET_VALUE: u32 = 0;
27}