atsamd51n/tcc0/
syncbusy.rs

1#[doc = "Register `SYNCBUSY` reader"]
2pub type R = crate::R<SyncbusySpec>;
3#[doc = "Field `SWRST` reader - Swrst Busy"]
4pub type SwrstR = crate::BitReader;
5#[doc = "Field `ENABLE` reader - Enable Busy"]
6pub type EnableR = crate::BitReader;
7#[doc = "Field `CTRLB` reader - Ctrlb Busy"]
8pub type CtrlbR = crate::BitReader;
9#[doc = "Field `STATUS` reader - Status Busy"]
10pub type StatusR = crate::BitReader;
11#[doc = "Field `COUNT` reader - Count Busy"]
12pub type CountR = crate::BitReader;
13#[doc = "Field `PATT` reader - Pattern Busy"]
14pub type PattR = crate::BitReader;
15#[doc = "Field `WAVE` reader - Wave Busy"]
16pub type WaveR = crate::BitReader;
17#[doc = "Field `PER` reader - Period Busy"]
18pub type PerR = crate::BitReader;
19#[doc = "Field `CC0` reader - Compare Channel 0 Busy"]
20pub type Cc0R = crate::BitReader;
21#[doc = "Field `CC1` reader - Compare Channel 1 Busy"]
22pub type Cc1R = crate::BitReader;
23#[doc = "Field `CC2` reader - Compare Channel 2 Busy"]
24pub type Cc2R = crate::BitReader;
25#[doc = "Field `CC3` reader - Compare Channel 3 Busy"]
26pub type Cc3R = crate::BitReader;
27#[doc = "Field `CC4` reader - Compare Channel 4 Busy"]
28pub type Cc4R = crate::BitReader;
29#[doc = "Field `CC5` reader - Compare Channel 5 Busy"]
30pub type Cc5R = crate::BitReader;
31impl R {
32    #[doc = "Bit 0 - Swrst Busy"]
33    #[inline(always)]
34    pub fn swrst(&self) -> SwrstR {
35        SwrstR::new((self.bits & 1) != 0)
36    }
37    #[doc = "Bit 1 - Enable Busy"]
38    #[inline(always)]
39    pub fn enable(&self) -> EnableR {
40        EnableR::new(((self.bits >> 1) & 1) != 0)
41    }
42    #[doc = "Bit 2 - Ctrlb Busy"]
43    #[inline(always)]
44    pub fn ctrlb(&self) -> CtrlbR {
45        CtrlbR::new(((self.bits >> 2) & 1) != 0)
46    }
47    #[doc = "Bit 3 - Status Busy"]
48    #[inline(always)]
49    pub fn status(&self) -> StatusR {
50        StatusR::new(((self.bits >> 3) & 1) != 0)
51    }
52    #[doc = "Bit 4 - Count Busy"]
53    #[inline(always)]
54    pub fn count(&self) -> CountR {
55        CountR::new(((self.bits >> 4) & 1) != 0)
56    }
57    #[doc = "Bit 5 - Pattern Busy"]
58    #[inline(always)]
59    pub fn patt(&self) -> PattR {
60        PattR::new(((self.bits >> 5) & 1) != 0)
61    }
62    #[doc = "Bit 6 - Wave Busy"]
63    #[inline(always)]
64    pub fn wave(&self) -> WaveR {
65        WaveR::new(((self.bits >> 6) & 1) != 0)
66    }
67    #[doc = "Bit 7 - Period Busy"]
68    #[inline(always)]
69    pub fn per(&self) -> PerR {
70        PerR::new(((self.bits >> 7) & 1) != 0)
71    }
72    #[doc = "Bit 8 - Compare Channel 0 Busy"]
73    #[inline(always)]
74    pub fn cc0(&self) -> Cc0R {
75        Cc0R::new(((self.bits >> 8) & 1) != 0)
76    }
77    #[doc = "Bit 9 - Compare Channel 1 Busy"]
78    #[inline(always)]
79    pub fn cc1(&self) -> Cc1R {
80        Cc1R::new(((self.bits >> 9) & 1) != 0)
81    }
82    #[doc = "Bit 10 - Compare Channel 2 Busy"]
83    #[inline(always)]
84    pub fn cc2(&self) -> Cc2R {
85        Cc2R::new(((self.bits >> 10) & 1) != 0)
86    }
87    #[doc = "Bit 11 - Compare Channel 3 Busy"]
88    #[inline(always)]
89    pub fn cc3(&self) -> Cc3R {
90        Cc3R::new(((self.bits >> 11) & 1) != 0)
91    }
92    #[doc = "Bit 12 - Compare Channel 4 Busy"]
93    #[inline(always)]
94    pub fn cc4(&self) -> Cc4R {
95        Cc4R::new(((self.bits >> 12) & 1) != 0)
96    }
97    #[doc = "Bit 13 - Compare Channel 5 Busy"]
98    #[inline(always)]
99    pub fn cc5(&self) -> Cc5R {
100        Cc5R::new(((self.bits >> 13) & 1) != 0)
101    }
102}
103#[doc = "Synchronization Busy\n\nYou can [`read`](crate::Reg::read) this register and get [`syncbusy::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
104pub struct SyncbusySpec;
105impl crate::RegisterSpec for SyncbusySpec {
106    type Ux = u32;
107}
108#[doc = "`read()` method returns [`syncbusy::R`](R) reader structure"]
109impl crate::Readable for SyncbusySpec {}
110#[doc = "`reset()` method sets SYNCBUSY to value 0"]
111impl crate::Resettable for SyncbusySpec {
112    const RESET_VALUE: u32 = 0;
113}