atsamd51n/adc0/
dseqstat.rs

1#[doc = "Register `DSEQSTAT` reader"]
2pub type R = crate::R<DseqstatSpec>;
3#[doc = "Field `INPUTCTRL` reader - Input Control"]
4pub type InputctrlR = crate::BitReader;
5#[doc = "Field `CTRLB` reader - Control B"]
6pub type CtrlbR = crate::BitReader;
7#[doc = "Field `REFCTRL` reader - Reference Control"]
8pub type RefctrlR = crate::BitReader;
9#[doc = "Field `AVGCTRL` reader - Average Control"]
10pub type AvgctrlR = crate::BitReader;
11#[doc = "Field `SAMPCTRL` reader - Sampling Time Control"]
12pub type SampctrlR = crate::BitReader;
13#[doc = "Field `WINLT` reader - Window Monitor Lower Threshold"]
14pub type WinltR = crate::BitReader;
15#[doc = "Field `WINUT` reader - Window Monitor Upper Threshold"]
16pub type WinutR = crate::BitReader;
17#[doc = "Field `GAINCORR` reader - Gain Correction"]
18pub type GaincorrR = crate::BitReader;
19#[doc = "Field `OFFSETCORR` reader - Offset Correction"]
20pub type OffsetcorrR = crate::BitReader;
21#[doc = "Field `BUSY` reader - DMA Sequencing Busy"]
22pub type BusyR = crate::BitReader;
23impl R {
24    #[doc = "Bit 0 - Input Control"]
25    #[inline(always)]
26    pub fn inputctrl(&self) -> InputctrlR {
27        InputctrlR::new((self.bits & 1) != 0)
28    }
29    #[doc = "Bit 1 - Control B"]
30    #[inline(always)]
31    pub fn ctrlb(&self) -> CtrlbR {
32        CtrlbR::new(((self.bits >> 1) & 1) != 0)
33    }
34    #[doc = "Bit 2 - Reference Control"]
35    #[inline(always)]
36    pub fn refctrl(&self) -> RefctrlR {
37        RefctrlR::new(((self.bits >> 2) & 1) != 0)
38    }
39    #[doc = "Bit 3 - Average Control"]
40    #[inline(always)]
41    pub fn avgctrl(&self) -> AvgctrlR {
42        AvgctrlR::new(((self.bits >> 3) & 1) != 0)
43    }
44    #[doc = "Bit 4 - Sampling Time Control"]
45    #[inline(always)]
46    pub fn sampctrl(&self) -> SampctrlR {
47        SampctrlR::new(((self.bits >> 4) & 1) != 0)
48    }
49    #[doc = "Bit 5 - Window Monitor Lower Threshold"]
50    #[inline(always)]
51    pub fn winlt(&self) -> WinltR {
52        WinltR::new(((self.bits >> 5) & 1) != 0)
53    }
54    #[doc = "Bit 6 - Window Monitor Upper Threshold"]
55    #[inline(always)]
56    pub fn winut(&self) -> WinutR {
57        WinutR::new(((self.bits >> 6) & 1) != 0)
58    }
59    #[doc = "Bit 7 - Gain Correction"]
60    #[inline(always)]
61    pub fn gaincorr(&self) -> GaincorrR {
62        GaincorrR::new(((self.bits >> 7) & 1) != 0)
63    }
64    #[doc = "Bit 8 - Offset Correction"]
65    #[inline(always)]
66    pub fn offsetcorr(&self) -> OffsetcorrR {
67        OffsetcorrR::new(((self.bits >> 8) & 1) != 0)
68    }
69    #[doc = "Bit 31 - DMA Sequencing Busy"]
70    #[inline(always)]
71    pub fn busy(&self) -> BusyR {
72        BusyR::new(((self.bits >> 31) & 1) != 0)
73    }
74}
75#[doc = "DMA Sequencial Status\n\nYou can [`read`](crate::Reg::read) this register and get [`dseqstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
76pub struct DseqstatSpec;
77impl crate::RegisterSpec for DseqstatSpec {
78    type Ux = u32;
79}
80#[doc = "`read()` method returns [`dseqstat::R`](R) reader structure"]
81impl crate::Readable for DseqstatSpec {}
82#[doc = "`reset()` method sets DSEQSTAT to value 0"]
83impl crate::Resettable for DseqstatSpec {
84    const RESET_VALUE: u32 = 0;
85}
atsamd51n/adc0/dseqstat.rs

atsamd51n/adc0/
dseqstat.rs
