atsamd51n/sercom0/usart_int/
ctrla.rs

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1#[doc = "Register `CTRLA` reader"]
2pub type R = crate::R<CtrlaSpec>;
3#[doc = "Register `CTRLA` writer"]
4pub type W = crate::W<CtrlaSpec>;
5#[doc = "Field `SWRST` reader - Software Reset"]
6pub type SwrstR = crate::BitReader;
7#[doc = "Field `SWRST` writer - Software Reset"]
8pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ENABLE` reader - Enable"]
10pub type EnableR = crate::BitReader;
11#[doc = "Field `ENABLE` writer - Enable"]
12pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Operating Mode\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15#[repr(u8)]
16pub enum Modeselect {
17    #[doc = "0: USART with external clock"]
18    UsartExtClk = 0,
19    #[doc = "1: USART with internal clock"]
20    UsartIntClk = 1,
21    #[doc = "2: SPI in slave operation"]
22    SpiSlave = 2,
23    #[doc = "3: SPI in master operation"]
24    SpiMaster = 3,
25    #[doc = "4: I2C slave operation"]
26    I2cSlave = 4,
27    #[doc = "5: I2C master operation"]
28    I2cMaster = 5,
29}
30impl From<Modeselect> for u8 {
31    #[inline(always)]
32    fn from(variant: Modeselect) -> Self {
33        variant as _
34    }
35}
36impl crate::FieldSpec for Modeselect {
37    type Ux = u8;
38}
39impl crate::IsEnum for Modeselect {}
40#[doc = "Field `MODE` reader - Operating Mode"]
41pub type ModeR = crate::FieldReader<Modeselect>;
42impl ModeR {
43    #[doc = "Get enumerated values variant"]
44    #[inline(always)]
45    pub const fn variant(&self) -> Option<Modeselect> {
46        match self.bits {
47            0 => Some(Modeselect::UsartExtClk),
48            1 => Some(Modeselect::UsartIntClk),
49            2 => Some(Modeselect::SpiSlave),
50            3 => Some(Modeselect::SpiMaster),
51            4 => Some(Modeselect::I2cSlave),
52            5 => Some(Modeselect::I2cMaster),
53            _ => None,
54        }
55    }
56    #[doc = "USART with external clock"]
57    #[inline(always)]
58    pub fn is_usart_ext_clk(&self) -> bool {
59        *self == Modeselect::UsartExtClk
60    }
61    #[doc = "USART with internal clock"]
62    #[inline(always)]
63    pub fn is_usart_int_clk(&self) -> bool {
64        *self == Modeselect::UsartIntClk
65    }
66    #[doc = "SPI in slave operation"]
67    #[inline(always)]
68    pub fn is_spi_slave(&self) -> bool {
69        *self == Modeselect::SpiSlave
70    }
71    #[doc = "SPI in master operation"]
72    #[inline(always)]
73    pub fn is_spi_master(&self) -> bool {
74        *self == Modeselect::SpiMaster
75    }
76    #[doc = "I2C slave operation"]
77    #[inline(always)]
78    pub fn is_i2c_slave(&self) -> bool {
79        *self == Modeselect::I2cSlave
80    }
81    #[doc = "I2C master operation"]
82    #[inline(always)]
83    pub fn is_i2c_master(&self) -> bool {
84        *self == Modeselect::I2cMaster
85    }
86}
87#[doc = "Field `MODE` writer - Operating Mode"]
88pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Modeselect>;
89impl<'a, REG> ModeW<'a, REG>
90where
91    REG: crate::Writable + crate::RegisterSpec,
92    REG::Ux: From<u8>,
93{
94    #[doc = "USART with external clock"]
95    #[inline(always)]
96    pub fn usart_ext_clk(self) -> &'a mut crate::W<REG> {
97        self.variant(Modeselect::UsartExtClk)
98    }
99    #[doc = "USART with internal clock"]
100    #[inline(always)]
101    pub fn usart_int_clk(self) -> &'a mut crate::W<REG> {
102        self.variant(Modeselect::UsartIntClk)
103    }
104    #[doc = "SPI in slave operation"]
105    #[inline(always)]
106    pub fn spi_slave(self) -> &'a mut crate::W<REG> {
107        self.variant(Modeselect::SpiSlave)
108    }
109    #[doc = "SPI in master operation"]
110    #[inline(always)]
111    pub fn spi_master(self) -> &'a mut crate::W<REG> {
112        self.variant(Modeselect::SpiMaster)
113    }
114    #[doc = "I2C slave operation"]
115    #[inline(always)]
116    pub fn i2c_slave(self) -> &'a mut crate::W<REG> {
117        self.variant(Modeselect::I2cSlave)
118    }
119    #[doc = "I2C master operation"]
120    #[inline(always)]
121    pub fn i2c_master(self) -> &'a mut crate::W<REG> {
122        self.variant(Modeselect::I2cMaster)
123    }
124}
125#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
126pub type RunstdbyR = crate::BitReader;
127#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
128pub type RunstdbyW<'a, REG> = crate::BitWriter<'a, REG>;
129#[doc = "Field `IBON` reader - Immediate Buffer Overflow Notification"]
130pub type IbonR = crate::BitReader;
131#[doc = "Field `IBON` writer - Immediate Buffer Overflow Notification"]
132pub type IbonW<'a, REG> = crate::BitWriter<'a, REG>;
133#[doc = "Field `TXINV` reader - Transmit Data Invert"]
134pub type TxinvR = crate::BitReader;
135#[doc = "Field `TXINV` writer - Transmit Data Invert"]
136pub type TxinvW<'a, REG> = crate::BitWriter<'a, REG>;
137#[doc = "Field `RXINV` reader - Receive Data Invert"]
138pub type RxinvR = crate::BitReader;
139#[doc = "Field `RXINV` writer - Receive Data Invert"]
140pub type RxinvW<'a, REG> = crate::BitWriter<'a, REG>;
141#[doc = "Sample\n\nValue on reset: 0"]
142#[derive(Clone, Copy, Debug, PartialEq, Eq)]
143#[repr(u8)]
144pub enum Samprselect {
145    #[doc = "0: 16x over-sampling using arithmetic baudrate generation"]
146    _16xArithmetic = 0,
147    #[doc = "1: 16x over-sampling using fractional baudrate generation"]
148    _16xFractional = 1,
149    #[doc = "2: 8x over-sampling using arithmetic baudrate generation"]
150    _8xArithmetic = 2,
151    #[doc = "3: 8x over-sampling using fractional baudrate generation"]
152    _8xFractional = 3,
153    #[doc = "4: 3x over-sampling using arithmetic baudrate generation"]
154    _3xArithmetic = 4,
155}
156impl From<Samprselect> for u8 {
157    #[inline(always)]
158    fn from(variant: Samprselect) -> Self {
159        variant as _
160    }
161}
162impl crate::FieldSpec for Samprselect {
163    type Ux = u8;
164}
165impl crate::IsEnum for Samprselect {}
166#[doc = "Field `SAMPR` reader - Sample"]
167pub type SamprR = crate::FieldReader<Samprselect>;
168impl SamprR {
169    #[doc = "Get enumerated values variant"]
170    #[inline(always)]
171    pub const fn variant(&self) -> Option<Samprselect> {
172        match self.bits {
173            0 => Some(Samprselect::_16xArithmetic),
174            1 => Some(Samprselect::_16xFractional),
175            2 => Some(Samprselect::_8xArithmetic),
176            3 => Some(Samprselect::_8xFractional),
177            4 => Some(Samprselect::_3xArithmetic),
178            _ => None,
179        }
180    }
181    #[doc = "16x over-sampling using arithmetic baudrate generation"]
182    #[inline(always)]
183    pub fn is_16x_arithmetic(&self) -> bool {
184        *self == Samprselect::_16xArithmetic
185    }
186    #[doc = "16x over-sampling using fractional baudrate generation"]
187    #[inline(always)]
188    pub fn is_16x_fractional(&self) -> bool {
189        *self == Samprselect::_16xFractional
190    }
191    #[doc = "8x over-sampling using arithmetic baudrate generation"]
192    #[inline(always)]
193    pub fn is_8x_arithmetic(&self) -> bool {
194        *self == Samprselect::_8xArithmetic
195    }
196    #[doc = "8x over-sampling using fractional baudrate generation"]
197    #[inline(always)]
198    pub fn is_8x_fractional(&self) -> bool {
199        *self == Samprselect::_8xFractional
200    }
201    #[doc = "3x over-sampling using arithmetic baudrate generation"]
202    #[inline(always)]
203    pub fn is_3x_arithmetic(&self) -> bool {
204        *self == Samprselect::_3xArithmetic
205    }
206}
207#[doc = "Field `SAMPR` writer - Sample"]
208pub type SamprW<'a, REG> = crate::FieldWriter<'a, REG, 3, Samprselect>;
209impl<'a, REG> SamprW<'a, REG>
210where
211    REG: crate::Writable + crate::RegisterSpec,
212    REG::Ux: From<u8>,
213{
214    #[doc = "16x over-sampling using arithmetic baudrate generation"]
215    #[inline(always)]
216    pub fn _16x_arithmetic(self) -> &'a mut crate::W<REG> {
217        self.variant(Samprselect::_16xArithmetic)
218    }
219    #[doc = "16x over-sampling using fractional baudrate generation"]
220    #[inline(always)]
221    pub fn _16x_fractional(self) -> &'a mut crate::W<REG> {
222        self.variant(Samprselect::_16xFractional)
223    }
224    #[doc = "8x over-sampling using arithmetic baudrate generation"]
225    #[inline(always)]
226    pub fn _8x_arithmetic(self) -> &'a mut crate::W<REG> {
227        self.variant(Samprselect::_8xArithmetic)
228    }
229    #[doc = "8x over-sampling using fractional baudrate generation"]
230    #[inline(always)]
231    pub fn _8x_fractional(self) -> &'a mut crate::W<REG> {
232        self.variant(Samprselect::_8xFractional)
233    }
234    #[doc = "3x over-sampling using arithmetic baudrate generation"]
235    #[inline(always)]
236    pub fn _3x_arithmetic(self) -> &'a mut crate::W<REG> {
237        self.variant(Samprselect::_3xArithmetic)
238    }
239}
240#[doc = "Transmit Data Pinout\n\nValue on reset: 0"]
241#[derive(Clone, Copy, Debug, PartialEq, Eq)]
242#[repr(u8)]
243pub enum Txposelect {
244    #[doc = "0: TxD on PAD0, XCK on PAD1"]
245    Txpo0 = 0,
246    #[doc = "2: TxD on PAD0, RTS/TE on PAD2, CTS on PAD3"]
247    Txpo2 = 2,
248    #[doc = "3: TxD on PAD0, XCK on PAD1, RTS/TE on PAD2"]
249    Txpo3 = 3,
250}
251impl From<Txposelect> for u8 {
252    #[inline(always)]
253    fn from(variant: Txposelect) -> Self {
254        variant as _
255    }
256}
257impl crate::FieldSpec for Txposelect {
258    type Ux = u8;
259}
260impl crate::IsEnum for Txposelect {}
261#[doc = "Field `TXPO` reader - Transmit Data Pinout"]
262pub type TxpoR = crate::FieldReader<Txposelect>;
263impl TxpoR {
264    #[doc = "Get enumerated values variant"]
265    #[inline(always)]
266    pub const fn variant(&self) -> Option<Txposelect> {
267        match self.bits {
268            0 => Some(Txposelect::Txpo0),
269            2 => Some(Txposelect::Txpo2),
270            3 => Some(Txposelect::Txpo3),
271            _ => None,
272        }
273    }
274    #[doc = "TxD on PAD0, XCK on PAD1"]
275    #[inline(always)]
276    pub fn is_txpo_0(&self) -> bool {
277        *self == Txposelect::Txpo0
278    }
279    #[doc = "TxD on PAD0, RTS/TE on PAD2, CTS on PAD3"]
280    #[inline(always)]
281    pub fn is_txpo_2(&self) -> bool {
282        *self == Txposelect::Txpo2
283    }
284    #[doc = "TxD on PAD0, XCK on PAD1, RTS/TE on PAD2"]
285    #[inline(always)]
286    pub fn is_txpo_3(&self) -> bool {
287        *self == Txposelect::Txpo3
288    }
289}
290#[doc = "Field `TXPO` writer - Transmit Data Pinout"]
291pub type TxpoW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txposelect>;
292impl<'a, REG> TxpoW<'a, REG>
293where
294    REG: crate::Writable + crate::RegisterSpec,
295    REG::Ux: From<u8>,
296{
297    #[doc = "TxD on PAD0, XCK on PAD1"]
298    #[inline(always)]
299    pub fn txpo_0(self) -> &'a mut crate::W<REG> {
300        self.variant(Txposelect::Txpo0)
301    }
302    #[doc = "TxD on PAD0, RTS/TE on PAD2, CTS on PAD3"]
303    #[inline(always)]
304    pub fn txpo_2(self) -> &'a mut crate::W<REG> {
305        self.variant(Txposelect::Txpo2)
306    }
307    #[doc = "TxD on PAD0, XCK on PAD1, RTS/TE on PAD2"]
308    #[inline(always)]
309    pub fn txpo_3(self) -> &'a mut crate::W<REG> {
310        self.variant(Txposelect::Txpo3)
311    }
312}
313#[doc = "Receive Data Pinout\n\nValue on reset: 0"]
314#[derive(Clone, Copy, Debug, PartialEq, Eq)]
315#[repr(u8)]
316pub enum Rxposelect {
317    #[doc = "0: SERCOM PAD\\[0\\]
318is used for data reception"]
319    Pad0 = 0,
320    #[doc = "1: SERCOM PAD\\[1\\]
321is used for data reception"]
322    Pad1 = 1,
323    #[doc = "2: SERCOM PAD\\[2\\]
324is used for data reception"]
325    Pad2 = 2,
326    #[doc = "3: SERCOM PAD\\[3\\]
327is used for data reception"]
328    Pad3 = 3,
329}
330impl From<Rxposelect> for u8 {
331    #[inline(always)]
332    fn from(variant: Rxposelect) -> Self {
333        variant as _
334    }
335}
336impl crate::FieldSpec for Rxposelect {
337    type Ux = u8;
338}
339impl crate::IsEnum for Rxposelect {}
340#[doc = "Field `RXPO` reader - Receive Data Pinout"]
341pub type RxpoR = crate::FieldReader<Rxposelect>;
342impl RxpoR {
343    #[doc = "Get enumerated values variant"]
344    #[inline(always)]
345    pub const fn variant(&self) -> Rxposelect {
346        match self.bits {
347            0 => Rxposelect::Pad0,
348            1 => Rxposelect::Pad1,
349            2 => Rxposelect::Pad2,
350            3 => Rxposelect::Pad3,
351            _ => unreachable!(),
352        }
353    }
354    #[doc = "SERCOM PAD\\[0\\]
355is used for data reception"]
356    #[inline(always)]
357    pub fn is_pad0(&self) -> bool {
358        *self == Rxposelect::Pad0
359    }
360    #[doc = "SERCOM PAD\\[1\\]
361is used for data reception"]
362    #[inline(always)]
363    pub fn is_pad1(&self) -> bool {
364        *self == Rxposelect::Pad1
365    }
366    #[doc = "SERCOM PAD\\[2\\]
367is used for data reception"]
368    #[inline(always)]
369    pub fn is_pad2(&self) -> bool {
370        *self == Rxposelect::Pad2
371    }
372    #[doc = "SERCOM PAD\\[3\\]
373is used for data reception"]
374    #[inline(always)]
375    pub fn is_pad3(&self) -> bool {
376        *self == Rxposelect::Pad3
377    }
378}
379#[doc = "Field `RXPO` writer - Receive Data Pinout"]
380pub type RxpoW<'a, REG> = crate::FieldWriter<'a, REG, 2, Rxposelect, crate::Safe>;
381impl<'a, REG> RxpoW<'a, REG>
382where
383    REG: crate::Writable + crate::RegisterSpec,
384    REG::Ux: From<u8>,
385{
386    #[doc = "SERCOM PAD\\[0\\]
387is used for data reception"]
388    #[inline(always)]
389    pub fn pad0(self) -> &'a mut crate::W<REG> {
390        self.variant(Rxposelect::Pad0)
391    }
392    #[doc = "SERCOM PAD\\[1\\]
393is used for data reception"]
394    #[inline(always)]
395    pub fn pad1(self) -> &'a mut crate::W<REG> {
396        self.variant(Rxposelect::Pad1)
397    }
398    #[doc = "SERCOM PAD\\[2\\]
399is used for data reception"]
400    #[inline(always)]
401    pub fn pad2(self) -> &'a mut crate::W<REG> {
402        self.variant(Rxposelect::Pad2)
403    }
404    #[doc = "SERCOM PAD\\[3\\]
405is used for data reception"]
406    #[inline(always)]
407    pub fn pad3(self) -> &'a mut crate::W<REG> {
408        self.variant(Rxposelect::Pad3)
409    }
410}
411#[doc = "Sample Adjustment\n\nValue on reset: 0"]
412#[derive(Clone, Copy, Debug, PartialEq, Eq)]
413#[repr(u8)]
414pub enum Sampaselect {
415    #[doc = "0: 16x Over-sampling = 7-8-9; 8x Over-sampling = 3-4-5"]
416    Adj0 = 0,
417    #[doc = "1: 16x Over-sampling = 9-10-11; 8x Over-sampling = 4-5-6"]
418    Adj1 = 1,
419    #[doc = "2: 16x Over-sampling = 11-12-13; 8x Over-sampling = 5-6-7"]
420    Adj2 = 2,
421    #[doc = "3: 16x Over-sampling = 13-14-15; 8x Over-sampling = 6-7-8"]
422    Adj3 = 3,
423}
424impl From<Sampaselect> for u8 {
425    #[inline(always)]
426    fn from(variant: Sampaselect) -> Self {
427        variant as _
428    }
429}
430impl crate::FieldSpec for Sampaselect {
431    type Ux = u8;
432}
433impl crate::IsEnum for Sampaselect {}
434#[doc = "Field `SAMPA` reader - Sample Adjustment"]
435pub type SampaR = crate::FieldReader<Sampaselect>;
436impl SampaR {
437    #[doc = "Get enumerated values variant"]
438    #[inline(always)]
439    pub const fn variant(&self) -> Sampaselect {
440        match self.bits {
441            0 => Sampaselect::Adj0,
442            1 => Sampaselect::Adj1,
443            2 => Sampaselect::Adj2,
444            3 => Sampaselect::Adj3,
445            _ => unreachable!(),
446        }
447    }
448    #[doc = "16x Over-sampling = 7-8-9; 8x Over-sampling = 3-4-5"]
449    #[inline(always)]
450    pub fn is_adj0(&self) -> bool {
451        *self == Sampaselect::Adj0
452    }
453    #[doc = "16x Over-sampling = 9-10-11; 8x Over-sampling = 4-5-6"]
454    #[inline(always)]
455    pub fn is_adj1(&self) -> bool {
456        *self == Sampaselect::Adj1
457    }
458    #[doc = "16x Over-sampling = 11-12-13; 8x Over-sampling = 5-6-7"]
459    #[inline(always)]
460    pub fn is_adj2(&self) -> bool {
461        *self == Sampaselect::Adj2
462    }
463    #[doc = "16x Over-sampling = 13-14-15; 8x Over-sampling = 6-7-8"]
464    #[inline(always)]
465    pub fn is_adj3(&self) -> bool {
466        *self == Sampaselect::Adj3
467    }
468}
469#[doc = "Field `SAMPA` writer - Sample Adjustment"]
470pub type SampaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sampaselect, crate::Safe>;
471impl<'a, REG> SampaW<'a, REG>
472where
473    REG: crate::Writable + crate::RegisterSpec,
474    REG::Ux: From<u8>,
475{
476    #[doc = "16x Over-sampling = 7-8-9; 8x Over-sampling = 3-4-5"]
477    #[inline(always)]
478    pub fn adj0(self) -> &'a mut crate::W<REG> {
479        self.variant(Sampaselect::Adj0)
480    }
481    #[doc = "16x Over-sampling = 9-10-11; 8x Over-sampling = 4-5-6"]
482    #[inline(always)]
483    pub fn adj1(self) -> &'a mut crate::W<REG> {
484        self.variant(Sampaselect::Adj1)
485    }
486    #[doc = "16x Over-sampling = 11-12-13; 8x Over-sampling = 5-6-7"]
487    #[inline(always)]
488    pub fn adj2(self) -> &'a mut crate::W<REG> {
489        self.variant(Sampaselect::Adj2)
490    }
491    #[doc = "16x Over-sampling = 13-14-15; 8x Over-sampling = 6-7-8"]
492    #[inline(always)]
493    pub fn adj3(self) -> &'a mut crate::W<REG> {
494        self.variant(Sampaselect::Adj3)
495    }
496}
497#[doc = "Frame Format\n\nValue on reset: 0"]
498#[derive(Clone, Copy, Debug, PartialEq, Eq)]
499#[repr(u8)]
500pub enum Formselect {
501    #[doc = "0: USART frame"]
502    UsartFrameNoParity = 0,
503    #[doc = "1: USART frame with parity"]
504    UsartFrameWithParity = 1,
505    #[doc = "2: LIN Master - Break and sync generation"]
506    UsartFrameLinMasterMode = 2,
507    #[doc = "4: Auto-baud (LIN Slave) - break detection and auto-baud"]
508    UsartFrameAutoBaudNoParity = 4,
509    #[doc = "5: Auto-baud - break detection and auto-baud with parity"]
510    UsartFrameAutoBaudWithParity = 5,
511    #[doc = "7: ISO 7816"]
512    UsartFrameIso7816 = 7,
513}
514impl From<Formselect> for u8 {
515    #[inline(always)]
516    fn from(variant: Formselect) -> Self {
517        variant as _
518    }
519}
520impl crate::FieldSpec for Formselect {
521    type Ux = u8;
522}
523impl crate::IsEnum for Formselect {}
524#[doc = "Field `FORM` reader - Frame Format"]
525pub type FormR = crate::FieldReader<Formselect>;
526impl FormR {
527    #[doc = "Get enumerated values variant"]
528    #[inline(always)]
529    pub const fn variant(&self) -> Option<Formselect> {
530        match self.bits {
531            0 => Some(Formselect::UsartFrameNoParity),
532            1 => Some(Formselect::UsartFrameWithParity),
533            2 => Some(Formselect::UsartFrameLinMasterMode),
534            4 => Some(Formselect::UsartFrameAutoBaudNoParity),
535            5 => Some(Formselect::UsartFrameAutoBaudWithParity),
536            7 => Some(Formselect::UsartFrameIso7816),
537            _ => None,
538        }
539    }
540    #[doc = "USART frame"]
541    #[inline(always)]
542    pub fn is_usart_frame_no_parity(&self) -> bool {
543        *self == Formselect::UsartFrameNoParity
544    }
545    #[doc = "USART frame with parity"]
546    #[inline(always)]
547    pub fn is_usart_frame_with_parity(&self) -> bool {
548        *self == Formselect::UsartFrameWithParity
549    }
550    #[doc = "LIN Master - Break and sync generation"]
551    #[inline(always)]
552    pub fn is_usart_frame_lin_master_mode(&self) -> bool {
553        *self == Formselect::UsartFrameLinMasterMode
554    }
555    #[doc = "Auto-baud (LIN Slave) - break detection and auto-baud"]
556    #[inline(always)]
557    pub fn is_usart_frame_auto_baud_no_parity(&self) -> bool {
558        *self == Formselect::UsartFrameAutoBaudNoParity
559    }
560    #[doc = "Auto-baud - break detection and auto-baud with parity"]
561    #[inline(always)]
562    pub fn is_usart_frame_auto_baud_with_parity(&self) -> bool {
563        *self == Formselect::UsartFrameAutoBaudWithParity
564    }
565    #[doc = "ISO 7816"]
566    #[inline(always)]
567    pub fn is_usart_frame_iso_7816(&self) -> bool {
568        *self == Formselect::UsartFrameIso7816
569    }
570}
571#[doc = "Field `FORM` writer - Frame Format"]
572pub type FormW<'a, REG> = crate::FieldWriter<'a, REG, 4, Formselect>;
573impl<'a, REG> FormW<'a, REG>
574where
575    REG: crate::Writable + crate::RegisterSpec,
576    REG::Ux: From<u8>,
577{
578    #[doc = "USART frame"]
579    #[inline(always)]
580    pub fn usart_frame_no_parity(self) -> &'a mut crate::W<REG> {
581        self.variant(Formselect::UsartFrameNoParity)
582    }
583    #[doc = "USART frame with parity"]
584    #[inline(always)]
585    pub fn usart_frame_with_parity(self) -> &'a mut crate::W<REG> {
586        self.variant(Formselect::UsartFrameWithParity)
587    }
588    #[doc = "LIN Master - Break and sync generation"]
589    #[inline(always)]
590    pub fn usart_frame_lin_master_mode(self) -> &'a mut crate::W<REG> {
591        self.variant(Formselect::UsartFrameLinMasterMode)
592    }
593    #[doc = "Auto-baud (LIN Slave) - break detection and auto-baud"]
594    #[inline(always)]
595    pub fn usart_frame_auto_baud_no_parity(self) -> &'a mut crate::W<REG> {
596        self.variant(Formselect::UsartFrameAutoBaudNoParity)
597    }
598    #[doc = "Auto-baud - break detection and auto-baud with parity"]
599    #[inline(always)]
600    pub fn usart_frame_auto_baud_with_parity(self) -> &'a mut crate::W<REG> {
601        self.variant(Formselect::UsartFrameAutoBaudWithParity)
602    }
603    #[doc = "ISO 7816"]
604    #[inline(always)]
605    pub fn usart_frame_iso_7816(self) -> &'a mut crate::W<REG> {
606        self.variant(Formselect::UsartFrameIso7816)
607    }
608}
609#[doc = "Communication Mode\n\nValue on reset: 0"]
610#[derive(Clone, Copy, Debug, PartialEq, Eq)]
611pub enum Cmodeselect {
612    #[doc = "0: Asynchronous Communication"]
613    Async = 0,
614    #[doc = "1: Synchronous Communication"]
615    Sync = 1,
616}
617impl From<Cmodeselect> for bool {
618    #[inline(always)]
619    fn from(variant: Cmodeselect) -> Self {
620        variant as u8 != 0
621    }
622}
623#[doc = "Field `CMODE` reader - Communication Mode"]
624pub type CmodeR = crate::BitReader<Cmodeselect>;
625impl CmodeR {
626    #[doc = "Get enumerated values variant"]
627    #[inline(always)]
628    pub const fn variant(&self) -> Cmodeselect {
629        match self.bits {
630            false => Cmodeselect::Async,
631            true => Cmodeselect::Sync,
632        }
633    }
634    #[doc = "Asynchronous Communication"]
635    #[inline(always)]
636    pub fn is_async(&self) -> bool {
637        *self == Cmodeselect::Async
638    }
639    #[doc = "Synchronous Communication"]
640    #[inline(always)]
641    pub fn is_sync(&self) -> bool {
642        *self == Cmodeselect::Sync
643    }
644}
645#[doc = "Field `CMODE` writer - Communication Mode"]
646pub type CmodeW<'a, REG> = crate::BitWriter<'a, REG, Cmodeselect>;
647impl<'a, REG> CmodeW<'a, REG>
648where
649    REG: crate::Writable + crate::RegisterSpec,
650{
651    #[doc = "Asynchronous Communication"]
652    #[inline(always)]
653    pub fn async_(self) -> &'a mut crate::W<REG> {
654        self.variant(Cmodeselect::Async)
655    }
656    #[doc = "Synchronous Communication"]
657    #[inline(always)]
658    pub fn sync(self) -> &'a mut crate::W<REG> {
659        self.variant(Cmodeselect::Sync)
660    }
661}
662#[doc = "Clock Polarity\n\nValue on reset: 0"]
663#[derive(Clone, Copy, Debug, PartialEq, Eq)]
664pub enum Cpolselect {
665    #[doc = "0: TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"]
666    IdleLow = 0,
667    #[doc = "1: TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"]
668    IdleHigh = 1,
669}
670impl From<Cpolselect> for bool {
671    #[inline(always)]
672    fn from(variant: Cpolselect) -> Self {
673        variant as u8 != 0
674    }
675}
676#[doc = "Field `CPOL` reader - Clock Polarity"]
677pub type CpolR = crate::BitReader<Cpolselect>;
678impl CpolR {
679    #[doc = "Get enumerated values variant"]
680    #[inline(always)]
681    pub const fn variant(&self) -> Cpolselect {
682        match self.bits {
683            false => Cpolselect::IdleLow,
684            true => Cpolselect::IdleHigh,
685        }
686    }
687    #[doc = "TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"]
688    #[inline(always)]
689    pub fn is_idle_low(&self) -> bool {
690        *self == Cpolselect::IdleLow
691    }
692    #[doc = "TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"]
693    #[inline(always)]
694    pub fn is_idle_high(&self) -> bool {
695        *self == Cpolselect::IdleHigh
696    }
697}
698#[doc = "Field `CPOL` writer - Clock Polarity"]
699pub type CpolW<'a, REG> = crate::BitWriter<'a, REG, Cpolselect>;
700impl<'a, REG> CpolW<'a, REG>
701where
702    REG: crate::Writable + crate::RegisterSpec,
703{
704    #[doc = "TxD Change:- Rising XCK edge, RxD Sample:- Falling XCK edge"]
705    #[inline(always)]
706    pub fn idle_low(self) -> &'a mut crate::W<REG> {
707        self.variant(Cpolselect::IdleLow)
708    }
709    #[doc = "TxD Change:- Falling XCK edge, RxD Sample:- Rising XCK edge"]
710    #[inline(always)]
711    pub fn idle_high(self) -> &'a mut crate::W<REG> {
712        self.variant(Cpolselect::IdleHigh)
713    }
714}
715#[doc = "Data Order\n\nValue on reset: 0"]
716#[derive(Clone, Copy, Debug, PartialEq, Eq)]
717pub enum Dordselect {
718    #[doc = "0: MSB is transmitted first"]
719    Msb = 0,
720    #[doc = "1: LSB is transmitted first"]
721    Lsb = 1,
722}
723impl From<Dordselect> for bool {
724    #[inline(always)]
725    fn from(variant: Dordselect) -> Self {
726        variant as u8 != 0
727    }
728}
729#[doc = "Field `DORD` reader - Data Order"]
730pub type DordR = crate::BitReader<Dordselect>;
731impl DordR {
732    #[doc = "Get enumerated values variant"]
733    #[inline(always)]
734    pub const fn variant(&self) -> Dordselect {
735        match self.bits {
736            false => Dordselect::Msb,
737            true => Dordselect::Lsb,
738        }
739    }
740    #[doc = "MSB is transmitted first"]
741    #[inline(always)]
742    pub fn is_msb(&self) -> bool {
743        *self == Dordselect::Msb
744    }
745    #[doc = "LSB is transmitted first"]
746    #[inline(always)]
747    pub fn is_lsb(&self) -> bool {
748        *self == Dordselect::Lsb
749    }
750}
751#[doc = "Field `DORD` writer - Data Order"]
752pub type DordW<'a, REG> = crate::BitWriter<'a, REG, Dordselect>;
753impl<'a, REG> DordW<'a, REG>
754where
755    REG: crate::Writable + crate::RegisterSpec,
756{
757    #[doc = "MSB is transmitted first"]
758    #[inline(always)]
759    pub fn msb(self) -> &'a mut crate::W<REG> {
760        self.variant(Dordselect::Msb)
761    }
762    #[doc = "LSB is transmitted first"]
763    #[inline(always)]
764    pub fn lsb(self) -> &'a mut crate::W<REG> {
765        self.variant(Dordselect::Lsb)
766    }
767}
768impl R {
769    #[doc = "Bit 0 - Software Reset"]
770    #[inline(always)]
771    pub fn swrst(&self) -> SwrstR {
772        SwrstR::new((self.bits & 1) != 0)
773    }
774    #[doc = "Bit 1 - Enable"]
775    #[inline(always)]
776    pub fn enable(&self) -> EnableR {
777        EnableR::new(((self.bits >> 1) & 1) != 0)
778    }
779    #[doc = "Bits 2:4 - Operating Mode"]
780    #[inline(always)]
781    pub fn mode(&self) -> ModeR {
782        ModeR::new(((self.bits >> 2) & 7) as u8)
783    }
784    #[doc = "Bit 7 - Run during Standby"]
785    #[inline(always)]
786    pub fn runstdby(&self) -> RunstdbyR {
787        RunstdbyR::new(((self.bits >> 7) & 1) != 0)
788    }
789    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
790    #[inline(always)]
791    pub fn ibon(&self) -> IbonR {
792        IbonR::new(((self.bits >> 8) & 1) != 0)
793    }
794    #[doc = "Bit 9 - Transmit Data Invert"]
795    #[inline(always)]
796    pub fn txinv(&self) -> TxinvR {
797        TxinvR::new(((self.bits >> 9) & 1) != 0)
798    }
799    #[doc = "Bit 10 - Receive Data Invert"]
800    #[inline(always)]
801    pub fn rxinv(&self) -> RxinvR {
802        RxinvR::new(((self.bits >> 10) & 1) != 0)
803    }
804    #[doc = "Bits 13:15 - Sample"]
805    #[inline(always)]
806    pub fn sampr(&self) -> SamprR {
807        SamprR::new(((self.bits >> 13) & 7) as u8)
808    }
809    #[doc = "Bits 16:17 - Transmit Data Pinout"]
810    #[inline(always)]
811    pub fn txpo(&self) -> TxpoR {
812        TxpoR::new(((self.bits >> 16) & 3) as u8)
813    }
814    #[doc = "Bits 20:21 - Receive Data Pinout"]
815    #[inline(always)]
816    pub fn rxpo(&self) -> RxpoR {
817        RxpoR::new(((self.bits >> 20) & 3) as u8)
818    }
819    #[doc = "Bits 22:23 - Sample Adjustment"]
820    #[inline(always)]
821    pub fn sampa(&self) -> SampaR {
822        SampaR::new(((self.bits >> 22) & 3) as u8)
823    }
824    #[doc = "Bits 24:27 - Frame Format"]
825    #[inline(always)]
826    pub fn form(&self) -> FormR {
827        FormR::new(((self.bits >> 24) & 0x0f) as u8)
828    }
829    #[doc = "Bit 28 - Communication Mode"]
830    #[inline(always)]
831    pub fn cmode(&self) -> CmodeR {
832        CmodeR::new(((self.bits >> 28) & 1) != 0)
833    }
834    #[doc = "Bit 29 - Clock Polarity"]
835    #[inline(always)]
836    pub fn cpol(&self) -> CpolR {
837        CpolR::new(((self.bits >> 29) & 1) != 0)
838    }
839    #[doc = "Bit 30 - Data Order"]
840    #[inline(always)]
841    pub fn dord(&self) -> DordR {
842        DordR::new(((self.bits >> 30) & 1) != 0)
843    }
844}
845impl W {
846    #[doc = "Bit 0 - Software Reset"]
847    #[inline(always)]
848    #[must_use]
849    pub fn swrst(&mut self) -> SwrstW<CtrlaSpec> {
850        SwrstW::new(self, 0)
851    }
852    #[doc = "Bit 1 - Enable"]
853    #[inline(always)]
854    #[must_use]
855    pub fn enable(&mut self) -> EnableW<CtrlaSpec> {
856        EnableW::new(self, 1)
857    }
858    #[doc = "Bits 2:4 - Operating Mode"]
859    #[inline(always)]
860    #[must_use]
861    pub fn mode(&mut self) -> ModeW<CtrlaSpec> {
862        ModeW::new(self, 2)
863    }
864    #[doc = "Bit 7 - Run during Standby"]
865    #[inline(always)]
866    #[must_use]
867    pub fn runstdby(&mut self) -> RunstdbyW<CtrlaSpec> {
868        RunstdbyW::new(self, 7)
869    }
870    #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
871    #[inline(always)]
872    #[must_use]
873    pub fn ibon(&mut self) -> IbonW<CtrlaSpec> {
874        IbonW::new(self, 8)
875    }
876    #[doc = "Bit 9 - Transmit Data Invert"]
877    #[inline(always)]
878    #[must_use]
879    pub fn txinv(&mut self) -> TxinvW<CtrlaSpec> {
880        TxinvW::new(self, 9)
881    }
882    #[doc = "Bit 10 - Receive Data Invert"]
883    #[inline(always)]
884    #[must_use]
885    pub fn rxinv(&mut self) -> RxinvW<CtrlaSpec> {
886        RxinvW::new(self, 10)
887    }
888    #[doc = "Bits 13:15 - Sample"]
889    #[inline(always)]
890    #[must_use]
891    pub fn sampr(&mut self) -> SamprW<CtrlaSpec> {
892        SamprW::new(self, 13)
893    }
894    #[doc = "Bits 16:17 - Transmit Data Pinout"]
895    #[inline(always)]
896    #[must_use]
897    pub fn txpo(&mut self) -> TxpoW<CtrlaSpec> {
898        TxpoW::new(self, 16)
899    }
900    #[doc = "Bits 20:21 - Receive Data Pinout"]
901    #[inline(always)]
902    #[must_use]
903    pub fn rxpo(&mut self) -> RxpoW<CtrlaSpec> {
904        RxpoW::new(self, 20)
905    }
906    #[doc = "Bits 22:23 - Sample Adjustment"]
907    #[inline(always)]
908    #[must_use]
909    pub fn sampa(&mut self) -> SampaW<CtrlaSpec> {
910        SampaW::new(self, 22)
911    }
912    #[doc = "Bits 24:27 - Frame Format"]
913    #[inline(always)]
914    #[must_use]
915    pub fn form(&mut self) -> FormW<CtrlaSpec> {
916        FormW::new(self, 24)
917    }
918    #[doc = "Bit 28 - Communication Mode"]
919    #[inline(always)]
920    #[must_use]
921    pub fn cmode(&mut self) -> CmodeW<CtrlaSpec> {
922        CmodeW::new(self, 28)
923    }
924    #[doc = "Bit 29 - Clock Polarity"]
925    #[inline(always)]
926    #[must_use]
927    pub fn cpol(&mut self) -> CpolW<CtrlaSpec> {
928        CpolW::new(self, 29)
929    }
930    #[doc = "Bit 30 - Data Order"]
931    #[inline(always)]
932    #[must_use]
933    pub fn dord(&mut self) -> DordW<CtrlaSpec> {
934        DordW::new(self, 30)
935    }
936}
937#[doc = "USART_INT Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrla::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrla::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
938pub struct CtrlaSpec;
939impl crate::RegisterSpec for CtrlaSpec {
940    type Ux = u32;
941}
942#[doc = "`read()` method returns [`ctrla::R`](R) reader structure"]
943impl crate::Readable for CtrlaSpec {}
944#[doc = "`write(|w| ..)` method takes [`ctrla::W`](W) writer structure"]
945impl crate::Writable for CtrlaSpec {
946    type Safety = crate::Unsafe;
947    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
948    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
949}
950#[doc = "`reset()` method sets CTRLA to value 0"]
951impl crate::Resettable for CtrlaSpec {
952    const RESET_VALUE: u32 = 0;
953}
atsamd51n/sercom0/usart_int/ctrla.rs

atsamd51n/sercom0/usart_int/
ctrla.rs
