atsamd51n/cmcc/
ctrl.rs
1#[doc = "Register `CTRL` writer"]
2pub type W = crate::W<CtrlSpec>;
3#[doc = "Field `CEN` writer - Cache Controller Enable"]
4pub type CenW<'a, REG> = crate::BitWriter<'a, REG>;
5impl W {
6 #[doc = "Bit 0 - Cache Controller Enable"]
7 #[inline(always)]
8 #[must_use]
9 pub fn cen(&mut self) -> CenW<CtrlSpec> {
10 CenW::new(self, 0)
11 }
12}
13#[doc = "Cache Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
14pub struct CtrlSpec;
15impl crate::RegisterSpec for CtrlSpec {
16 type Ux = u32;
17}
18#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
19impl crate::Writable for CtrlSpec {
20 type Safety = crate::Unsafe;
21 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
22 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
23}
24#[doc = "`reset()` method sets CTRL to value 0"]
25impl crate::Resettable for CtrlSpec {
26 const RESET_VALUE: u32 = 0;
27}