atsamd51n/
dmac.rs

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1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    ctrl: Ctrl,
5    crcctrl: Crcctrl,
6    crcdatain: Crcdatain,
7    crcchksum: Crcchksum,
8    crcstatus: Crcstatus,
9    dbgctrl: Dbgctrl,
10    _reserved6: [u8; 0x02],
11    swtrigctrl: Swtrigctrl,
12    prictrl0: Prictrl0,
13    _reserved8: [u8; 0x08],
14    intpend: Intpend,
15    _reserved9: [u8; 0x02],
16    intstatus: Intstatus,
17    busych: Busych,
18    pendch: Pendch,
19    active: Active,
20    baseaddr: Baseaddr,
21    wrbaddr: Wrbaddr,
22    _reserved15: [u8; 0x04],
23    channel: [Channel; 32],
24}
25impl RegisterBlock {
26    #[doc = "0x00 - Control"]
27    #[inline(always)]
28    pub const fn ctrl(&self) -> &Ctrl {
29        &self.ctrl
30    }
31    #[doc = "0x02 - CRC Control"]
32    #[inline(always)]
33    pub const fn crcctrl(&self) -> &Crcctrl {
34        &self.crcctrl
35    }
36    #[doc = "0x04 - CRC Data Input"]
37    #[inline(always)]
38    pub const fn crcdatain(&self) -> &Crcdatain {
39        &self.crcdatain
40    }
41    #[doc = "0x08 - CRC Checksum"]
42    #[inline(always)]
43    pub const fn crcchksum(&self) -> &Crcchksum {
44        &self.crcchksum
45    }
46    #[doc = "0x0c - CRC Status"]
47    #[inline(always)]
48    pub const fn crcstatus(&self) -> &Crcstatus {
49        &self.crcstatus
50    }
51    #[doc = "0x0d - Debug Control"]
52    #[inline(always)]
53    pub const fn dbgctrl(&self) -> &Dbgctrl {
54        &self.dbgctrl
55    }
56    #[doc = "0x10 - Software Trigger Control"]
57    #[inline(always)]
58    pub const fn swtrigctrl(&self) -> &Swtrigctrl {
59        &self.swtrigctrl
60    }
61    #[doc = "0x14 - Priority Control 0"]
62    #[inline(always)]
63    pub const fn prictrl0(&self) -> &Prictrl0 {
64        &self.prictrl0
65    }
66    #[doc = "0x20 - Interrupt Pending"]
67    #[inline(always)]
68    pub const fn intpend(&self) -> &Intpend {
69        &self.intpend
70    }
71    #[doc = "0x24 - Interrupt Status"]
72    #[inline(always)]
73    pub const fn intstatus(&self) -> &Intstatus {
74        &self.intstatus
75    }
76    #[doc = "0x28 - Busy Channels"]
77    #[inline(always)]
78    pub const fn busych(&self) -> &Busych {
79        &self.busych
80    }
81    #[doc = "0x2c - Pending Channels"]
82    #[inline(always)]
83    pub const fn pendch(&self) -> &Pendch {
84        &self.pendch
85    }
86    #[doc = "0x30 - Active Channel and Levels"]
87    #[inline(always)]
88    pub const fn active(&self) -> &Active {
89        &self.active
90    }
91    #[doc = "0x34 - Descriptor Memory Section Base Address"]
92    #[inline(always)]
93    pub const fn baseaddr(&self) -> &Baseaddr {
94        &self.baseaddr
95    }
96    #[doc = "0x38 - Write-Back Memory Section Base Address"]
97    #[inline(always)]
98    pub const fn wrbaddr(&self) -> &Wrbaddr {
99        &self.wrbaddr
100    }
101    #[doc = "0x40..0x240 - CHANNEL\\[%s\\]"]
102    #[inline(always)]
103    pub const fn channel(&self, n: usize) -> &Channel {
104        &self.channel[n]
105    }
106    #[doc = "Iterator for array of:"]
107    #[doc = "0x40..0x240 - CHANNEL\\[%s\\]"]
108    #[inline(always)]
109    pub fn channel_iter(&self) -> impl Iterator<Item = &Channel> {
110        self.channel.iter()
111    }
112}
113#[doc = "CTRL (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
114module"]
115#[doc(alias = "CTRL")]
116pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
117#[doc = "Control"]
118pub mod ctrl;
119#[doc = "CRCCTRL (rw) register accessor: CRC Control\n\nYou can [`read`](crate::Reg::read) this register and get [`crcctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crcctrl`]
120module"]
121#[doc(alias = "CRCCTRL")]
122pub type Crcctrl = crate::Reg<crcctrl::CrcctrlSpec>;
123#[doc = "CRC Control"]
124pub mod crcctrl;
125#[doc = "CRCDATAIN (rw) register accessor: CRC Data Input\n\nYou can [`read`](crate::Reg::read) this register and get [`crcdatain::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcdatain::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crcdatain`]
126module"]
127#[doc(alias = "CRCDATAIN")]
128pub type Crcdatain = crate::Reg<crcdatain::CrcdatainSpec>;
129#[doc = "CRC Data Input"]
130pub mod crcdatain;
131#[doc = "CRCCHKSUM (rw) register accessor: CRC Checksum\n\nYou can [`read`](crate::Reg::read) this register and get [`crcchksum::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcchksum::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crcchksum`]
132module"]
133#[doc(alias = "CRCCHKSUM")]
134pub type Crcchksum = crate::Reg<crcchksum::CrcchksumSpec>;
135#[doc = "CRC Checksum"]
136pub mod crcchksum;
137#[doc = "CRCSTATUS (rw) register accessor: CRC Status\n\nYou can [`read`](crate::Reg::read) this register and get [`crcstatus::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcstatus::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crcstatus`]
138module"]
139#[doc(alias = "CRCSTATUS")]
140pub type Crcstatus = crate::Reg<crcstatus::CrcstatusSpec>;
141#[doc = "CRC Status"]
142pub mod crcstatus;
143#[doc = "DBGCTRL (rw) register accessor: Debug Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbgctrl`]
144module"]
145#[doc(alias = "DBGCTRL")]
146pub type Dbgctrl = crate::Reg<dbgctrl::DbgctrlSpec>;
147#[doc = "Debug Control"]
148pub mod dbgctrl;
149#[doc = "SWTRIGCTRL (rw) register accessor: Software Trigger Control\n\nYou can [`read`](crate::Reg::read) this register and get [`swtrigctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`swtrigctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swtrigctrl`]
150module"]
151#[doc(alias = "SWTRIGCTRL")]
152pub type Swtrigctrl = crate::Reg<swtrigctrl::SwtrigctrlSpec>;
153#[doc = "Software Trigger Control"]
154pub mod swtrigctrl;
155#[doc = "PRICTRL0 (rw) register accessor: Priority Control 0\n\nYou can [`read`](crate::Reg::read) this register and get [`prictrl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prictrl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prictrl0`]
156module"]
157#[doc(alias = "PRICTRL0")]
158pub type Prictrl0 = crate::Reg<prictrl0::Prictrl0Spec>;
159#[doc = "Priority Control 0"]
160pub mod prictrl0;
161#[doc = "INTPEND (rw) register accessor: Interrupt Pending\n\nYou can [`read`](crate::Reg::read) this register and get [`intpend::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intpend::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intpend`]
162module"]
163#[doc(alias = "INTPEND")]
164pub type Intpend = crate::Reg<intpend::IntpendSpec>;
165#[doc = "Interrupt Pending"]
166pub mod intpend;
167#[doc = "INTSTATUS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::Reg::read) this register and get [`intstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intstatus`]
168module"]
169#[doc(alias = "INTSTATUS")]
170pub type Intstatus = crate::Reg<intstatus::IntstatusSpec>;
171#[doc = "Interrupt Status"]
172pub mod intstatus;
173#[doc = "BUSYCH (r) register accessor: Busy Channels\n\nYou can [`read`](crate::Reg::read) this register and get [`busych::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busych`]
174module"]
175#[doc(alias = "BUSYCH")]
176pub type Busych = crate::Reg<busych::BusychSpec>;
177#[doc = "Busy Channels"]
178pub mod busych;
179#[doc = "PENDCH (r) register accessor: Pending Channels\n\nYou can [`read`](crate::Reg::read) this register and get [`pendch::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pendch`]
180module"]
181#[doc(alias = "PENDCH")]
182pub type Pendch = crate::Reg<pendch::PendchSpec>;
183#[doc = "Pending Channels"]
184pub mod pendch;
185#[doc = "ACTIVE (r) register accessor: Active Channel and Levels\n\nYou can [`read`](crate::Reg::read) this register and get [`active::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@active`]
186module"]
187#[doc(alias = "ACTIVE")]
188pub type Active = crate::Reg<active::ActiveSpec>;
189#[doc = "Active Channel and Levels"]
190pub mod active;
191#[doc = "BASEADDR (rw) register accessor: Descriptor Memory Section Base Address\n\nYou can [`read`](crate::Reg::read) this register and get [`baseaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`baseaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@baseaddr`]
192module"]
193#[doc(alias = "BASEADDR")]
194pub type Baseaddr = crate::Reg<baseaddr::BaseaddrSpec>;
195#[doc = "Descriptor Memory Section Base Address"]
196pub mod baseaddr;
197#[doc = "WRBADDR (rw) register accessor: Write-Back Memory Section Base Address\n\nYou can [`read`](crate::Reg::read) this register and get [`wrbaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wrbaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wrbaddr`]
198module"]
199#[doc(alias = "WRBADDR")]
200pub type Wrbaddr = crate::Reg<wrbaddr::WrbaddrSpec>;
201#[doc = "Write-Back Memory Section Base Address"]
202pub mod wrbaddr;
203#[doc = "CHANNEL\\[%s\\]"]
204pub use self::channel::Channel;
205#[doc = r"Cluster"]
206#[doc = "CHANNEL\\[%s\\]"]
207pub mod channel;
atsamd51n/dmac.rs

atsamd51n/
dmac.rs
