atsamd51n/evsys/
busych.rs

1#[doc = "Register `BUSYCH` reader"]
2pub type R = crate::R<BusychSpec>;
3#[doc = "Field `BUSYCH0` reader - Busy Channel 0"]
4pub type Busych0R = crate::BitReader;
5#[doc = "Field `BUSYCH1` reader - Busy Channel 1"]
6pub type Busych1R = crate::BitReader;
7#[doc = "Field `BUSYCH2` reader - Busy Channel 2"]
8pub type Busych2R = crate::BitReader;
9#[doc = "Field `BUSYCH3` reader - Busy Channel 3"]
10pub type Busych3R = crate::BitReader;
11#[doc = "Field `BUSYCH4` reader - Busy Channel 4"]
12pub type Busych4R = crate::BitReader;
13#[doc = "Field `BUSYCH5` reader - Busy Channel 5"]
14pub type Busych5R = crate::BitReader;
15#[doc = "Field `BUSYCH6` reader - Busy Channel 6"]
16pub type Busych6R = crate::BitReader;
17#[doc = "Field `BUSYCH7` reader - Busy Channel 7"]
18pub type Busych7R = crate::BitReader;
19#[doc = "Field `BUSYCH8` reader - Busy Channel 8"]
20pub type Busych8R = crate::BitReader;
21#[doc = "Field `BUSYCH9` reader - Busy Channel 9"]
22pub type Busych9R = crate::BitReader;
23#[doc = "Field `BUSYCH10` reader - Busy Channel 10"]
24pub type Busych10R = crate::BitReader;
25#[doc = "Field `BUSYCH11` reader - Busy Channel 11"]
26pub type Busych11R = crate::BitReader;
27impl R {
28    #[doc = "Bit 0 - Busy Channel 0"]
29    #[inline(always)]
30    pub fn busych0(&self) -> Busych0R {
31        Busych0R::new((self.bits & 1) != 0)
32    }
33    #[doc = "Bit 1 - Busy Channel 1"]
34    #[inline(always)]
35    pub fn busych1(&self) -> Busych1R {
36        Busych1R::new(((self.bits >> 1) & 1) != 0)
37    }
38    #[doc = "Bit 2 - Busy Channel 2"]
39    #[inline(always)]
40    pub fn busych2(&self) -> Busych2R {
41        Busych2R::new(((self.bits >> 2) & 1) != 0)
42    }
43    #[doc = "Bit 3 - Busy Channel 3"]
44    #[inline(always)]
45    pub fn busych3(&self) -> Busych3R {
46        Busych3R::new(((self.bits >> 3) & 1) != 0)
47    }
48    #[doc = "Bit 4 - Busy Channel 4"]
49    #[inline(always)]
50    pub fn busych4(&self) -> Busych4R {
51        Busych4R::new(((self.bits >> 4) & 1) != 0)
52    }
53    #[doc = "Bit 5 - Busy Channel 5"]
54    #[inline(always)]
55    pub fn busych5(&self) -> Busych5R {
56        Busych5R::new(((self.bits >> 5) & 1) != 0)
57    }
58    #[doc = "Bit 6 - Busy Channel 6"]
59    #[inline(always)]
60    pub fn busych6(&self) -> Busych6R {
61        Busych6R::new(((self.bits >> 6) & 1) != 0)
62    }
63    #[doc = "Bit 7 - Busy Channel 7"]
64    #[inline(always)]
65    pub fn busych7(&self) -> Busych7R {
66        Busych7R::new(((self.bits >> 7) & 1) != 0)
67    }
68    #[doc = "Bit 8 - Busy Channel 8"]
69    #[inline(always)]
70    pub fn busych8(&self) -> Busych8R {
71        Busych8R::new(((self.bits >> 8) & 1) != 0)
72    }
73    #[doc = "Bit 9 - Busy Channel 9"]
74    #[inline(always)]
75    pub fn busych9(&self) -> Busych9R {
76        Busych9R::new(((self.bits >> 9) & 1) != 0)
77    }
78    #[doc = "Bit 10 - Busy Channel 10"]
79    #[inline(always)]
80    pub fn busych10(&self) -> Busych10R {
81        Busych10R::new(((self.bits >> 10) & 1) != 0)
82    }
83    #[doc = "Bit 11 - Busy Channel 11"]
84    #[inline(always)]
85    pub fn busych11(&self) -> Busych11R {
86        Busych11R::new(((self.bits >> 11) & 1) != 0)
87    }
88}
89#[doc = "Busy Channels\n\nYou can [`read`](crate::Reg::read) this register and get [`busych::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
90pub struct BusychSpec;
91impl crate::RegisterSpec for BusychSpec {
92    type Ux = u32;
93}
94#[doc = "`read()` method returns [`busych::R`](R) reader structure"]
95impl crate::Readable for BusychSpec {}
96#[doc = "`reset()` method sets BUSYCH to value 0"]
97impl crate::Resettable for BusychSpec {
98    const RESET_VALUE: u32 = 0;
99}
atsamd51n/evsys/busych.rs

atsamd51n/evsys/
busych.rs
